KR950021242A - 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 - Google Patents
다결정 실리콘 박막 트랜지스터 및 그 제조 방법 Download PDFInfo
- Publication number
- KR950021242A KR950021242A KR1019930030230A KR930030230A KR950021242A KR 950021242 A KR950021242 A KR 950021242A KR 1019930030230 A KR1019930030230 A KR 1019930030230A KR 930030230 A KR930030230 A KR 930030230A KR 950021242 A KR950021242 A KR 950021242A
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- KR
- South Korea
- Prior art keywords
- gate
- active layer
- forming
- film
- etching
- Prior art date
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims description 5
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 claims abstract description 6
- 238000005468 ion implantation Methods 0.000 claims abstract 6
- 239000010408 film Substances 0.000 claims description 14
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 239000010410 layer Substances 0.000 claims 11
- 238000005530 etching Methods 0.000 claims 6
- 239000000758 substrate Substances 0.000 claims 4
- 239000011229 interlayer Substances 0.000 claims 3
- 150000002500 ions Chemical class 0.000 claims 3
- 239000010453 quartz Substances 0.000 claims 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 3
- 239000002019 doping agent Substances 0.000 claims 2
- 230000003213 activating effect Effects 0.000 claims 1
- 210000003323 beak Anatomy 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000000151 deposition Methods 0.000 claims 1
- 230000005611 electricity Effects 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 239000004973 liquid crystal related substance Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
Abstract
본 발명은 박형 표시 장치(Flat Display Device)의 일종인 액정표시장치(LCD:Liquid Crystal Display)를 구동시켜 주는 소자에 관한 것으로, 고온 공정을 이용한 LDD형 다결정 박막 트랜지스터 및 그 제조 방법에 관한 것으로, 활성층을 일체형으로 형성하고, 그 상면을 산화시켜 새부리 모양의 끝을 가지는 게이트 절연층을 형성하여, 1회의 이온주입 공정으로 고농도의 소오스 및 드레인 영역과 저농도 영역을 동시에 형성함으로써, 복잡한 공정이 단순화하고, 활성층의 질을 향상시키며, 고농도의 소오스 및 드레인으로 부터 채널쪽으로 이온 농도를 서서히 감소시켜 Vgs-Ids 특성을 개선하고 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제5도는 본 발명에 따른 다결정 실리콘 박막트랜지스터의 수직 단면도,
제8도는 본 발명에 따른 다결정 실리콘 박막트랜지스터의 공정단계별 수직 단면도로서, 활성층 위의 질화 실리콘 막을 제거한 수직 단면도.
Claims (3)
- 석영기판과 상기 석영 기판 상면에 형성되고, 그 양쪽 가장 자리에 이온이 고농도로 주입되어 소오스 및 드레인이 된 영역과, 상기 소오스 및 드레인에 인접하고 이온이 저농도로 주입된 두개의 저농도 이온주입 영역과, 상기 저농도 이온 주입 영역 사이에 이온이 주입안된 채널로 구성된 활성층과, 상기 활성층의 두개의 저농도 이온주입 영역과 채널 영역의 상면에 형성된 게이트 절연막과, 상기 게이트 절연막 상면에 형성된 게이트와, 상기 각 층간 및 각 소자간을 절연하도록 형성된 층간 절연막과, 상기 소오스와 상기 게이트와 상기 드레인과 외부와의 통전을 위해 상기 층간 절연막을 관통하여 형성된 전극을 구비하는 점에 특징이 있는 LDD형 다결정 박막트랜지스터.
- 제1항에 있어서, 게이트 절연막은 그 양쪽 끝이 새부리 모양으로 뾰족하게 형성된 것을 특징으로 하는 LDD형 다결정 박막 트랜지스터.
- 석영 기판 상면에 산화막을 형성하고 다결정 실리콘막을 전면에 도포한 후 트랜지스터가 형성될 수 있도록 식각하여 활성층을 형성하는 성장단계와; 상기 성장단계에서 형성된 상기 활성층 상면에 질화 실리콘막을 도포하고 게이트를 형성할 수 있도록 선택 식각하는 질화 실리콘막 형성단계와, 상기 식각 단계에서 식각되어 노출된 상기 활성층의 소정의 부위를 열산화시켜 게이트 절연용 산화막을 형성하는 산화 단계와, 상기 산화 단계에서 형성된 질화 실리콘을 제거하고 기판 전체에 다결정 실리콘막을 형성한 다음 식각하여 게이트 형성하는 게이트 형성 단계와, 상기 게이트 형성 단계에서 형성된 활성층과 상기 제4단계에서 형성된 게이트층에 도펀트를 주입하여 게이트는 고농도로, 활성층은 고농도 영역과 저농도 영역을 동시에 형성하는 이온 주입 단계와, 상기 이온주입 단계에서 주입된 도펀트를 활성화시키기 위한 열공정 단계와, 상기 열공정 단계를 마친 트랜지스터에 층간 절연막용의 산화막을 형성하고, 전극 접촉용 창을 식각한 다음 금속을 증착하고 식각하여 전극을 형성하는 전극 형성 단계를 구비하여 된 것을 특징으로 하는 LDD형 다결정 박막 트랜지스터.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930030230A KR950021242A (ko) | 1993-12-28 | 1993-12-28 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
JP6325406A JPH07202217A (ja) | 1993-12-28 | 1994-12-27 | Ldd型の多結晶シリコン薄膜トランジスタおよびその製造方法 |
US08/363,199 US5698882A (en) | 1993-12-28 | 1994-12-27 | LDD Polysilicon thin-film transistor |
US08/914,273 US5789283A (en) | 1993-12-28 | 1997-08-19 | LDD polysilicon thin film transistor and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930030230A KR950021242A (ko) | 1993-12-28 | 1993-12-28 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR950021242A true KR950021242A (ko) | 1995-07-26 |
Family
ID=19373240
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930030230A KR950021242A (ko) | 1993-12-28 | 1993-12-28 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
Country Status (3)
Country | Link |
---|---|
US (2) | US5698882A (ko) |
JP (1) | JPH07202217A (ko) |
KR (1) | KR950021242A (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101131135B1 (ko) * | 2005-11-14 | 2012-04-03 | 삼성전자주식회사 | 박막 트랜지스터 및 그 제조방법 |
Families Citing this family (24)
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US6975296B1 (en) * | 1991-06-14 | 2005-12-13 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method of driving the same |
KR950021242A (ko) * | 1993-12-28 | 1995-07-26 | 김광호 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
US6337232B1 (en) * | 1995-06-07 | 2002-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabrication of a crystalline silicon thin film semiconductor with a thin channel region |
US6746905B1 (en) | 1996-06-20 | 2004-06-08 | Kabushiki Kaisha Toshiba | Thin film transistor and manufacturing process therefor |
JP3296975B2 (ja) * | 1996-08-22 | 2002-07-02 | シャープ株式会社 | 薄膜トランジスタ及びその製造方法 |
US5998838A (en) | 1997-03-03 | 1999-12-07 | Nec Corporation | Thin film transistor |
US6852384B2 (en) | 1998-06-22 | 2005-02-08 | Han H. Nee | Metal alloys for the reflective or the semi-reflective layer of an optical storage medium |
US6878968B1 (en) * | 1999-05-10 | 2005-04-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP3490046B2 (ja) * | 2000-05-02 | 2004-01-26 | シャープ株式会社 | 半導体装置及びその製造方法 |
TWI286338B (en) * | 2000-05-12 | 2007-09-01 | Semiconductor Energy Lab | Semiconductor device and manufacturing method thereof |
JP4256087B2 (ja) * | 2001-09-27 | 2009-04-22 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
US7050878B2 (en) | 2001-11-22 | 2006-05-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductror fabricating apparatus |
US7133737B2 (en) | 2001-11-30 | 2006-11-07 | Semiconductor Energy Laboratory Co., Ltd. | Program for controlling laser apparatus and recording medium for recording program for controlling laser apparatus and capable of being read out by computer |
US6979605B2 (en) | 2001-11-30 | 2005-12-27 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method for a semiconductor device using a marker on an amorphous semiconductor film to selectively crystallize a region with a laser light |
US7214573B2 (en) * | 2001-12-11 | 2007-05-08 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device that includes patterning sub-islands |
JP3992976B2 (ja) | 2001-12-21 | 2007-10-17 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4030758B2 (ja) * | 2001-12-28 | 2008-01-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4271413B2 (ja) * | 2002-06-28 | 2009-06-03 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
TWI220072B (en) * | 2003-02-19 | 2004-08-01 | Toppoly Optoelectronics Corp | TFT structure with LDD region and manufacturing process of the same |
US20050144027A1 (en) * | 2003-12-29 | 2005-06-30 | Brunner Michael S. | Individual protective containers |
JP2005223027A (ja) * | 2004-02-04 | 2005-08-18 | Sony Corp | 表示装置およびその製造方法 |
KR100579188B1 (ko) * | 2004-02-12 | 2006-05-11 | 삼성에스디아이 주식회사 | 엘디디 구조를 갖는 박막트랜지스터 |
CN104779300B (zh) * | 2015-04-16 | 2016-05-25 | 京东方科技集团股份有限公司 | 一种多晶硅薄膜晶体管及其制作方法和显示装置 |
CN111403489B (zh) * | 2020-04-15 | 2023-06-27 | 合肥鑫晟光电科技有限公司 | 薄膜晶体管、显示基板及其制作方法 |
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JPS5812365A (ja) * | 1981-07-15 | 1983-01-24 | Japan Electronic Ind Dev Assoc<Jeida> | 薄膜トランジスタ及びその製造方法 |
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JPH06151828A (ja) * | 1992-10-30 | 1994-05-31 | Toshiba Corp | 半導体装置及びその製造方法 |
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FR2708142B1 (fr) * | 1993-07-22 | 1995-08-18 | Commissariat Energie Atomique | Procédé de fabrication d'un transistor en technologie silicium sur isolant. |
US5567966A (en) * | 1993-09-29 | 1996-10-22 | Texas Instruments Incorporated | Local thinning of channel region for ultra-thin film SOI MOSFET with elevated source/drain |
KR950021242A (ko) * | 1993-12-28 | 1995-07-26 | 김광호 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
JPH07249766A (ja) * | 1994-03-10 | 1995-09-26 | Fujitsu Ltd | 半導体装置及びその製造方法 |
-
1993
- 1993-12-28 KR KR1019930030230A patent/KR950021242A/ko not_active Application Discontinuation
-
1994
- 1994-12-27 US US08/363,199 patent/US5698882A/en not_active Expired - Lifetime
- 1994-12-27 JP JP6325406A patent/JPH07202217A/ja active Pending
-
1997
- 1997-08-19 US US08/914,273 patent/US5789283A/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101131135B1 (ko) * | 2005-11-14 | 2012-04-03 | 삼성전자주식회사 | 박막 트랜지스터 및 그 제조방법 |
Also Published As
Publication number | Publication date |
---|---|
US5698882A (en) | 1997-12-16 |
US5789283A (en) | 1998-08-04 |
JPH07202217A (ja) | 1995-08-04 |
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