KR100692441B1 - 반도체 장치 및 반도체 장치의 제조 방법 - Google Patents
반도체 장치 및 반도체 장치의 제조 방법 Download PDFInfo
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- KR100692441B1 KR100692441B1 KR1020010024525A KR20010024525A KR100692441B1 KR 100692441 B1 KR100692441 B1 KR 100692441B1 KR 1020010024525 A KR1020010024525 A KR 1020010024525A KR 20010024525 A KR20010024525 A KR 20010024525A KR 100692441 B1 KR100692441 B1 KR 100692441B1
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
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Abstract
Description
Claims (10)
- 반도체 소자와,외부와 접속하는 외부 단자와,상기 반도체 소자를 제 1 면에 탑재하고, 상기 제 1 면과 반대측 면에 외부 단자를 설치하여, 상기 반도체 소자와 상기 외부 단자를 전기적으로 접속하는 인터포저(interposer), 및상기 인터포저의 제 1 면을 밀봉하는 수지를 갖는 반도체 장치로서,배선 구멍에 도전재를 도입하여 형성되고, 상기 외부 단자와 전기적으로 접속하는 제 1 접속부 및 상기 수지의 외주 표면에 노출하는 제 2 접속부를 갖고, 상기 수지에 내설(內設)되어 있는 배선을 갖고,상기 제 1 접속부와 제 2 접속부의 단면적이 다른 것을 특징으로 하는 반도체 장치.
- 반도체 소자와,외부와 접속하는 외부 단자와,상기 반도체 소자를 제 1 면에 탑재하고, 상기 제 1 면과 반대측 면에 외부 단자를 설치하여, 상기 반도체 소자와 상기 외부 단자를 전기적으로 접속하는 인터포저, 및상기 인터포저의 제 1 면을 밀봉하는 수지를 갖는 반도체 장치로서,배선 구멍에 도전재를 도입하여 형성되고, 상기 반도체 소자와 전기적으로 접속하는 제 1 접속부 및 상기 수지의 외주 표면에 노출하는 제 2 접속부를 갖고, 상기 수지에 내설되는 동시에 상기 반도체 소자의 표면 상에 배열 설치된 배선을 갖고,상기 제 1 접속부와 제 2 접속부의 단면적이 다른 것을 특징으로 하는 반도체 장치.
- 삭제
- 제 1 항 또는 제 2 항에 있어서,상기 제 2 접속부에 범프를 형성한 것을 특징으로 하는 반도체 장치.
- 제 1 항에 있어서,복수의 상기 반도체 장치 각각을 적층(積層) 고정한 것을 특징으로 하는 반도체 장치.
- 제 1 항 또는 제 2 항에 있어서,상기 제 2 접속부에 안테나를 재치(載置)한 것을 특징으로 하는 반도체 장치.
- 제 1 항 또는 제 2 항에 있어서,상기 제 2 접속부에 전자 부품을 재치한 것을 특징으로 하는 반도체 장치.
- 제 1 항에 있어서,상기 반도체 소자에 다른 반도체 소자의 제 1 면을 접속시키고, 상기 다른 반도체 소자의 제 2 면 및 제 2 접속부에 히트 싱크(heat sink)를 재치한 것을 특징으로 하는 반도체 장치.
- 전극 패턴을 갖는 기판에 반도체 소자를 배열 설치하는 소자 배열 설치 공정과,상기 반도체 소자와 상기 전극 패턴을 전기적으로 접속하는 접속 공정과,상기 전극 패턴 상에 배선 구멍을 갖는 마스크를 형성하고, 상기 배선 구멍에 도전재를 도입하여, 외부와 접속하는 외부 단자와 전기적으로 접속하는 제 1 접속부 및 반대측의 제 2 접속부를 갖는 배선을 형성하는 배선 형성 공정, 및상기 마스크를 제거한 후, 상기 기판의 상기 반도체 소자 및 상기 배선이 형성된 면에 상기 제 2 접속부가 외부로 노출하도록 수지 형성을 행하는 수지 형성 공정을 실시하고,상기 제 1 접속부와 제 2 접속부의 단면적이 다른 것을 특징으로 하는 반도체 장치의 제조 방법.
- 전극 패턴을 갖는 기판에 반도체 소자를 배열 설치하는 소자 배열 설치 공정과,상기 반도체 소자와 상기 전극 패턴을 전기적으로 접속하는 접속 공정과,상기 전극 패턴 상에 배선이 형성되도록, 배선 형성부를 구비한 금형을 배열 설치하고, 상기 기판의 상기 반도체 소자의 배열 설치면에 수지를 형성하는 수지 형성 공정, 및상기 금형의 배선 형성부에 의해 형성된 배선 구멍에 도전재를 도입함으로써, 상기 수지 내에 외부와 접속하는 외부 단자와 전기적으로 접속하는 제 1 접속부 및 상기 수지의 외주 표면에 노출하는 제 2 접속부를 갖는 배선을 형성하는 배선 형성 공정을 실시하고,상기 제 1 접속부와 제 2 접속부의 단면적이 다른 것을 특징으로 하는 반도체 장치의 제조 방법.
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JP2000368910A JP3798620B2 (ja) | 2000-12-04 | 2000-12-04 | 半導体装置の製造方法 |
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Also Published As
Publication number | Publication date |
---|---|
JP2002170906A (ja) | 2002-06-14 |
US6489676B2 (en) | 2002-12-03 |
JP3798620B2 (ja) | 2006-07-19 |
US6812066B2 (en) | 2004-11-02 |
TW529155B (en) | 2003-04-21 |
US20020066952A1 (en) | 2002-06-06 |
US20030042564A1 (en) | 2003-03-06 |
KR20020043435A (ko) | 2002-06-10 |
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