JPH1065147A5 - - Google Patents

Info

Publication number
JPH1065147A5
JPH1065147A5 JP1996232550A JP23255096A JPH1065147A5 JP H1065147 A5 JPH1065147 A5 JP H1065147A5 JP 1996232550 A JP1996232550 A JP 1996232550A JP 23255096 A JP23255096 A JP 23255096A JP H1065147 A5 JPH1065147 A5 JP H1065147A5
Authority
JP
Japan
Prior art keywords
region
semiconductor device
impurity
insulated gate
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1996232550A
Other languages
English (en)
Japanese (ja)
Other versions
JP4014676B2 (ja
JPH1065147A (ja
Filing date
Publication date
Priority claimed from JP23255096A external-priority patent/JP4014676B2/ja
Priority to JP23255096A priority Critical patent/JP4014676B2/ja
Application filed filed Critical
Priority to US08/912,979 priority patent/US6198141B1/en
Priority to KR1019970038621A priority patent/KR100460550B1/ko
Publication of JPH1065147A publication Critical patent/JPH1065147A/ja
Priority to US09/736,724 priority patent/US6867085B2/en
Priority to KR1020020047946A priority patent/KR100460553B1/ko
Publication of JPH1065147A5 publication Critical patent/JPH1065147A5/ja
Publication of JP4014676B2 publication Critical patent/JP4014676B2/ja
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP23255096A 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置およびその作製方法 Expired - Fee Related JP4014676B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP23255096A JP4014676B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置およびその作製方法
US08/912,979 US6198141B1 (en) 1996-08-13 1997-08-13 Insulated gate semiconductor device and method of manufacturing the same
KR1019970038621A KR100460550B1 (ko) 1996-08-13 1997-08-13 절연게이트형반도체장치및그제작방법
US09/736,724 US6867085B2 (en) 1996-08-13 2000-12-13 Insulated gate semiconductor device and method of manufacturing the same
KR1020020047946A KR100460553B1 (ko) 1996-08-13 2002-08-13 절연 게이트형 반도체 장치 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23255096A JP4014676B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置およびその作製方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007148822A Division JP4628399B2 (ja) 2007-06-05 2007-06-05 半導体装置

Publications (3)

Publication Number Publication Date
JPH1065147A JPH1065147A (ja) 1998-03-06
JPH1065147A5 true JPH1065147A5 (enExample) 2004-08-26
JP4014676B2 JP4014676B2 (ja) 2007-11-28

Family

ID=16941090

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23255096A Expired - Fee Related JP4014676B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置およびその作製方法

Country Status (3)

Country Link
US (2) US6198141B1 (enExample)
JP (1) JP4014676B2 (enExample)
KR (2) KR100460550B1 (enExample)

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US6830993B1 (en) * 2000-03-21 2004-12-14 The Trustees Of Columbia University In The City Of New York Surface planarization of thin silicon films during and after processing by the sequential lateral solidification method
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KR100493018B1 (ko) * 2002-06-12 2005-06-07 삼성전자주식회사 반도체 장치의 제조방법
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TWI378307B (en) 2002-08-19 2012-12-01 Univ Columbia Process and system for laser crystallization processing of film regions on a substrate to minimize edge areas, and structure of such film regions
AU2003258289A1 (en) * 2002-08-19 2004-03-03 The Trustees Of Columbia University In The City Of New York A single-shot semiconductor processing system and method having various irradiation patterns
JP2004221246A (ja) * 2003-01-14 2004-08-05 Seiko Epson Corp 半導体装置及びその製造方法
JP5164378B2 (ja) * 2003-02-19 2013-03-21 ザ トラスティーズ オブ コロンビア ユニヴァーシティ イン ザ シティ オブ ニューヨーク 逐次的横方向結晶化技術を用いて結晶化させた複数の半導体薄膜フィルムを処理するシステム及びプロセス
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WO2005029551A2 (en) 2003-09-16 2005-03-31 The Trustees Of Columbia University In The City Of New York Processes and systems for laser crystallization processing of film regions on a substrate utilizing a line-type beam, and structures of such film regions
WO2005029547A2 (en) * 2003-09-16 2005-03-31 The Trustees Of Columbia University In The City Of New York Enhancing the width of polycrystalline grains with mask
WO2005029546A2 (en) * 2003-09-16 2005-03-31 The Trustees Of Columbia University In The City Of New York Method and system for providing a continuous motion sequential lateral solidification for reducing or eliminating artifacts, and a mask for facilitating such artifact reduction/elimination
WO2005029549A2 (en) * 2003-09-16 2005-03-31 The Trustees Of Columbia University In The City Of New York Method and system for facilitating bi-directional growth
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US8466490B2 (en) * 2005-07-01 2013-06-18 Synopsys, Inc. Enhanced segmented channel MOS transistor with multi layer regions
KR100770539B1 (ko) * 2006-08-11 2007-10-25 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조 방법
KR100834742B1 (ko) 2006-11-30 2008-06-05 삼성전자주식회사 내부에 절연성 영역을 포함하는 실리콘 반도체 기판,그것을 사용하여 제조된 반도체 소자 및 그 제조 방법
JP5500771B2 (ja) * 2006-12-05 2014-05-21 株式会社半導体エネルギー研究所 半導体装置及びマイクロプロセッサ
US7405128B1 (en) * 2007-02-14 2008-07-29 Freescale Semiconductor, Inc. Dotted channel MOSFET and method
KR20140055338A (ko) * 2012-10-31 2014-05-09 엘지이노텍 주식회사 에피택셜 웨이퍼 및 그 제조 방법
FR3030887B1 (fr) * 2014-12-23 2018-01-26 Commissariat A L'energie Atomique Et Aux Energies Alternatives Transistor comprenant un canal mis sous contrainte en cisaillement et procede de fabrication
JP2022055943A (ja) * 2020-09-29 2022-04-08 ラピスセミコンダクタ株式会社 半導体装置
KR20230039177A (ko) 2021-09-14 2023-03-21 삼성전자주식회사 반도체 장치

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