JPS54157481A - Mos transistor - Google Patents
Mos transistorInfo
- Publication number
- JPS54157481A JPS54157481A JP6632978A JP6632978A JPS54157481A JP S54157481 A JPS54157481 A JP S54157481A JP 6632978 A JP6632978 A JP 6632978A JP 6632978 A JP6632978 A JP 6632978A JP S54157481 A JPS54157481 A JP S54157481A
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- films
- sio
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Networks Using Active Elements (AREA)
Abstract
PURPOSE: To obtain MOS element which is suited for the low voltage current load such as the delay circuit in IC by providing within the channel region enclosed by the source and drain regions the region featuring the meandering pattern and a lower inverse voltage than the channel region.
CONSTITUTION: Field SiO2 film 12 is formed on P--type Si substrate 11, and gate SiO2 films 131∼133 are formed on the substrate surface for MOS transistor T1 and T2 plus MOS capacitor C each. Then poly-crystal Si electrodes 141∼143 are provided on these SiO2 films to used as the mask to give the selective etching to films 131∼133. Using those openings cuased through the selective etching, N+-type source region 161 of element T1, N+-type region 152 to become to the drain of T1 doubling the source of T2, and N+- type drain region 153 are formed each by diffusion within substrate 11. After this, meandering N--type region 19 featuring a narrow width and space plus a low inverse voltage is formed within the rectangular pattern region enclosed by region 152 and 153 of T2 via the ion injection and with use of the mask containing opening 18, thus forming the current path.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6632978A JPS54157481A (en) | 1978-06-02 | 1978-06-02 | Mos transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6632978A JPS54157481A (en) | 1978-06-02 | 1978-06-02 | Mos transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54157481A true JPS54157481A (en) | 1979-12-12 |
Family
ID=13312688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6632978A Pending JPS54157481A (en) | 1978-06-02 | 1978-06-02 | Mos transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54157481A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6867085B2 (en) | 1996-08-13 | 2005-03-15 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and method of manufacturing the same |
-
1978
- 1978-06-02 JP JP6632978A patent/JPS54157481A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6867085B2 (en) | 1996-08-13 | 2005-03-15 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and method of manufacturing the same |
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