JP4014676B2 - 絶縁ゲイト型半導体装置およびその作製方法 - Google Patents
絶縁ゲイト型半導体装置およびその作製方法 Download PDFInfo
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- JP4014676B2 JP4014676B2 JP23255096A JP23255096A JP4014676B2 JP 4014676 B2 JP4014676 B2 JP 4014676B2 JP 23255096 A JP23255096 A JP 23255096A JP 23255096 A JP23255096 A JP 23255096A JP 4014676 B2 JP4014676 B2 JP 4014676B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/213—Channel regions of field-effect devices
- H10D62/221—Channel regions of field-effect devices of FETs
- H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/114—PN junction isolations
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
- H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
- H10D62/8181—Structures having no potential periodicity in the vertical direction, e.g. lateral superlattices or lateral surface superlattices [LSS]
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- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/82—Heterojunctions
- H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
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- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
- H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D84/401—Combinations of FETs or IGBTs with BJTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23255096A JP4014676B2 (ja) | 1996-08-13 | 1996-08-13 | 絶縁ゲイト型半導体装置およびその作製方法 |
| US08/912,979 US6198141B1 (en) | 1996-08-13 | 1997-08-13 | Insulated gate semiconductor device and method of manufacturing the same |
| KR1019970038621A KR100460550B1 (ko) | 1996-08-13 | 1997-08-13 | 절연게이트형반도체장치및그제작방법 |
| US09/736,724 US6867085B2 (en) | 1996-08-13 | 2000-12-13 | Insulated gate semiconductor device and method of manufacturing the same |
| KR1020020047946A KR100460553B1 (ko) | 1996-08-13 | 2002-08-13 | 절연 게이트형 반도체 장치 제조 방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23255096A JP4014676B2 (ja) | 1996-08-13 | 1996-08-13 | 絶縁ゲイト型半導体装置およびその作製方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007148822A Division JP4628399B2 (ja) | 2007-06-05 | 2007-06-05 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH1065147A JPH1065147A (ja) | 1998-03-06 |
| JPH1065147A5 JPH1065147A5 (enExample) | 2004-08-26 |
| JP4014676B2 true JP4014676B2 (ja) | 2007-11-28 |
Family
ID=16941090
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23255096A Expired - Fee Related JP4014676B2 (ja) | 1996-08-13 | 1996-08-13 | 絶縁ゲイト型半導体装置およびその作製方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US6198141B1 (enExample) |
| JP (1) | JP4014676B2 (enExample) |
| KR (2) | KR100460550B1 (enExample) |
Families Citing this family (37)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6555449B1 (en) * | 1996-05-28 | 2003-04-29 | Trustees Of Columbia University In The City Of New York | Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidfication |
| JP4103968B2 (ja) | 1996-09-18 | 2008-06-18 | 株式会社半導体エネルギー研究所 | 絶縁ゲイト型半導体装置 |
| US6590230B1 (en) | 1996-10-15 | 2003-07-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US6118148A (en) | 1996-11-04 | 2000-09-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| JP4017706B2 (ja) | 1997-07-14 | 2007-12-05 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US6686623B2 (en) * | 1997-11-18 | 2004-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile memory and electronic apparatus |
| JP4236722B2 (ja) * | 1998-02-05 | 2009-03-11 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US6291856B1 (en) * | 1998-11-12 | 2001-09-18 | Fuji Electric Co., Ltd. | Semiconductor device with alternating conductivity type layer and method of manufacturing the same |
| JP2000188395A (ja) * | 1998-12-22 | 2000-07-04 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| JP4447065B2 (ja) | 1999-01-11 | 2010-04-07 | 富士電機システムズ株式会社 | 超接合半導体素子の製造方法 |
| JP2001119022A (ja) * | 1999-10-20 | 2001-04-27 | Fuji Electric Co Ltd | 半導体装置及びその製造方法 |
| JP4765012B2 (ja) | 2000-02-09 | 2011-09-07 | 富士電機株式会社 | 半導体装置及びその製造方法 |
| US6830993B1 (en) * | 2000-03-21 | 2004-12-14 | The Trustees Of Columbia University In The City Of New York | Surface planarization of thin silicon films during and after processing by the sequential lateral solidification method |
| US6724037B2 (en) * | 2000-07-21 | 2004-04-20 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile memory and semiconductor device |
| MXPA02005590A (es) | 2000-10-10 | 2002-09-30 | Univ Columbia | Metodo y aparato para procesar capas de metal delgadas. |
| KR100422393B1 (ko) * | 2002-01-17 | 2004-03-11 | 한국전자통신연구원 | 격자형 표류 영역 구조를 갖는 이디모스 소자 및 그 제조방법 |
| KR100493018B1 (ko) * | 2002-06-12 | 2005-06-07 | 삼성전자주식회사 | 반도체 장치의 제조방법 |
| KR100416627B1 (ko) * | 2002-06-18 | 2004-01-31 | 삼성전자주식회사 | 반도체 장치 및 그의 제조방법 |
| TWI378307B (en) | 2002-08-19 | 2012-12-01 | Univ Columbia | Process and system for laser crystallization processing of film regions on a substrate to minimize edge areas, and structure of such film regions |
| AU2003258289A1 (en) * | 2002-08-19 | 2004-03-03 | The Trustees Of Columbia University In The City Of New York | A single-shot semiconductor processing system and method having various irradiation patterns |
| JP2004221246A (ja) * | 2003-01-14 | 2004-08-05 | Seiko Epson Corp | 半導体装置及びその製造方法 |
| JP5164378B2 (ja) * | 2003-02-19 | 2013-03-21 | ザ トラスティーズ オブ コロンビア ユニヴァーシティ イン ザ シティ オブ ニューヨーク | 逐次的横方向結晶化技術を用いて結晶化させた複数の半導体薄膜フィルムを処理するシステム及びプロセス |
| US7714384B2 (en) * | 2003-09-15 | 2010-05-11 | Seliskar John J | Castellated gate MOSFET device capable of fully-depleted operation |
| WO2005029551A2 (en) | 2003-09-16 | 2005-03-31 | The Trustees Of Columbia University In The City Of New York | Processes and systems for laser crystallization processing of film regions on a substrate utilizing a line-type beam, and structures of such film regions |
| WO2005029547A2 (en) * | 2003-09-16 | 2005-03-31 | The Trustees Of Columbia University In The City Of New York | Enhancing the width of polycrystalline grains with mask |
| WO2005029546A2 (en) * | 2003-09-16 | 2005-03-31 | The Trustees Of Columbia University In The City Of New York | Method and system for providing a continuous motion sequential lateral solidification for reducing or eliminating artifacts, and a mask for facilitating such artifact reduction/elimination |
| WO2005029549A2 (en) * | 2003-09-16 | 2005-03-31 | The Trustees Of Columbia University In The City Of New York | Method and system for facilitating bi-directional growth |
| US7417270B2 (en) * | 2004-06-23 | 2008-08-26 | Texas Instruments Incorporated | Distributed high voltage JFET |
| US8466490B2 (en) * | 2005-07-01 | 2013-06-18 | Synopsys, Inc. | Enhanced segmented channel MOS transistor with multi layer regions |
| KR100770539B1 (ko) * | 2006-08-11 | 2007-10-25 | 동부일렉트로닉스 주식회사 | 반도체 소자 및 그 제조 방법 |
| KR100834742B1 (ko) | 2006-11-30 | 2008-06-05 | 삼성전자주식회사 | 내부에 절연성 영역을 포함하는 실리콘 반도체 기판,그것을 사용하여 제조된 반도체 소자 및 그 제조 방법 |
| JP5500771B2 (ja) * | 2006-12-05 | 2014-05-21 | 株式会社半導体エネルギー研究所 | 半導体装置及びマイクロプロセッサ |
| US7405128B1 (en) * | 2007-02-14 | 2008-07-29 | Freescale Semiconductor, Inc. | Dotted channel MOSFET and method |
| KR20140055338A (ko) * | 2012-10-31 | 2014-05-09 | 엘지이노텍 주식회사 | 에피택셜 웨이퍼 및 그 제조 방법 |
| FR3030887B1 (fr) * | 2014-12-23 | 2018-01-26 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Transistor comprenant un canal mis sous contrainte en cisaillement et procede de fabrication |
| JP2022055943A (ja) * | 2020-09-29 | 2022-04-08 | ラピスセミコンダクタ株式会社 | 半導体装置 |
| KR20230039177A (ko) | 2021-09-14 | 2023-03-21 | 삼성전자주식회사 | 반도체 장치 |
Family Cites Families (60)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5368177A (en) | 1976-11-30 | 1978-06-17 | Toshiba Corp | Mos type field effect transistor |
| US4454524A (en) | 1978-03-06 | 1984-06-12 | Ncr Corporation | Device having implantation for controlling gate parasitic action |
| JPS54157481A (en) | 1978-06-02 | 1979-12-12 | Toshiba Corp | Mos transistor |
| JPS55151363A (en) | 1979-05-14 | 1980-11-25 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Mos semiconductor device and fabricating method of the same |
| US4549336A (en) | 1981-12-28 | 1985-10-29 | Mostek Corporation | Method of making MOS read only memory by specified double implantation |
| US5350940A (en) | 1984-02-02 | 1994-09-27 | Fastran, Inc. | Enhanced mobility metal oxide semiconductor devices |
| US4697198A (en) | 1984-08-22 | 1987-09-29 | Hitachi, Ltd. | MOSFET which reduces the short-channel effect |
| IT1213234B (it) | 1984-10-25 | 1989-12-14 | Sgs Thomson Microelectronics | Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos. |
| JPS6279622A (ja) * | 1985-10-02 | 1987-04-13 | Mitsubishi Electric Corp | パタ−ン形成方法 |
| EP0287658A1 (en) | 1986-10-27 | 1988-10-26 | Hughes Aircraft Company | Striped-channel transistor and method of forming the same |
| US4999682A (en) | 1987-08-14 | 1991-03-12 | Regents Of The University Of Minnesota | Electronic and optoelectronic laser devices utilizing light hole properties |
| JPH01223741A (ja) | 1988-03-02 | 1989-09-06 | Nec Corp | 半導体装置及びその製造方法 |
| US4959697A (en) | 1988-07-20 | 1990-09-25 | Vtc Incorporated | Short channel junction field effect transistor |
| JPH0231464A (ja) | 1988-07-21 | 1990-02-01 | Mitsubishi Electric Corp | 半導体装置 |
| JP2507567B2 (ja) | 1988-11-25 | 1996-06-12 | 三菱電機株式会社 | 絶縁体基板上の半導体層に形成されたmos型電界効果トランジスタ |
| JP2510710B2 (ja) * | 1988-12-13 | 1996-06-26 | 三菱電機株式会社 | 絶縁体基板上の半導体層に形成されたmos型電界効果トランジスタ |
| JPH02159070A (ja) | 1988-12-13 | 1990-06-19 | Matsushita Electric Ind Co Ltd | 半導体装置とその製造方法 |
| JPH02196468A (ja) | 1989-01-25 | 1990-08-03 | Nec Corp | 半導体装置 |
| JPH0738447B2 (ja) | 1989-02-02 | 1995-04-26 | 松下電器産業株式会社 | Mos型半導体装置 |
| JPH0316123A (ja) * | 1989-03-29 | 1991-01-24 | Mitsubishi Electric Corp | イオン注入方法およびそれにより製造される半導体装置 |
| US5106764A (en) * | 1989-04-10 | 1992-04-21 | At&T Bell Laboratories | Device fabrication |
| JPH03218070A (ja) | 1990-01-23 | 1991-09-25 | New Japan Radio Co Ltd | Mosfet |
| JP3194941B2 (ja) | 1990-03-19 | 2001-08-06 | 富士通株式会社 | 半導体装置 |
| US5210437A (en) | 1990-04-20 | 1993-05-11 | Kabushiki Kaisha Toshiba | MOS device having a well layer for controlling threshold voltage |
| JPH0418677A (ja) * | 1990-05-09 | 1992-01-22 | Toshiba Corp | デジタル回路のシミュレーション方式 |
| JP2873632B2 (ja) * | 1991-03-15 | 1999-03-24 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US5196367A (en) | 1991-05-08 | 1993-03-23 | Industrial Technology Research Institute | Modified field isolation process with no channel-stop implant encroachment |
| US5202591A (en) * | 1991-08-09 | 1993-04-13 | Hughes Aircraft Company | Dynamic circuit disguise for microelectronic integrated digital logic circuits |
| TW222345B (en) | 1992-02-25 | 1994-04-11 | Semicondustor Energy Res Co Ltd | Semiconductor and its manufacturing method |
| JPH05283687A (ja) | 1992-03-31 | 1993-10-29 | Oki Electric Ind Co Ltd | 半導体素子の製造方法 |
| JP3301116B2 (ja) | 1992-07-20 | 2002-07-15 | ソニー株式会社 | 半導体装置及びその製造方法 |
| TW226478B (en) * | 1992-12-04 | 1994-07-11 | Semiconductor Energy Res Co Ltd | Semiconductor device and method for manufacturing the same |
| JP2554433B2 (ja) * | 1992-12-24 | 1996-11-13 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 半導体装置およびその製造方法 |
| JP3456242B2 (ja) | 1993-01-07 | 2003-10-14 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
| US5324960A (en) | 1993-01-19 | 1994-06-28 | Motorola, Inc. | Dual-transistor structure and method of formation |
| JPH06252392A (ja) | 1993-03-01 | 1994-09-09 | Nec Corp | 電界効果トランジスタ |
| JP2848757B2 (ja) | 1993-03-19 | 1999-01-20 | シャープ株式会社 | 電界効果トランジスタおよびその製造方法 |
| KR960008735B1 (en) * | 1993-04-29 | 1996-06-29 | Samsung Electronics Co Ltd | Mos transistor and the manufacturing method thereof |
| US5426325A (en) | 1993-08-04 | 1995-06-20 | Siliconix Incorporated | Metal crossover in high voltage IC with graduated doping control |
| US5831294A (en) | 1993-09-30 | 1998-11-03 | Sony Corporation | Quantum box structure and carrier conductivity modulating device |
| JP3635683B2 (ja) | 1993-10-28 | 2005-04-06 | ソニー株式会社 | 電界効果トランジスタ |
| JPH07131009A (ja) | 1993-11-04 | 1995-05-19 | Toshiba Corp | 半導体装置及びその製造方法 |
| JPH07209856A (ja) * | 1994-01-25 | 1995-08-11 | Sanyo Electric Co Ltd | ステンシルマスク及びその製造方法 |
| JPH07226446A (ja) | 1994-02-12 | 1995-08-22 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP3184065B2 (ja) | 1994-07-25 | 2001-07-09 | セイコーインスツルメンツ株式会社 | 半導体集積回路装置及び電子機器 |
| US5516711A (en) | 1994-12-16 | 1996-05-14 | Mosel Vitelic, Inc. | Method for forming LDD CMOS with oblique implantation |
| US5478763A (en) | 1995-01-19 | 1995-12-26 | United Microelectronics Corporation | High performance field effect transistor and method of manufacture thereof |
| KR0161398B1 (ko) | 1995-03-13 | 1998-12-01 | 김광호 | 고내압 트랜지스터 및 그 제조방법 |
| US5532175A (en) | 1995-04-17 | 1996-07-02 | Motorola, Inc. | Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate |
| US5661059A (en) | 1995-04-18 | 1997-08-26 | Advanced Micro Devices | Boron penetration to suppress short channel effect in P-channel device |
| US5619053A (en) | 1995-05-31 | 1997-04-08 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having an SOI structure |
| KR970004074A (ko) | 1995-06-05 | 1997-01-29 | 빈센트 비. 인그라시아 | 절연 게이트 전계 효과 트랜지스터 및 그 제조 방법 |
| US5674788A (en) | 1995-06-06 | 1997-10-07 | Advanced Micro Devices, Inc. | Method of forming high pressure silicon oxynitride gate dielectrics |
| US5675164A (en) | 1995-06-07 | 1997-10-07 | International Business Machines Corporation | High performance multi-mesa field effect transistor |
| US5635315A (en) * | 1995-06-21 | 1997-06-03 | Hoya Corporation | Phase shift mask and phase shift mask blank |
| US5670389A (en) | 1996-01-11 | 1997-09-23 | Motorola, Inc. | Semiconductor-on-insulator device having a laterally-graded channel region and method of making |
| US5698884A (en) | 1996-02-07 | 1997-12-16 | Thunderbird Technologies, Inc. | Short channel fermi-threshold field effect transistors including drain field termination region and methods of fabricating same |
| JP3522441B2 (ja) | 1996-03-12 | 2004-04-26 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US5786618A (en) | 1996-03-21 | 1998-07-28 | United Microelectronics, Corp. | ROM memory cell with non-uniform threshold voltage |
| TW304278B (en) | 1996-09-17 | 1997-05-01 | Nat Science Council | The source-drain distributed implantation method |
-
1996
- 1996-08-13 JP JP23255096A patent/JP4014676B2/ja not_active Expired - Fee Related
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1997
- 1997-08-13 US US08/912,979 patent/US6198141B1/en not_active Expired - Lifetime
- 1997-08-13 KR KR1019970038621A patent/KR100460550B1/ko not_active Expired - Fee Related
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- 2000-12-13 US US09/736,724 patent/US6867085B2/en not_active Expired - Fee Related
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Also Published As
| Publication number | Publication date |
|---|---|
| KR100460553B1 (ko) | 2004-12-09 |
| US6867085B2 (en) | 2005-03-15 |
| KR19980018649A (ko) | 1998-06-05 |
| US20020008260A1 (en) | 2002-01-24 |
| KR100460550B1 (ko) | 2005-06-20 |
| US6198141B1 (en) | 2001-03-06 |
| JPH1065147A (ja) | 1998-03-06 |
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