JP5511766B2 - 埋め込みゲートを有する半導体装置及びその製造方法 - Google Patents
埋め込みゲートを有する半導体装置及びその製造方法 Download PDFInfo
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- JP5511766B2 JP5511766B2 JP2011231743A JP2011231743A JP5511766B2 JP 5511766 B2 JP5511766 B2 JP 5511766B2 JP 2011231743 A JP2011231743 A JP 2011231743A JP 2011231743 A JP2011231743 A JP 2011231743A JP 5511766 B2 JP5511766 B2 JP 5511766B2
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Description
本発明は、半導体装置製造に関し、より詳しくは半導体装置用の埋め込みゲートトランジスタに関する。
超大規模集積回路(ULSI)等の集積回路は、10億個以上のトランジスタを備えることができる。最も一般的なのは、超大規模集積回路(ULSI)が、相補形金属酸化膜半導体(CMOS)プロセスで形成される電界効果トランジスタ(FET)からなるという構成である。それぞれのMOSFETは、ドレイン領域とソース領域との間に設けられた、半導体基板のチャンネル領域上のゲート電極を備えている。
これらの問題(それ以外の問題も含む)は、本発明の好ましい実施形態により、解決される、あるいは回避される。そして、技術的利点が達成される。本発明の好ましい実施形態は、埋め込みゲートトランジスタのSCEに対する免疫性を向上させると同時に、分岐点での重なりを増加させる方法及び構造を提供する。
以下に、好適な実施形態の構成及び使用について詳細な説明を行う。ただし、本発明はここで述べる例示的実施形態に限定されず、特定の概念に基づき、さまざまな変形例に応用可能であることを前提とする。
Claims (15)
- 埋め込みゲートトランジスタ装置であって、
半導体材料からなり、上面を有する活性領域と、
上記活性領域に配された第1ソース/ドレイン領域と、
上記活性領域に配された第2ソース/ドレイン領域とを備え、
第1ソース/ドレイン領域と第2ソース/ドレイン領域との間にゲート電極が配されており、ゲート電極は、上記活性領域における半導体材料内で凹んだ第1部分と、活性領域における上面へ延びる第2部分とを有し、ゲート電極の第2部分は側壁を有し、
ゲート電極と活性領域における半導体材料との間には、ゲート誘電体が配されており、
上記ゲート電極の側壁に沿って側壁スペーサーが配されており、
第1ソース/ドレイン領域及び第2ソース/ドレイン領域には、シリサイド領域が形成されており、このシリサイド領域は、上記側壁スペーサーにより、ゲート電極側面と離間しており、
ゲート電極下の活性領域内にチャンネル領域を備え、上記凹んだ第1部分の側壁領域におけるチャンネル領域のドーピングレベルは、上記凹んだ第1部分の真下よりも低くなっており、上記第1ソース/ドレイン領域は、上記凹んだ第1部分の側壁領域におけるチャンネル領域に接触するように形成されており、
上記ゲート誘電体は、チャンネル領域並びに第1及び第2ソース/ドレイン領域が重なる領域と同じ厚さになっている、装置。 - 上記シリサイド領域は、コバルトシリサイド領域からなっている、請求項1に記載の装置。
- 上記ゲート電極は半導体材料からなり、
さらに、ゲート電極の上部に沿ったシリサイド領域が設けられた、請求項1に記載の装置。 - 上記活性領域は、分離領域により囲まれており、
上記ゲート電極は分離領域における溝を通過して延びている、請求項1に記載の装置。 - 第1ソース/ドレイン領域は、上記ゲート誘電体の厚さが最も薄くなった地点近傍で、チャンネル領域と交わるようになっている、請求項1に記載の装置。
- 半導体装置の製造方法であって、
半導体基板を準備する工程と、
半導体基板表面に凹部を形成する工程と、
上記凹部に誘電体ライナを形成する工程と、
上記凹部の真下の領域中のドーパント濃度が最も高くなるようにチャンネル領域を形成する工程と、
上記凹部にゲート電極を形成する工程と、
埋め込みゲート形成後に、高ドープされた半導体基板の、上記凹部の側壁領域におけるチャンネル領域に接触するように第1及び第2ソース/ドレイン領域を形成し、ゲート電極により、第1ソース/ドレイン領域と第2ソース/ドレイン領域とを側方で離間させる工程とを含み、上記誘電体ライナは、チャンネル領域並びに第1及び第2ソース/ドレイン領域が重なる領域と同じ厚さである、方法。 - 上記凹部を形成する工程では、凹部を、約5nmと約200nmとの間にリソグラフィパターニング・エッチングする、請求項6に記載の方法。
- 誘電体ライナを形成する工程では、酸化層を熱的に成長させる、請求項6に記載の方法。
- 誘電体ライナを形成する工程では、高k材料を堆積する、請求項6に記載の方法。
- ゲート電極を形成する工程では、活性領域から延びる埋め込みゲート電極を形成し、
ゲート電極の側壁に沿って、側壁スペーサーを形成する工程と、
第1及び第2ソース/ドレイン領域上にシリサイドを形成し、該シリサイドが側壁スペーサーにより、ゲート電極側面と離間するようにする工程とを含む、請求項6に記載の方法。 - 凹部形成後に、ハロインプラントを行う工程を含む、請求項6に記載の方法。
- チルト角インプラントを用いて、ハロインプラントを行い、
このチルト角インプラントでは、シリコン凹部及び浅い形状になったハードマスクを用い、これにより、チャンネル全体のインプラントを防止する一方、上記インプラントが単独でチャンネル端部に位置するようにする、請求項11に記載の方法。 - 第1ソース/ドレイン領域上に凹型第1ソース/ドレイン領域を形成し、第2ソース/ドレイン領域上に凹型第2ソース/ドレイン領域を形成する工程を含む、請求項6に記載の方法。
- 半導体装置の製造方法であって、
第1活性領域、第2活性領域、及び第1活性領域と第2活性領域との間の分離領域を有する半導体基板を準備する工程と、
半導体基板表面に、第1活性領域、第2活性領域、及び分離領域を横切って延びる凹部を形成する工程と、
上記凹部内にゲート誘電体を形成する工程と、
上記凹部にゲート電極を形成する工程と、
ゲート電極形成前に、第1及び第2活性領域における凹部の真下の領域中のドーパント濃度が最も高くなるようにチャンネル領域をドープする工程と、
ゲート電極形成後に、上記第1活性領域には、上記凹部の側壁領域におけるチャンネル領域に接触するように第1及び第2ソース/ドレイン領域を形成し、上記第2活性領域には、上記凹部の側壁領域におけるチャンネル領域に接触するように第3及び第4ソース/ドレイン領域を形成し、第1ソース/ドレイン領域が、ゲート電極により第2ソース/ドレイン領域と離間し、第3ソース/ドレイン領域が、ゲート電極により第4ソース/ドレイン領域と離間するようにする工程とを含み、
第1活性領域には、nドープ半導体が含まれており、第2活性領域には、pドープ半導体が含まれており、
上記ゲート誘電体は、チャンネル領域及び第1〜第4ソース/ドレイン領域が重なる領域と同じ厚さである、方法。 - 半導体装置の製造方法であって、
第1活性領域、第2活性領域、及び第1活性領域と第2活性領域との間の分離領域を有する半導体基板を準備する工程と、
半導体基板表面に、第1活性領域、第2活性領域、及び分離領域を横切って延びる凹部を形成する工程と、
上記凹部内にゲート誘電体を形成する工程と、
上記凹部にゲート電極を形成する工程と、
ゲート電極形成前に、第1及び第2活性領域における凹部の真下の領域中のドーパント濃度が最も高くなるようにチャンネル領域をドープする工程と、
ゲート電極形成後に、上記第1活性領域には、上記凹部の側壁領域におけるチャンネル領域に接触するように第1及び第2ソース/ドレイン領域を形成し、上記第2活性領域には、上記凹部の側壁領域におけるチャンネル領域に接触するように第3及び第4ソース/ドレイン領域を形成し、第1ソース/ドレイン領域が、ゲート電極により第2ソース/ドレイン領域と離間し、第3ソース/ドレイン領域が、ゲート電極により第4ソース/ドレイン領域と離間するようにする工程と、
第1ソース/ドレイン領域を第3ソース/ドレイン領域に電気的に接続する工程と、
第2ソース/ドレイン領域を第1電源電圧ノードに電気的に接続する工程と、
第4ソース/ドレイン領域を第2電源電圧ノードに電気的に接続する工程とを含み、
上記ゲート誘電体は、チャンネル領域及び第1〜第4ソース/ドレイン領域が重なる領域と同じ厚さである、方法。
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US7557032B2 (en) * | 2005-09-01 | 2009-07-07 | Micron Technology, Inc. | Silicided recessed silicon |
US7416943B2 (en) * | 2005-09-01 | 2008-08-26 | Micron Technology, Inc. | Peripheral gate stacks and recessed array gates |
US7687342B2 (en) * | 2005-09-01 | 2010-03-30 | Micron Technology, Inc. | Method of manufacturing a memory device |
US7867845B2 (en) * | 2005-09-01 | 2011-01-11 | Micron Technology, Inc. | Transistor gate forming methods and transistor structures |
US20070145495A1 (en) * | 2005-12-27 | 2007-06-28 | Intel Corporation | Method of fabricating a MOSFET transistor having an anti-halo for modifying narrow width device performance |
KR100720258B1 (ko) * | 2006-01-23 | 2007-05-23 | 주식회사 하이닉스반도체 | 반도체 소자의 형성 방법 |
TWI323498B (en) * | 2006-04-20 | 2010-04-11 | Nanya Technology Corp | Recessed gate mos transistor device and method of making the same |
JP4560820B2 (ja) * | 2006-06-20 | 2010-10-13 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
KR100816733B1 (ko) * | 2006-06-29 | 2008-03-25 | 주식회사 하이닉스반도체 | 반도체 소자의 리세스 게이트 제조 방법 |
US8652912B2 (en) * | 2006-12-08 | 2014-02-18 | Micron Technology, Inc. | Methods of fabricating a transistor gate including cobalt silicide |
KR100819562B1 (ko) * | 2007-01-15 | 2008-04-08 | 삼성전자주식회사 | 레트로그레이드 영역을 갖는 반도체소자 및 그 제조방법 |
US7859050B2 (en) * | 2007-01-22 | 2010-12-28 | Micron Technology, Inc. | Memory having a vertical access device |
TWI334198B (en) * | 2007-03-12 | 2010-12-01 | Nanya Technology Corp | Methods for forming a semiconductor device |
KR100811386B1 (ko) * | 2007-03-15 | 2008-03-07 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
JPWO2008117430A1 (ja) * | 2007-03-27 | 2010-07-08 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の製造方法、半導体装置 |
US7652339B2 (en) * | 2007-04-06 | 2010-01-26 | Xerox Corporation | Ambipolar transistor design |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
KR100899646B1 (ko) * | 2007-06-12 | 2009-05-27 | 삼성전자주식회사 | 반도체 소자 및 이를 형성하는 방법 |
US20090045458A1 (en) * | 2007-08-15 | 2009-02-19 | Advanced Micro Devices, Inc. | Mos transistors for thin soi integration and methods for fabricating the same |
US8012848B2 (en) * | 2007-08-16 | 2011-09-06 | International Business Machines Corporation | Trench isolation and method of fabricating trench isolation |
KR100924194B1 (ko) * | 2007-09-17 | 2009-10-29 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
WO2009058142A1 (en) * | 2007-10-31 | 2009-05-07 | Agere Systems, Inc. | Method to reduce trench capacitor leakage for random access memory device |
KR100920046B1 (ko) * | 2007-12-20 | 2009-10-07 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조방법 |
US7741630B2 (en) * | 2008-02-08 | 2010-06-22 | Qimonda Ag | Resistive memory element and method of fabrication |
DE102008008144A1 (de) * | 2008-02-08 | 2009-08-20 | Qimonda Ag | Resistives Speicherelement und Herstellungsverfahren |
JP2009253883A (ja) | 2008-04-10 | 2009-10-29 | Nippon Dempa Kogyo Co Ltd | 圧電振動デバイス |
US7932150B2 (en) * | 2008-05-21 | 2011-04-26 | Kabushiki Kaisha Toshiba | Lateral oxidation with high-K dielectric liner |
JP2010147392A (ja) * | 2008-12-22 | 2010-07-01 | Elpida Memory Inc | 半導体装置およびその製造方法 |
KR101544509B1 (ko) * | 2009-02-03 | 2015-08-13 | 삼성전자주식회사 | 트랜지스터를 갖는 반도체소자의 제조방법 |
JP5341639B2 (ja) * | 2009-06-26 | 2013-11-13 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
JP5464579B2 (ja) | 2009-08-28 | 2014-04-09 | 独立行政法人産業技術総合研究所 | リセスゲート型炭化珪素電界効果トランジスタおよびその製造方法 |
CN102034708B (zh) * | 2009-09-27 | 2012-07-04 | 无锡华润上华半导体有限公司 | 沟槽型dmos晶体管的制作方法 |
US8390063B2 (en) * | 2010-01-29 | 2013-03-05 | Broadcom Corporation | Semiconductor device having a lightly doped semiconductor gate and method for fabricating same |
KR101676818B1 (ko) | 2010-05-19 | 2016-11-17 | 삼성전자주식회사 | 게이트 구조를 포함하는 반도체 소자들 및 그 제조 방법 |
US8354703B2 (en) | 2010-07-15 | 2013-01-15 | International Business Machines Corporation | Semiconductor capacitor |
CN102403256B (zh) * | 2010-09-08 | 2014-02-26 | 上海华虹宏力半导体制造有限公司 | 赝埋层及制造方法、深孔接触及三极管 |
JP5729806B2 (ja) * | 2010-10-07 | 2015-06-03 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体装置および半導体装置の製造方法 |
TWI602303B (zh) * | 2011-01-26 | 2017-10-11 | 半導體能源研究所股份有限公司 | 半導體裝置及其製造方法 |
JP5450480B2 (ja) * | 2011-03-03 | 2014-03-26 | 株式会社東芝 | 半導体装置 |
JP5933300B2 (ja) * | 2011-03-16 | 2016-06-08 | 株式会社半導体エネルギー研究所 | 半導体装置 |
US8455365B2 (en) | 2011-05-19 | 2013-06-04 | Dechao Guo | Self-aligned carbon electronics with embedded gate electrode |
US20120292735A1 (en) | 2011-05-20 | 2012-11-22 | GLOBALFOUNDRIES Singapore Pte.Ltd. | Corner transistor suppression |
JP5583077B2 (ja) * | 2011-06-03 | 2014-09-03 | 株式会社東芝 | 半導体装置及びその製造方法 |
US8772118B2 (en) * | 2011-07-08 | 2014-07-08 | Texas Instruments Incorporated | Offset screen for shallow source/drain extension implants, and processes and integrated circuits |
US20130020652A1 (en) * | 2011-07-22 | 2013-01-24 | Shanghai Huali Microelectronics Corporation | Method for suppressing short channel effect of cmos device |
KR20130014200A (ko) * | 2011-07-29 | 2013-02-07 | 삼성전자주식회사 | 저항 변화 물질을 포함하는 반도체 소자 및 그 제조 방법 |
US8853700B2 (en) | 2011-08-10 | 2014-10-07 | International Business Machines Corporation | Cross-coupling of gate conductor line and active region in semiconductor devices |
US11315931B2 (en) | 2011-10-13 | 2022-04-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Embedded transistor |
US8853021B2 (en) * | 2011-10-13 | 2014-10-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Embedded transistor |
US9634134B2 (en) | 2011-10-13 | 2017-04-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Embedded transistor |
US8592921B2 (en) * | 2011-12-07 | 2013-11-26 | International Business Machines Corporation | Deep trench embedded gate transistor |
JP5881100B2 (ja) * | 2011-12-22 | 2016-03-09 | エスアイアイ・セミコンダクタ株式会社 | 半導体装置の製造方法 |
KR101270643B1 (ko) | 2012-07-20 | 2013-06-03 | 서울대학교산학협력단 | 터널링 전계 효과 트랜지스터 및 그 제조 방법 |
FR2995135B1 (fr) * | 2012-09-05 | 2015-12-04 | Commissariat Energie Atomique | Procede de realisation de transistors fet |
KR101617252B1 (ko) * | 2012-09-21 | 2016-05-02 | 삼성전자주식회사 | 트랜지스터의 형성 방법 및 이를 포함하는 반도체 장치의 제조 방법 |
US9601630B2 (en) * | 2012-09-25 | 2017-03-21 | Stmicroelectronics, Inc. | Transistors incorporating metal quantum dots into doped source and drain regions |
US9748356B2 (en) | 2012-09-25 | 2017-08-29 | Stmicroelectronics, Inc. | Threshold adjustment for quantum dot array devices with metal source and drain |
US8796751B2 (en) | 2012-11-20 | 2014-08-05 | Micron Technology, Inc. | Transistors, memory cells and semiconductor constructions |
US9184233B2 (en) * | 2013-02-27 | 2015-11-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for defect passivation to reduce junction leakage for finFET device |
TWI506766B (zh) * | 2013-03-27 | 2015-11-01 | Inotera Memories Inc | 半導體電子元件結構及其製造方法 |
TW201440118A (zh) * | 2013-04-11 | 2014-10-16 | Anpec Electronics Corp | 半導體功率元件的製作方法 |
TWI538023B (zh) | 2013-04-17 | 2016-06-11 | 華亞科技股份有限公司 | 具有凹入式閘極結構之記憶體單元及其製作方法 |
US8889541B1 (en) * | 2013-05-07 | 2014-11-18 | International Business Machines Corporation | Reduced short channel effect of III-V field effect transistor via oxidizing aluminum-rich underlayer |
US10002938B2 (en) | 2013-08-20 | 2018-06-19 | Stmicroelectronics, Inc. | Atomic layer deposition of selected molecular clusters |
JP5697115B2 (ja) * | 2013-11-05 | 2015-04-08 | 独立行政法人産業技術総合研究所 | リセスゲート型炭化珪素電界効果トランジスタ |
KR102191909B1 (ko) * | 2014-02-17 | 2020-12-18 | 에스케이하이닉스 주식회사 | 안티 퓨즈 및 그 제조 방법 |
FR3018139B1 (fr) | 2014-02-28 | 2018-04-27 | Stmicroelectronics (Rousset) Sas | Circuit integre a composants, par exemple transistors nmos, a regions actives a contraintes en compression relachees |
US9640656B2 (en) * | 2014-04-04 | 2017-05-02 | Micron Technology, Inc. | Transistors having strained channel under gate in a recess |
US11351437B2 (en) * | 2014-05-16 | 2022-06-07 | Jin Song | Impedance-based impact determination and scoring |
US9425210B2 (en) * | 2014-08-13 | 2016-08-23 | SK Hynix Inc. | Double-source semiconductor device |
KR20160020210A (ko) * | 2014-08-13 | 2016-02-23 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
CN105448917B (zh) | 2014-09-01 | 2019-03-29 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
US9786657B1 (en) * | 2016-04-04 | 2017-10-10 | Globalfoundries Inc. | Semiconductor structure including a transistor including a gate electrode region provided in a substrate and method for the formation thereof |
KR20180063947A (ko) | 2016-12-02 | 2018-06-14 | 삼성전자주식회사 | 반도체 메모리 소자 |
WO2018111247A1 (en) * | 2016-12-13 | 2018-06-21 | Intel Corporation | Passivation dielectrics for oxide semiconductor thin film transistors |
US10388746B2 (en) | 2017-07-06 | 2019-08-20 | Teledyne Scientific & Imaging, Llc | FET with buried gate structure |
KR102438374B1 (ko) * | 2017-09-22 | 2022-08-30 | 삼성전자주식회사 | 반도체 장치 |
US11527531B2 (en) * | 2018-09-28 | 2022-12-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Recessed gate for an MV device |
US11616057B2 (en) | 2019-03-27 | 2023-03-28 | Intel Corporation | IC including back-end-of-line (BEOL) transistors with crystalline channel material |
US11844989B2 (en) * | 2019-12-09 | 2023-12-19 | Jin Song | Impact sensor embedded protector with nine-axis inertial measurement unit for scoring combative sports |
US11883731B2 (en) * | 2019-12-09 | 2024-01-30 | Tyler Delarosa | Martial arts training device with scoring system |
CN111326509B (zh) * | 2020-03-03 | 2023-06-30 | 中国科学院微电子研究所 | 包括电容器的半导体装置及其制造方法及电子设备 |
CN111900205A (zh) * | 2020-06-22 | 2020-11-06 | 中国科学院微电子研究所 | 晶体管及其制备方法 |
CN113782613A (zh) * | 2021-09-29 | 2021-12-10 | 捷捷微电(无锡)科技有限公司 | 一种新型分离栅mosfet器件 |
CN116190424B (zh) * | 2022-10-25 | 2024-03-15 | 北京超弦存储器研究院 | 一种半导体器件及其制作方法 |
Family Cites Families (99)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2569055B1 (fr) * | 1984-08-07 | 1986-12-12 | Commissariat Energie Atomique | Circuit integre cmos et procede de fabrication de zones d'isolation electriques dans ce circuit integre |
JPH01174527A (ja) | 1987-12-28 | 1989-07-11 | Mitsui Petrochem Ind Ltd | イミド系プレポリマー |
US5021359A (en) * | 1988-06-21 | 1991-06-04 | Harris Corporation | Radiation hardened complementary transistor integrated circuits |
JPH0294477A (ja) * | 1988-09-30 | 1990-04-05 | Toshiba Corp | 半導体装置及びその製造方法 |
JPH04335538A (ja) * | 1991-05-10 | 1992-11-24 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
KR940002400B1 (ko) | 1991-05-15 | 1994-03-24 | 금성일렉트론 주식회사 | 리세스 게이트를 갖는 반도체장치의 제조방법 |
JPH06342806A (ja) | 1992-02-28 | 1994-12-13 | Sony Corp | 埋め込みゲート型mosトランジスタ |
JPH05343676A (ja) | 1992-06-05 | 1993-12-24 | Nec Corp | 電界効果トランジスタとその製造方法 |
WO1994014198A1 (en) * | 1992-12-11 | 1994-06-23 | Intel Corporation | A mos transistor having a composite gate electrode and method of fabrication |
JPH06244415A (ja) * | 1993-02-17 | 1994-09-02 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP3311070B2 (ja) | 1993-03-15 | 2002-08-05 | 株式会社東芝 | 半導体装置 |
US5563801A (en) * | 1993-10-06 | 1996-10-08 | Nsoft Systems, Inc. | Process independent design for gate array devices |
JPH07153952A (ja) * | 1993-11-30 | 1995-06-16 | Sony Corp | 半導体装置及びその製造方法 |
US5366911A (en) | 1994-05-11 | 1994-11-22 | United Microelectronics Corporation | VLSI process with global planarization |
US5506431A (en) * | 1994-05-16 | 1996-04-09 | Thomas; Mammen | Double poly trenched channel accelerated tunneling electron (DPT-CATE) cell, for memory applications |
US5380671A (en) | 1994-06-13 | 1995-01-10 | United Microelectronics Corporation | Method of making non-trenched buried contact for VLSI devices |
US5429970A (en) * | 1994-07-18 | 1995-07-04 | United Microelectronics Corporation | Method of making flash EEPROM memory cell |
JP3155894B2 (ja) | 1994-09-29 | 2001-04-16 | 株式会社東芝 | 半導体装置およびその製造方法 |
US5683924A (en) * | 1994-10-31 | 1997-11-04 | Sgs-Thomson Microelectronics, Inc. | Method of forming raised source/drain regions in a integrated circuit |
US5953602A (en) * | 1995-05-26 | 1999-09-14 | Lg Semicon Co., Ltd. | EEPROM cell and related method of making thereof |
US5818098A (en) * | 1996-02-29 | 1998-10-06 | Motorola, Inc. | Semiconductor device having a pedestal |
DE69631879D1 (de) * | 1996-04-30 | 2004-04-22 | St Microelectronics Srl | Herstellungsverfahren für einen integrierten Dickoxydtransistor |
US5734603A (en) * | 1997-02-10 | 1998-03-31 | Powerchip Semiconductor Corp. | Method and circuit for reducing cell plate noise |
US5914553A (en) | 1997-06-16 | 1999-06-22 | Cornell Research Foundation, Inc. | Multistable tunable micromechanical resonators |
JP4160167B2 (ja) * | 1997-06-30 | 2008-10-01 | 株式会社東芝 | 半導体装置の製造方法 |
US5994736A (en) | 1997-09-22 | 1999-11-30 | United Microelectronics Corporation | Semiconductor device having buried gate electrode with silicide layer and manufacture method thereof |
US6294194B1 (en) | 1997-10-14 | 2001-09-25 | Boehringer Ingelheim Pharmaceuticals, Inc. | Method for extraction and reaction using supercritical fluids |
US6002151A (en) * | 1997-12-18 | 1999-12-14 | Advanced Micro Devices, Inc. | Non-volatile trench semiconductor device |
US5998835A (en) * | 1998-02-17 | 1999-12-07 | International Business Machines Corporation | High performance MOSFET device with raised source and drain |
US6097061A (en) | 1998-03-30 | 2000-08-01 | Advanced Micro Devices, Inc. | Trenched gate metal oxide semiconductor device and method |
US6355955B1 (en) * | 1998-05-14 | 2002-03-12 | Advanced Micro Devices, Inc. | Transistor and a method for forming the transistor with elevated and/or relatively shallow source/drain regions to achieve enhanced gate electrode formation |
US6093947A (en) * | 1998-08-19 | 2000-07-25 | International Business Machines Corporation | Recessed-gate MOSFET with out-diffused source/drain extension |
US6239472B1 (en) * | 1998-09-01 | 2001-05-29 | Philips Electronics North America Corp. | MOSFET structure having improved source/drain junction performance |
US6303448B1 (en) * | 1998-11-05 | 2001-10-16 | Taiwan Semiconductor Manufacturing Company | Method for fabricating raised source/drain structures |
JP2000208762A (ja) | 1999-01-13 | 2000-07-28 | Sony Corp | 絶縁ゲ―ト電界効果トランジスタおよびその製造方法 |
US6287926B1 (en) | 1999-02-19 | 2001-09-11 | Taiwan Semiconductor Manufacturing Company | Self aligned channel implant, elevated S/D process by gate electrode damascene |
US6351009B1 (en) | 1999-03-01 | 2002-02-26 | Fairchild Semiconductor Corporation | MOS-gated device having a buried gate and process for forming same |
US6333217B1 (en) * | 1999-05-14 | 2001-12-25 | Matsushita Electric Industrial Co., Ltd. | Method of forming MOSFET with channel, extension and pocket implants |
US6214670B1 (en) * | 1999-07-22 | 2001-04-10 | Taiwan Semiconductor Manufacturing Company | Method for manufacturing short-channel, metal-gate CMOS devices with superior hot carrier performance |
JP4654395B2 (ja) | 1999-07-23 | 2011-03-16 | 独立行政法人情報通信研究機構 | 半導体装置の製造方法 |
US6169003B1 (en) | 1999-08-16 | 2001-01-02 | Taiwan Semiconductor Manufacturing Company | Method for forming a MOS device with an elevated source and drain, and having a self-aligned channel input |
TW449836B (en) * | 1999-09-06 | 2001-08-11 | Winbond Electronics Corp | Manufacturing method and device for forming anti-punch-through region by large-angle-tilt implantation |
US6087235A (en) | 1999-10-14 | 2000-07-11 | Advanced Micro Devices, Inc. | Method for effective fabrication of a field effect transistor with elevated drain and source contact structures |
JP4860022B2 (ja) | 2000-01-25 | 2012-01-25 | エルピーダメモリ株式会社 | 半導体集積回路装置の製造方法 |
US6333230B1 (en) * | 2000-05-15 | 2001-12-25 | International Business Machines Corporation | Scalable high-voltage devices |
US6309933B1 (en) * | 2000-06-05 | 2001-10-30 | Chartered Semiconductor Manufacturing Ltd. | Method of fabricating T-shaped recessed polysilicon gate transistors |
US6570218B1 (en) | 2000-06-19 | 2003-05-27 | International Rectifier Corporation | MOSFET with a buried gate |
FR2810792B1 (fr) | 2000-06-22 | 2003-07-04 | Commissariat Energie Atomique | Transistor mos vertical a grille enterree et procede de fabrication de celui-ci |
US6445035B1 (en) | 2000-07-24 | 2002-09-03 | Fairchild Semiconductor Corporation | Power MOS device with buried gate and groove |
KR100370129B1 (ko) * | 2000-08-01 | 2003-01-30 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조방법 |
KR100892788B1 (ko) | 2000-08-29 | 2009-04-10 | 보이스 스테이트 유니버시티 | 다마신 이중 게이트형 트랜지스터 및 관련 제조 방법 |
US6358800B1 (en) | 2000-09-18 | 2002-03-19 | Vanguard International Semiconductor Corporation | Method of forming a MOSFET with a recessed-gate having a channel length beyond photolithography limit |
US6391720B1 (en) * | 2000-09-27 | 2002-05-21 | Chartered Semiconductor Manufacturing Ltd. | Process flow for a performance enhanced MOSFET with self-aligned, recessed channel |
JP2002158355A (ja) | 2000-11-20 | 2002-05-31 | Nec Kansai Ltd | 半導体装置およびその製造方法 |
US6555872B1 (en) * | 2000-11-22 | 2003-04-29 | Thunderbird Technologies, Inc. | Trench gate fermi-threshold field effect transistors |
JP2002184957A (ja) | 2000-12-13 | 2002-06-28 | Sony Corp | 半導体装置およびその製造方法 |
JP2002217310A (ja) * | 2001-01-18 | 2002-08-02 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2002270846A (ja) * | 2001-03-12 | 2002-09-20 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US6465836B2 (en) | 2001-03-29 | 2002-10-15 | Taiwan Semiconductor Manufacturing Co., Ltd | Vertical split gate field effect transistor (FET) device |
US6498062B2 (en) * | 2001-04-27 | 2002-12-24 | Micron Technology, Inc. | DRAM access transistor |
JP2002343963A (ja) * | 2001-05-17 | 2002-11-29 | Sony Corp | 溝ゲート型電界効果トランジスタ及びその製造方法 |
US6413829B1 (en) | 2001-06-01 | 2002-07-02 | Advanced Micro Devices, Inc. | Field effect transistor in SOI technology with schottky-contact extensions |
US20020197810A1 (en) * | 2001-06-21 | 2002-12-26 | International Business Machines Corporation | Mosfet having a variable gate oxide thickness and a variable gate work function, and a method for making the same |
DE10129958B4 (de) * | 2001-06-21 | 2006-07-13 | Infineon Technologies Ag | Speicherzellenanordnung und Herstellungsverfahren |
JP2003133546A (ja) | 2001-10-26 | 2003-05-09 | Sharp Corp | 半導体装置及びその製造方法 |
JP2003179223A (ja) | 2001-12-12 | 2003-06-27 | Sony Corp | トレンチゲート型半導体装置およびその製造方法 |
US6747318B1 (en) | 2001-12-13 | 2004-06-08 | Lsi Logic Corporation | Buried channel devices and a process for their fabrication simultaneously with surface channel devices to produce transistors and capacitors with multiple electrical gate oxides |
KR20030050995A (ko) | 2001-12-20 | 2003-06-25 | 동부전자 주식회사 | 고집적 트랜지스터의 제조 방법 |
US6660598B2 (en) * | 2002-02-26 | 2003-12-09 | International Business Machines Corporation | Method of forming a fully-depleted SOI ( silicon-on-insulator) MOSFET having a thinned channel region |
JP3937894B2 (ja) | 2002-04-04 | 2007-06-27 | ソニー株式会社 | 半導体装置 |
US6677646B2 (en) * | 2002-04-05 | 2004-01-13 | International Business Machines Corporation | Method and structure of a disposable reversed spacer process for high performance recessed channel CMOS |
JP4026416B2 (ja) | 2002-06-04 | 2007-12-26 | ソニー株式会社 | 半導体装置および半導体装置の製造方法 |
US6900500B2 (en) | 2002-08-21 | 2005-05-31 | Micron Technology, Inc. | Buried transistors for silicon on insulator technology |
KR100500443B1 (ko) * | 2002-12-13 | 2005-07-12 | 삼성전자주식회사 | 리세스된 게이트 전극을 갖는 모스 트랜지스터 및 그제조방법 |
KR100521369B1 (ko) * | 2002-12-18 | 2005-10-12 | 삼성전자주식회사 | 고속도 및 저전력 소모 반도체 소자 및 그 제조 방법 |
JP4604444B2 (ja) | 2002-12-24 | 2011-01-05 | トヨタ自動車株式会社 | 埋設ゲート型半導体装置 |
DE10261145A1 (de) | 2002-12-27 | 2004-07-22 | Advanced Micro Devices, Inc., Sunnyvale | Verbesserter Transistor mit abgesenktem Gate und ein Verfahren zur Herstellung desselben |
KR100498476B1 (ko) | 2003-01-11 | 2005-07-01 | 삼성전자주식회사 | 리세스 채널 mosfet 및 그 제조방법 |
KR100499159B1 (ko) | 2003-02-28 | 2005-07-01 | 삼성전자주식회사 | 리세스 채널을 갖는 반도체장치 및 그 제조방법 |
JP2004296491A (ja) | 2003-03-25 | 2004-10-21 | Sanyo Electric Co Ltd | 半導体装置 |
JP2004335538A (ja) | 2003-04-30 | 2004-11-25 | Seiko Epson Corp | 半導体装置及びその製造方法 |
KR100459872B1 (ko) | 2003-05-07 | 2004-12-03 | 삼성전자주식회사 | 트렌치 게이트를 갖는 매몰 채널형 트랜지스터 및 그제조방법 |
DE10333776B4 (de) | 2003-07-24 | 2005-06-30 | Infineon Technologies Ag | Verfahren zur Herstellung einer Gate-Struktur eines FETs |
US7015547B2 (en) * | 2003-07-03 | 2006-03-21 | American Semiconductor, Inc. | Multi-configurable independently multi-gated MOSFET |
KR100511045B1 (ko) | 2003-07-14 | 2005-08-30 | 삼성전자주식회사 | 리세스된 게이트 전극을 갖는 반도체 소자의 집적방법 |
JP3793190B2 (ja) * | 2003-09-19 | 2006-07-05 | 株式会社東芝 | 半導体装置の製造方法 |
US6963108B1 (en) * | 2003-10-10 | 2005-11-08 | Advanced Micro Devices, Inc. | Recessed channel |
KR100500473B1 (ko) | 2003-10-22 | 2005-07-12 | 삼성전자주식회사 | 반도체 소자에서의 리세스 게이트 트랜지스터 구조 및형성방법 |
JP4567969B2 (ja) * | 2003-10-28 | 2010-10-27 | 東部エレクトロニクス株式会社 | 半導体素子のトランジスタ製造方法 |
KR100518606B1 (ko) | 2003-12-19 | 2005-10-04 | 삼성전자주식회사 | 실리콘 기판과 식각 선택비가 큰 마스크층을 이용한리세스 채널 어레이 트랜지스터의 제조 방법 |
WO2005074502A2 (en) | 2004-01-21 | 2005-08-18 | The Regents Of The University Of Michigan | High-q micromechanical resonator devices and filters utilizing same |
KR100618861B1 (ko) * | 2004-09-09 | 2006-08-31 | 삼성전자주식회사 | 로컬 리세스 채널 트랜지스터를 구비하는 반도체 소자 및그 제조 방법 |
US7279368B2 (en) * | 2005-03-04 | 2007-10-09 | Cree, Inc. | Method of manufacturing a vertical junction field effect transistor having an epitaxial gate |
US8338887B2 (en) | 2005-07-06 | 2012-12-25 | Infineon Technologies Ag | Buried gate transistor |
JP5027406B2 (ja) | 2005-12-01 | 2012-09-19 | 帝人株式会社 | 改質ポリエチレンナフタレート樹脂組成物の製造方法 |
KR100721245B1 (ko) * | 2005-12-29 | 2007-05-22 | 동부일렉트로닉스 주식회사 | 트랜지스터 소자 및 형성 방법 |
KR100791342B1 (ko) * | 2006-08-09 | 2008-01-03 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
US7639104B1 (en) | 2007-03-09 | 2009-12-29 | Silicon Clocks, Inc. | Method for temperature compensation in MEMS resonators with isolated regions of distinct material |
TWI419266B (zh) * | 2007-07-03 | 2013-12-11 | Nanya Technology Corp | 半導體裝置之製造方法 |
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DE102006062838B4 (de) | 2015-06-18 |
US20130059424A1 (en) | 2013-03-07 |
US20130049090A1 (en) | 2013-02-28 |
US20070007571A1 (en) | 2007-01-11 |
US8338887B2 (en) | 2012-12-25 |
JP2007019513A (ja) | 2007-01-25 |
US9059141B2 (en) | 2015-06-16 |
US8796762B2 (en) | 2014-08-05 |
DE102006029281B4 (de) | 2013-01-17 |
JP2012089849A (ja) | 2012-05-10 |
DE102006029281A1 (de) | 2007-02-22 |
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