JP2009524242A5 - - Google Patents

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JP2009524242A5
JP2009524242A5 JP2008551316A JP2008551316A JP2009524242A5 JP 2009524242 A5 JP2009524242 A5 JP 2009524242A5 JP 2008551316 A JP2008551316 A JP 2008551316A JP 2008551316 A JP2008551316 A JP 2008551316A JP 2009524242 A5 JP2009524242 A5 JP 2009524242A5
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layer
opening
protective layer
forming
gate electrode
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JP5203220B2 (ja
JP2009524242A (ja
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Priority claimed from US11/493,069 external-priority patent/US7709269B2/en
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JP2008551316A 2006-01-17 2007-01-16 支持されたゲート電極を備えるトランジスタの作製方法およびそれに関連するデバイス Active JP5203220B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US11/333,726 US7592211B2 (en) 2006-01-17 2006-01-17 Methods of fabricating transistors including supported gate electrodes
US11/333,726 2006-01-17
US11/493,069 US7709269B2 (en) 2006-01-17 2006-07-26 Methods of fabricating transistors including dielectrically-supported gate electrodes
US11/493,069 2006-07-26
PCT/US2007/001045 WO2007084465A1 (en) 2006-01-17 2007-01-16 Methods of fabricating transistors including supported gate electrodes and related devices

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JP2012237917A Division JP5805608B2 (ja) 2006-01-17 2012-10-29 支持されたゲート電極を備えるトランジスタの作製方法およびそれに関連するデバイス

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JP2009524242A JP2009524242A (ja) 2009-06-25
JP2009524242A5 true JP2009524242A5 (enExample) 2012-03-22
JP5203220B2 JP5203220B2 (ja) 2013-06-05

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JP2012237917A Active JP5805608B2 (ja) 2006-01-17 2012-10-29 支持されたゲート電極を備えるトランジスタの作製方法およびそれに関連するデバイス

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US (2) US7709269B2 (enExample)
EP (1) EP1974373B1 (enExample)
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WO (1) WO2007084465A1 (enExample)

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US9536966B2 (en) 2014-12-16 2017-01-03 Transphorm Inc. Gate structures for III-N devices
US9590060B2 (en) 2013-03-13 2017-03-07 Transphorm Inc. Enhancement-mode III-nitride devices

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