CN1343086A - 电路装置及其制造方法 - Google Patents

电路装置及其制造方法 Download PDF

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Publication number
CN1343086A
CN1343086A CN01116595A CN01116595A CN1343086A CN 1343086 A CN1343086 A CN 1343086A CN 01116595 A CN01116595 A CN 01116595A CN 01116595 A CN01116595 A CN 01116595A CN 1343086 A CN1343086 A CN 1343086A
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Prior art keywords
circuit
manufacture method
forms
foregoing
circuit arrangement
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CN01116595A
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CN1246901C (zh
Inventor
坂本则明
小林义幸
阪本纯次
真下茂明
大川克实
前原荣寿
高桥幸嗣
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Priority claimed from JP2000022646A external-priority patent/JP3574025B2/ja
Priority claimed from JP2000024047A external-priority patent/JP3574026B2/ja
Priority claimed from JP2000032417A external-priority patent/JP3691328B2/ja
Priority claimed from JP2000032454A external-priority patent/JP2001223318A/ja
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN1343086A publication Critical patent/CN1343086A/zh
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Publication of CN1246901C publication Critical patent/CN1246901C/zh
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Abstract

在于导电箔(60)上形成分离槽(54)之后,装配电路元件,以该导电箔(60)作为支承主板,覆盖绝缘性树脂(50),在将其反转之后,将绝缘性树脂(50)作为支承主板,对导电箔进行研磨,作为电路分离。因此,在不采用支承主板的情况下,可获得电路(50),电路元件(52)支承于绝缘性树脂(50)上的电路装置。另外,电路上,具有绝对必要的导线(L1～L3),由于具有弯曲结构(59)或凸缘(58),可防止脱落。

Description

电路装置及其制造方法
本发明涉及电路装置及其制造方法，特别是涉及无需支承主板的薄型的电路装置及其制造方法。
在过去，由于设置于电子设备中的电路装置用于便携式电话，携带用的计算机等，故要求实现小型，薄型和轻质。
比如，如果电路装置以半导体装置为实例进行描述，则作为一般的半导体装置，包括有通过过去通常的递模法密封的包装型半导体装置。如图24所示，该半导体装置1装配于印刷电路主板PS上。
另外，在该包装型半导体装置中，通过树脂层3覆盖半导体片2的周围，从该树脂层3的侧部，引出外部连接用的引线端子4。
但是，该包装型半导体装置1中的引线端子4从树脂层3向外伸出，整体尺寸较大，无法满足小型，薄型和轻质的要求。
为此，各公司竞相开发了可实现小型，薄型和轻质的各种结构，在最近，开发了称为CSP(chip size package)，与芯片尺寸相等的硅片大小的CSP，或其尺寸稍大于芯片尺寸的CSP。
图25表示支承主板采用玻璃环氧树脂主板5的，其尺寸稍大于芯片尺寸的CSP6。在这里，对在玻璃环氧树脂主板5上装配晶体管芯片T的形式进行描述。
在此玻璃环氧树脂主板5的表面上，形成第1电极7，第2电极8和压料垫9，在内面，形成第1内面电极10和第2内面电极11。此外，通过通孔TH，第1电极7和第1内面电极10，第2电极8和第2内面电极11实现导通。还有，在压料垫9上，固定有上述裸露的晶体管芯片T，晶体三极管的发射极与第1电极7通过金属丝12连接，晶体三极管的基极与第2电极8通过金属丝12连接。此外，在玻璃环氧树脂主板5上，按照覆盖晶体管芯片T的方式，设置有树脂层13。
上述CSP6采用玻璃环氧树脂主板5，但是与硅片大小的CSP不同，其具有从芯片到外部连接用的内面电极10，11的延伸结构简单，可以较低的价格制造。
另外，如图24所示，上述CSP6装配于印刷电路主板PS上。在印刷电路主板PS上，设置有构成电路的电极，导线，上述CSP6，包装型半导体装置1，片状电阻器CR或片状电容器CC等按照导通的方式固定。
此外，由该印刷电路主板形成的电路安装于各种装置中。
下面参照图26和图27，对CSP的制造方法进行描述。此外，在图27中，参照中间的ガラェポ/薄片主板的流程图。
首先，作为基材(支承主板)，制备玻璃环氧树脂主板5，在其两个表面，通过绝缘性粘接剂，压接Cu箔20，21(以上情况参照图26A)。
接着，在第1电极7，第2电极8，压料垫9，第1内面电极10和第2内面电极11所对应的Cu箔20，21上，覆盖耐蚀刻性的保护层22，对Cu箔20，21制作图案。此外，图案的制作也分别在内外面进行(以上情况参照图26B)。
然后，采用钻头或激光，在上述玻璃环氧树脂主板上，形成通孔TH用的孔，对该孔进行电镀，形成通孔TH。通过该通孔TH，第1电极7和第1内面电极10，第2电极8与第2内面电极10实现导通(以上情况参照图26C)。
还有，虽然在图中省略，对形成焊接柱的第1电极7，第2电极8进行镀Ni或镀金处理，对形成管芯焊接柱的压料垫9，进行Au电镀处理，对晶体管芯片T进行管芯焊接。
最后，通过金属丝，将晶体管芯片T的发射极与第1电极7，晶体三极管T的基极与第2电极8连接，覆盖树脂13(以上情况参照图26D)。
此外，根据需要，进行切割，相应的电子元件实现断开。在图26中，在上述玻璃环氧树脂主板5中，晶体管芯片T仅仅设置1个，但是实际上，呈矩阵状设置多个晶体三极管T。由此，通过切割装置，将它们分别断开。
通过上述的制造方法，完成采用支承主板的CSP型的电子元件。该制造方法即使在支承主板采用柔性片的情况下，也是同样的。
图27的左侧的流程表示采用陶瓷主板的制造方法。在制备作为支承主板的陶瓷主板后，形成通孔，此后，采用导电膏，对内外的电极进行涂刷，进行烧结。此后，在覆盖前述制造方法的树脂层之前，与图26的制造方法相同，但是，陶瓷主板非常脆，与柔性片或玻璃环氧树脂主板不同，由于形成缺口，故具有不能够直接采用模具进行模制的问题。为此，对密封树脂进行浇注，使其硬化，之后，进行使密封树脂呈平直状的研磨处理，最后，采用切割装置，分别分离。
在图25中，晶体管芯片T，连接机构7～12和树脂层13在与外部的连接，晶体三极管的保护方面，是必要的组成元件，但是，通过仅仅为这样的组成元件，难于提供实现小型，薄型，轻质的电路装置。
还有，形成支承主板的玻璃环氧树脂主板5按照前述的方式，本来是不需要的。但是，在制造方法方面，由于使电极贴合，故将该主板5用作支承主板，不能够取消该玻璃环氧树脂主板5。
为此，由于采用该玻璃环氧树脂主板5，故成本上升，另外由于该玻璃环氧树脂主板5的厚度较大，故电路装置的厚度较大，在实现小型，薄型，轻质的方面受到限制。
再有，在玻璃环氧树脂主板或陶瓷主板上，将两个表面上的电极连接的通孔形成步骤是不可缺少的，另外还具有制造步骤较长的问题。
图28表示形成于玻璃环氧树脂主板，陶瓷主板或金属主板等上的图案。在该图案中，一般形成IC电路，装配有晶体管芯片21，IC芯片22，片状电容器23和/或片状电阻器24。在该晶体管芯片21或IC芯片22的周围，形成与导线25成一体的焊接点26，通过金属丝28，芯片21，22与焊接点实现导通。此外，导线29与外部引线片30成一体形成。这些导线25，29在主板中弯曲，同时延伸，根据需要，在IC芯片中，该导线最细。于是，该较细的导线与主板的粘接面积非常少，具有导线剥离，或翘曲的问题。此外，焊接点26具有电源用的焊接点与小信号用的焊接点，特别是小信号用的焊接点是造成焊接面积较小，膜剥离的原因。
另外，在外部引线片上，固定外部引线，但是还具有由于作用于外部引线上的外力的作用，外部引线片剥离的问题。
本发明是针对上述情况而提出的，本发明的目的在于提供一种制造容易，高精度的，并且可靠性较高的半导体装置。
本发明的特征在于其包括多个电路；电路元件，其连接于上述电路上；包装件，其由绝缘性树脂形成，该包装件覆盖上述电路元件和上述电路，成整体支承上述电路元件和电路；外部连接用的引线端子，其在上述包装件的一个主面露出。
最好，该装置的特征在于上述电路由金属轧制体形成。
另外，在本发明中，由于作为形成电路图案的导电性板，以1块板状体作为初始材料，通过对其进行冲压加工或半蚀刻加工，形成分离槽，形成电路图案，故可形成电阻较小，缜密的，并且表面平整度较高的电路。于是，即使在焊接精度较高，高集成度的电路装置的装配的情况下，仍可获得高精度，以及高可靠性。
此外，特别是由于采用金属的轧制体，故晶粒边界无规律地设置，可形成板的电阻较小，缜密的，并且表面平整度从微观上讲较高的电路。
随便说一下，在镀膜的场合，当电路按照可获得足够的膜厚的方式较厚地形成时，膜厚的误差较大，不能够获得表面的足够的平整性。如果打算形成比如，20～100微米的镀膜，则膜厚的误差较大，焊接强度大幅度降低。与此相对，按照本发明，在通过蚀刻方式形成铜等的轧制金属的场合，可获得极平整的，焊接强度和焊接精度较高的电路装置。
但是，在镀膜的场合，如果通过以电镀生长面作为镜面，去除支承体，通过将生长面侧作为焊接面的方式进行使用，则可改善平整性，虽然其改善程度很小。但是，与采用铜等金属轧制体的场合相比较，其精度大幅度降低。
还有，具有下述优点。可抵抗由于薄型图案特有的翘曲而造成的应力。另外，可防止由于扩散等因素所产生的导通连接部的污染。此外，由于刚性提高，故具有使作业性提高等的优点。
比如，由于通过以铁镍为主成分的轧制体形成上述电路，故获得可防止热膨胀系数的不一致的效果。这是因为硅片与Fe—Ni的热膨胀系数的值非常接近。于是，即使在芯片较大的情况下，仍可防止翘曲的发生。
再有，由于上述电路由以铝为主成分的轧制体形成，故与Cu，Fe—Ni相比较，可减轻重量。在使用Al丝或Au丝的场合，获得在不借助镀膜的情况下，可进行焊接的效果。
另外，由于晶粒边界按照电路表面呈平直状的方式无规则地设置，故获得抗弯曲性，刚性提高，可防止电路性能变差的效果。
此外，由于在上述电路中的电路元件放置面上，形成由与上述电路不同的金属材料构成的导电膜。故可防止应力造成的电路的翘曲，断线，同时，可提高管芯焊接与元件之间的导通连接部的可靠性。
还有，由于上述导电膜由镍镀层形成，故可实现Al丝的焊接，同时可形成具有强度的凸缘。
再有，比如，第1，形成下述方案，其包括断开的多个电路；多个电路元件，该多个电路元件固定于所需的该电路上；绝缘性树脂，其覆盖该电路元件，并且成一体支承上述电路，在上述多个电路内部，至少一个作为通过上述多个电路元件构成电路的导线设置，使其侧面弯曲，与上述绝缘性树脂嵌合，由此形成使组成元件达到最小量，并且导线不与上述绝缘性树脂脱开的结构，从而解决已有的课题。
第2，形成下述方案，其包括断开的多个电路；多个电路元件，该多个电路元件固定于所需的该电路上；绝缘性树脂，其覆盖该电路元件，并且填充于电路之间的分离槽中而成一体支承上述电路，在上述多个电路内部，至少一个作为通过上述多个电路元件构成电路的导线设置，使其侧面弯曲，与上述绝缘性树脂嵌合，由此，通过填充于分离槽中的绝缘性树脂，成一体支承多个电路，特别是防止导线的脱落，从而解决已有的课题。
第3，形成下述方案，其包括断开的多个电路；多个电路元件，该多个电路元件固定于所需的该电路上；绝缘性树脂，其覆盖该电路元件，并且填充于上述电路之间的分离槽中，使上述电路的内面露出而成一体支承上述电路，在上述多个电路内部，至少一个作为通过上述多个电路元件构成电路的导线设置，使其侧面弯曲，与上述绝缘性树脂嵌合，由此，电路的内面灵活地用作外部连接用的电极，这样，在可无需通孔的同时，还防止作为电路中的一个的导线的脱落，从而解决已有的课题。
第4，形成下述方案，其提供下述电路装置的制造方法，该方法的特征在于其包括下述步骤：
制备导电箔，按照至少除了形成电路的区域以外的上述导电箔上，形成其深度小于上述导电箔的厚度的分离槽，形成侧面弯曲电路；
将多个电路元件固定于所需的上述电路上；
按照覆盖上述电路元件，填充于上述分离槽中的方式，通过绝缘性树脂进行模制，使上述电路与上述绝缘性树脂嵌合；
去除未设置分离槽的厚度部分的上述导电箔，形成至少通过上述多个电路和上述多个电路元件而构成的电路，由此，形成电路的导电箔为起始材料，在对绝缘性树脂进行模制之前，导电箔具有支承性能，由于在模制后，绝缘性树脂具有支承性能，故可无需支承主板，从而解决已有的课题。
第5，形成下述的方案，该方案提供下述电路装置的制造方法，该方法的特征在于其包括下述步骤：
制备导电箔，按照至少除了形成电路的区域以外的上述导电箔上，形成其深度小于上述导电箔的厚度的分离槽，形成侧面弯曲电路；
将多个电路元件固定于所需的上述电路上；
形成将上述电路元件的电极与所需的电路导通的连接机构；
按照覆盖上述电路元件，填充于上述分离槽中的方式，通过绝缘性树脂进行模制，使上述电路与上述绝缘性树脂嵌合；
从内面同样地去除未设置分离槽的厚度部分的上述导电箔，使上述电路的内面与上述分离槽之间的绝缘性树脂实质上为平直面，形成至少通过上述多个电路和上述多个电路元件而构成的电路，由此，可多个地，大批量地生产抑制脱落的，具有较细的导线的电路装置，从而解决已有的课题。
另外，按照本发明，由于作为形成电路图案的导电性板，以1块板状体作为初始材料，通过对其进行冲压加工或半蚀刻加工，形成分离槽，形成电路图案，故可形成电阻较小，缜密的，并且表面平整度较高的电路。于是，即使在焊接精度较高，高集成度的电路装置的装配的情况下，仍可获得高精度，以及高可靠性。
此外，特别是由于采用金属的轧制体，故晶粒边界无规律地设置，可形成板的电阻较小，缜密的，并且表面平整度从微观上讲较高的电路。
随便说一下，在镀膜的场合，当电路按照可获得足够的膜厚的方式较厚地形成时，膜厚的误差较大，不能够获得表面的足够的平整性。如果打算形成比如，20～35微米的镀膜，则膜厚的误差较大，焊接强度大幅度降低。与此相对，按照本发明，在通过蚀刻方式形成铜等的轧制金属的场合，可获得极平整的，焊接强度和焊接精度较高的电路装置。
图1为说明本发明的电路装置的图；
图2为说明本发明的电路装置的图；
图3为说明本发明的电路装置的制造方法的图；
图4为说明本发明的电路装置的制造方法的图；
图5为说明本发明的电路装置的制造方法的图；
图6为说明本发明的电路装置的制造方法的图；
图7为说明本发明的电路装置的制造方法的图；
图8为说明本发明的电路装置的图；
图9为说明本发明的电路装置的制造方法的图；
图10为说明本发明的电路装置的制造方法的图；
图11为说明本发明的电路装置的制造方法的图；
图12为说明本发明的电路装置的制造方法的图；
图13为说明本发明的电路装置的制造方法的图；
图14为说明本发明的电路装置的制造方法的图；
图15为说明本发明的电路装置的制造方法的图；
图16为说明本发明的电路装置的制造方法的图；
图17为说明本发明的电路装置的制造方法的图；
图18为说明本发明的电路装置的制造方法的图；
图19为说明本发明的电路装置的制造方法的图；
图20为说明本发明的电路装置的制造方法的图；
图21为说明本发明的电路装置的图；
图22为说明本发明的电路装置的图；
图23为说明本发明的电路装置的装配方法的图；
图24为说明已有的电路装置的装配结构的图；
图25为说明已有的电路装置的图；
图26为说明已有的电路装置的制造方法的图；
图27为说明已有的与本发明的电路装置的制造方法的图；
图28为适合用于已有的与本发明的电路装置的IC电路的图案；
图29为说明半导体厂商与装置厂商(set maker)的位置的图。
说明电路装置的第1实施例
首先，参照图1，对本发明的电路装置的结构进行描述。
图1表示电路装置53，其包括埋入绝缘性树脂50中的电路51，在上述电路51上，固定有电路元件52，上述电路51通过上述绝缘性树脂50支承。另外，电路51的侧面包括弯曲结构59。
上述结构由电路元件52A，52B，多个电路51A，51B，51C，埋入有该电路51A，51B，51C的绝缘性树脂50这3个材料构成，在电路51之间，设置有由该绝缘性树脂50填充的分离槽54。此外，弯曲结构59中的上述电路51由绝缘性树脂50支承。
作为绝缘性树脂，可采用环氧树脂等的热硬化性树脂，聚酰亚胺树脂，聚苯硫等的热塑性树脂。另外，如果绝缘性树脂为采用模具固定的树脂，可浸渍，涂敷而覆盖的树脂，则可采用全部的树脂。
此外，还可采用含浸纤维的薄膜，即半固化浸胶物。
另外，作为电路51，可采用以Cu为主材料的导电箔，以Al为主材料的导电箔，或由Fe—Ni等的合金形成的导电箔等。显然，还可为其它的导电材料，特别是最好为可蚀刻的导电材料，通过激光蒸发的导电材料。
在本发明中，特别是作为蚀刻，采用干法蚀刻，或湿法蚀刻，进行非各向异性的蚀刻，使电路51的侧面形成弯曲结构59，产生锚固效果。其结果是，获得电路51不相对绝缘性树脂50，脱落的结构。
此外，电路元件52的连接机构为金属丝55A，由焊料形成的导电球，扁平的导电球，焊锡等的焊料55B，Ag膏等的导电膏55C，导电镀膜或各向异性的导电性树脂等。这些连接机构根据电路装置52的种类，电路元件52的装配形式而选择。比如，如果为裸体的半导体元件，则表面的电极与电路51之间的连接选择金属丝，如果为CSP，倒装片等，则选择焊锡球或焊锡凸部。此外，片状电阻器，片状电容器选择焊锡55B。另外，即使在将经包装的电路元件，比如BGA或包装型的半导体等装配于电路51上的情况下，仍不会有问题，在采用该元件的场合，连接机构选择焊锡。
还有，当不需要导通时，电路元件与电路51A的固定选择绝缘性粘接剂，另外，在需要导通的场合，采用导电镀膜。在这里，导电镀膜可具有至少一层。
作为该导电镀膜而考虑的材料为Hi，Ag，Au，Pt或Pd等，其通过蒸镀，溅射，CVD等的低真空，高真空下的覆着，电镀或导电膏的烧结等实现覆盖。
比如，Ag与Au粘接，并且还与焊料粘接。由此，如果在片状内面，覆盖Ag膜，则在此状态，可通过将Ag膜，Au膜，焊锡膜覆盖于电路51A上，对芯片进行加热压接，另外，可通过焊锡等的焊料，将芯片固定。在这里，上述导电膜也可形成于按照多层叠置的导电膜中的最顶层上。比如，在Cu的电路51A上，可形成依次覆着两层Ag膜的叠层，依次覆盖Ni膜，Cu膜，焊锡膜这3个层的叠层，依次覆盖Ag膜，Ni膜这两个层的叠层。还有，这些导电膜的种类，叠层结构除了上述以外，还具有多种，但是在这里，省略对其的说明。
在本电路装置中，由于通过作为密封树脂的绝缘性树脂50支承电路50，故无需支承主板，该装置由电路51，电路元件52和绝缘性树脂50形成。该结构为本发明的特征。如还在已有技术介绍部分所描述的那样，过去的电路装置中的电路通过支承主板支承，或借助引线架支承，由此，即使在本来不需要的情况下，仍附加优良的结构。但是，由于本电路装置由必要的最小量的组成元件构成，不需要支承主板，故具有厚度较薄，成本低的特征。
此外，除了上述结构以外，还具有下述绝缘性树脂50，该树脂覆盖电路元件52，并且以填充到上述电路52之间的上述分离槽54中的方式，成整体支承该电路元件52。
由于在该弯曲结构59中的电路51之间，形成分离槽54，在其内，填充绝缘性树脂50，故具有下述优点，即可防止电路51脱落，同时可使它们之间相互绝缘。
还有，具有下述绝缘性树脂50，其覆盖电路元件52，填充于电路51之间的分离槽54中，仅仅将电路51的内面露出，成整体支承该电路元件52。
将该电路的内面露出这一点为本发明的一个特征。具有下述特征，即电路的内面可用于与外部连接，可无需图25所示的已有结构中的通孔TH。
再有，由于在电路元件通过焊料，Au，Ag等的导电膜直接固定的场合，使电路51的内面露出，故可通过电路51A，将电路元件52A所产生的热量传递给安装主板。特别是由于放热，对于可实现驱动电流的上升等的特性改善的半导体片是有效的。
另外，本电路装置为下述结构，即分离槽54的表面与电路51的表面实质上保持一致。本结构构成本发明的特征，由于没有设置图25所示的内面电极10，11的高差，故具有电路装置53照原样，沿水平移动的特征。
图1为通过多个电路元件构成IC电路的图，特别将电路元件与电路元件连接的电路用作导线，如图1B所示，其实质上呈接合区的形状。但是，如图2或图28所示，其实际的形状是更加复杂的。
此外，作为变换实例，如图1C所示，在电路51之间也可为直线结构59s，从而在分离槽中，填充绝缘性树脂50。同样在此结构中，与上述第1实施例相同，可改善电路51之间的绝缘性。与上述第1实施例的类型相比较，本实例的脱落防止效果稍差。
说明电路装置的第2实施例
下面对图2所示的电路装置53进行描述。
如图2B所示，在本结构中，形成有作为电路51的导线L1，L2，其它的方面实质上与图1的结构相同。于是，对该导线L1，L2进行描述。
按照上述方式，IC电路指小规模的电路到大规模的电路。但是，在这里，还具有图面的情况，图2A表示小规模的电路。在该电路中，多数用于音频的放大电路的差动放大电路与电流镜电路连接。如图2A所示，上述差动放大电路由TR1和TR2构成，上述电流镜电路主要由TR3和TR4构成。
图2B为在本电路装置中实现图2A的电路时的平面图，图2C为沿图2B的A—A线的剖视图，图2D为沿B—B线的剖视图。在图2B的左侧，设置有装配有TR1和TR3的压料垫51A，在右侧，设置装配有TR2和TR4的压料垫51D。在该压料垫51A，51D的顶侧，设置有外部连接用的电极51B，51E～51G，在底侧，设置有电极51C，51H～51J。另外，由于TR1的发射极与TR2的发射极共用连接，故导线12与电极51E，51G形成一体。此外，由于TR3的基极与TR4的基极，TR3的发射极与TR4的发射极共用连接，故导线L1按照与电极51C，55J形成一体的方式设置，导线L3按照与电极55H，55I形成一体的方式设置。
本发明的特征在于该导线L1～L3。当通过图28进行描述时，导线25，导线29相当于该导线。该导线随本电路装置的集成度而不同，但是其宽度非常窄，为25μm。此外，该25μm为采用湿法蚀刻的场合的数值，如果采用干法蚀刻，则其宽度更窄。
从图2D还知道，仅仅导线L1的内面露出，其另一侧面具有弯曲结构，通过绝缘性树脂50支承。此外，如果采用另一形式，则导线埋入绝缘性树脂50中。由此，如图25那样，仅仅导线贴合于支承主板上与此不同，可防止导线的脱落，翘曲。特别是，从后面将要描述的制造方法知道，由于电路的侧面由粗糙面，并且弯曲结构形成，在电路的表面，形成凸缘等，故形成产生锚固效果，上述电路无法相对绝缘性树脂脱落的结构。
还有，由于如前面所述，外部连接用的电极51B，51C，551E～51J埋入绝缘性树脂中，故形成即使在从固定的外部导线，作用有外力的情况下，仍难于剥离的结构。
说明电路装置的第3实施例
下面对图8所示的电路装置56进行描述。
在本结构中，在电路51的表面，形成导电膜57，其它的方面实质上与图1或图2的结构相同。由此，在这里，以形成该导电膜57的方面为中心进行描述。
第1特征在于设置导电膜57，以便防止电路或电路装置的翘曲。
一般，由于绝缘性树脂与电路材料(下面称为“第1材料”)的热膨胀系数的差别，电路装置本身产生翘曲，另外，电路弯曲，或剥离。此外，由于电路51的热传导系数优于绝缘性树脂的热传导系数，故电路51的温度首先上升，该电路51膨胀。由此，通过覆盖其热膨胀系数小于第1材料的第2材料，可防止电路的翘曲，剥离，电路装置的翘曲。特别是在第1材料采用Cu的场合，第2材料可采用Au，Ni或Pt。Cu的膨胀率为16.7×10-6(10的负6次方)，Au的膨胀率为14×10-6，Ni的膨胀率为12.8×10-6，Pt的膨胀率为8.9×10-6。此外，在此场合，也可按照形成多层的方式实施。
第2特征在于通过第2材料，保持锚固效果。由于通过第2材料，形成凸缘58，此外，覆盖于电路51上的凸缘58埋入绝缘性树脂50中，故形成产生锚固效果，可防止电路51脱落的结构。另外，该凸缘也可通过构成电路的材料本身形成。
本发明通过弯曲结构59和凸缘58这两者，产生双重的锚固效果，抑制电路51的脱落。
以上的3个实施例是通过作为电路装置，而装配有晶体管芯片52A与从动元件52B的电路装置进行描述的，但是如图21，22所示，本发明还可通过密封有一个半导体片的电路装置来实施。如图21所示，可通过装配有CSP等的倒装型的元件80的电路装置81实现，或如图22所示，还可密封有通过片状电阻器，片电容器等的从动元件82的电路装置83实现。此外，还可为在两个电路之间，连接金属丝，将其密封于其内的装置。其可灵活地用作保险丝。
说明电路装置的制造方法的第1实施例
下面通过图3～7和图1，对电路装置53的制造方法进行描述。
首先，如图3所示，制备片状的导电箔60。该导电箔60的材料根据焊料的附着性，粘接性，电镀性而选择，作为材料，采用以Cu为主材料的导电箔，以Al为主材料的导电箔，或由Fe—Ni等的合金形成的导电箔等。或者，也可采用铜和铝的叠层板。
考虑到后面的蚀刻，最好导电箔的厚度在10～300μm的范围内，在这里，采用厚度为70μm(2盎司)的铜箔。但是，基本上，上述厚度也可大于300μm，还可小于10μm。如后面所述，可形成其深度小于导电箔60的厚度的分离槽61。
此外，片状的导电箔60也可按照规定的厚度，呈卷筒状制备，其传送到后面将要描述的各步骤中，此外还可制备按照规定的尺寸切割的导电箔，将其传送到后面将要描述的各步骤中。
接着，进行下述步骤，该步骤包括按照小于导电箔60的厚度的厚度，将至少除了形成电路51的区域以外的导电箔60去除的步骤，在上述电路60上装配电路元件的步骤，以及在由上述去除步骤形成的分离槽61和导电箔60上，覆盖绝缘性树脂50，将电路元件密封的步骤。
首先，如图4所示，在Cu箔60上，形成光致抗蚀刻剂PR(耐蚀刻掩模)，按照除了形成电路51的区域以外的导电箔60露出的方式，制成光致抗蚀刻剂PR的图案。另外，如图5A所示，通过上述光致抗蚀刻剂PR，进行蚀刻。
在本制造方法中，通过湿式蚀刻或干式蚀刻，按照非各向异性地蚀刻的方式，设定蚀刻条件。由此，具有其侧面形成粗糙面，另外弯曲的特征。此外，通过蚀刻形成的分离槽61的深度约在50～70μm的范围内。
在湿式蚀刻的场合，蚀刻剂采用氯化铁，氯化铜，上述导电箔浸渍于蚀刻剂中，或通过喷射环喷射该蚀刻剂。
特别是如图5所示，在形成蚀刻掩模的光致抗蚀刻剂PR的正下方，进行横向蚀刻，沿横向将比其深的部分蚀刻。如图所示，如果随着从分离槽61的侧面的某一位置不断朝向上方，与该位置相对应的开口部的开口直径减小，则形成倒锥状结构，形成具有锚固结构的结构。另外，通过采用喷射环，朝向深度方向，进行蚀刻，横向的蚀刻受到抑制，由此，显著地呈现该锚固结构。
此外，在干式蚀刻的场合，可按照各向异性，非各向异性的方式进行蚀刻。目前，不可能通过反应性离子蚀刻，去除Cu，但是可通过溅射法去除该Cu。另外，根据溅射的条件，可按照各向异性，非各向异性的方式进行蚀刻。
还有，在图5中，还可有选择地覆盖相对蚀刻液，具有耐腐蚀性的导电膜，以代替光致抗蚀刻剂PR。如果有选择地在形成电路的部分形成覆盖膜，则该导电膜形成蚀刻保护膜，可在不采用抗蚀剂的情况下，蚀刻分离槽。作为导电膜而受到考虑的材料为Ag，Au，Pt，Pd或N等。另外，这些耐腐蚀性的导电膜具有可按照原样灵活地用作压料垫，焊接点的特征。
比如，Ag膜与Au粘接，另外与焊料粘接。由此，如果在芯片内面覆盖Au膜，则按照原样，将芯片通过加热按压于电路51上的Ag膜上，另外，可通过焊锡等的焊料，将芯片固定。此外，由于可将Au丝焊接于Ag的导电膜上，故还可进行引线的焊接。于是，具有下述优点，即可按照原样，将这些导电膜灵活地用作压料垫，焊接点。
然后，如图6所示，进行下述步骤，即在形成有分离槽61的导电箔60上，按照实现导通连接的方式安装电路元件52。
电路元件52为晶体三极管，二极管，IC芯片等的半导体元件52A，片状电容器，片状电阻器等的从动元件52B。另外，虽然厚度较大，但是也可装配有CSP，BGA等的倒装的半导体元件。
在这里，裸露的晶体管芯片52A以管芯方式焊接于电路51A上，发射极与电路51B，基极与电路51B通过下述金属丝55A连接，该金属丝55A通过借助加热压接的球形接合或借助超声波的楔形焊接等固定。另外，标号52B表示片状电容器或从动元件，其通过焊锡等的焊料或导电膏55B固定。
再有，在本实施例中应用图28所示的图案的场合，焊接点的尺寸非常小，但是其与导电箔60形成一体。由此，具有可传递焊接机构的能量，还可提高焊接性的优点。另外，在切断焊接后的金属丝时，具有拉断的场合。此时，由于焊接点与导电箔60形成一体，故没有焊接点上浮的现象，拉断性性也提高。
此外，如图7所示，具有在上述导电箔60和弯曲的分离槽61上，附着绝缘性树脂50的步骤。这可通过递模法，塑模法，浸渍，涂敷的方式来实现。作为树脂材料，环氧树脂等的热硬化树脂可通过递模法来实现，聚酰亚胺树脂，polyphenlene sulfide等的热塑性树脂可通过塑模法实现。
在本实施例中，调整覆盖于导电箔60的表面上的绝缘性树脂的厚度，以便从金属丝55A的顶部，覆盖约100μm的层。考虑到电路装置的强度，此厚度还可减小，也可增加。
本步骤的特征在于在覆盖绝缘性树脂50之前，形成电路51的导电箔60构成支承主板。在过去，如图26所示，采用本来不必要的支承主板5，形成电路7～11，但是在本发明中，形成支承主板的导电箔60为作为电极材料而必需的材料。为此，具有可在极大地节省构成材料的情况下进行作业的优点，另外还可降低成本。
此外，由于分离槽61的深度小于导电箔的厚度，故导电箔60作为电路51，不分别断开。于是，作为片状的导电箔60，成整体处理，在模制绝缘性树脂时，具有朝向模具的传送，朝向模具的装配作业非常容易的特征。
还有，由于在具有弯曲结构59的分离槽61中填充绝缘性树脂50，故在该部分，产生锚固效果，可防止绝缘性树脂50的剥离，另外可防止与此相反的，在后面步骤中断开的电路51的脱落。
再有，也可在覆盖此绝缘性树脂50之前，粘接硅酮树脂，以便保护比如，半导体片或金属丝的连接部。
接着，具有通过化学或物理方式，去除导电箔60的内面，电路51实现断开的步骤。在这里，除此以外的步骤通过研磨，磨削，蚀刻，激光的金属蒸发等方式实现。
在实验中，通过研磨装置或磨削装置，对整个表面切削掉30μm的厚度，使绝缘性树脂50从分离槽61露出。该露出的面通过图6中的虚线表示。其结果是，形成厚度约为40μm的电路51，实现断开。另外，也可在绝缘性树脂50马上露出之前，对导电箔60的整个表面进行蚀刻，此后，通过研磨或磨削装置，对整个表面进行切削，从而使绝缘性树脂50露出。另外，还可仅仅通过湿性蚀刻法，电路51实现断开。
其结果是，形成在绝缘性树脂50上，电路51的表面露出的结构。另外，将分离槽61切削，形成图1的分离槽54(上面情况参照图7)。
最后，根据需要，在露出的电路51上，附着焊锡等的导电材料，如图1所示，最终形成电路装置。
另外，在于电路51的内面覆盖导电膜的场合，也可在图3的导电箔的内面，预先形成导电膜。在此场合，可有选择地覆盖与电路相对应的部分。覆着方法比如，为电镀法。另外，上述导电膜可为对蚀刻，具有抵抗性的材料。另外，在采用该导电膜的场合，可不进行研磨，而仅仅通过蚀刻，电路51实现断开。
此外，在本制造方法中，仅仅在导电箔60中，装配有晶体三极管和片状电阻器，但是，也可以其作为1个单元，呈矩阵状设置，还可以图2或图28的电路作为1个单元，呈矩阵状设置。在此场合，按照后面描述的方式，通过切割装置，分别进行断开。
通过上述的制造方法，可获得下述平整的电路装置，其中将电路50埋入绝缘性树脂50中，绝缘性树脂50的内面与电路51的内面保持一致。
本制造方法的特征在于可将绝缘性树脂50灵活地用作支承主板，进行电路51的断开作业。绝缘性树脂50是作为埋入电路51的材料所必需的材料，不必象图26的已有的制造方法那样，要求不需要的支承主板5。于是，具有可以最少量的材料进行制造，可降低成本的特征。
还有，相对电路51的表面的绝缘性树脂的厚度可在附着前一步骤的绝缘性树脂时调整。于是，从装配的电路元件来说，是不同的，但是具有电路装置56的厚度可增加，也可减小的特征。在这里，形成下述电路装置，其中在厚度为400μm的绝缘性树脂50中，埋入厚度为40μm的电路51(上述情况参照图1)。
说明电路装置的制造方法的第2实施例
下面通过图9～13，图8，对具有凸缘58的电路装置56的制造方法进行描述。另外，由于除了覆着形成凸缘的第2材料70以外，其它的方面与第1实施例(图1，图2)实质上相同，故省略对其的具体描述。
首先，如图9所示，制备下述导电箔60，其中在由第1材料形成的导电箔60上，覆盖蚀刻率较小的第2材料70。
如果比如，在Cu箔上，覆盖Ni，则可同时通过采用氯化铁，氯化铜，蚀刻Cu和Ni，最好按照通过蚀刻率的差，Ni形成凸缘58的方式形成。较粗的实线为由Ni形成的导电膜70，最好其膜厚在1～10μm的范围内。另外，Ni的膜越厚，越容易形成凸缘58。
再有，第2材料也可覆盖第1材料和可选择蚀刻的材料。在此场合，首先，对由第2材料形成的膜制造图案，以便覆盖电路51的形成区域，如果对该膜制作掩模，对第1材料进行蚀刻，则可形成凸缘58。作为第2材料，考虑Al，Ag，Pd，Au等(上述情况参照图9)。
接着，进行将至少除了形成电路51的区域以外的导电箔60，按照小于导电箔60的厚度减薄去除的步骤。
如图10所示，在Ni70上，形成光致抗蚀剂PR，对光致抗蚀剂PR制作图案，以便使除了形成电路51的区域以外的Ni70露出，如图11所示，可通过上述光致抗蚀剂，进行蚀刻。
如果象前面那样，采用氯化铁，氯化铜的蚀刻剂等进行蚀刻，由于Ni70的蚀刻率慢于Cu60的蚀刻率，故随着蚀刻的进行，便形成凸缘58。
由于下述步骤与前面的制造方法相同，故省略对其的描述，该步骤指在形成有上述分离槽61的导电箔60上，装配电路元件52的步骤(图12)，在上述导电箔60和分离槽61上覆盖绝缘性树脂50，通过化学和/或物理方式去除导电箔60的内面，电路51实现分离的步骤(图13)，以及在电路内面形成导电膜，直至完成的步骤(图8)。
说明电路装置的制造方法的第3实施例
下面通过图14～20，对下述制造方法进行描述，该制造方法指以IC电路作为1个单元，呈矩阵状设置，该IC电路由多种电路元件，导线，压料垫，焊接点等形成的电路构成，在将该电路密封后，分别实现断开，形成构成IC电路的电路装置。另外，在这里，通过图2的结构，特别是图2C的剖视图，进行描述。此外，由于本制造方法几乎与第1实施例，第2实施例相同，故相同的部分进行简单的描述。
首先，如图14，制备片状的导电箔60。
另外，片状的导电箔60通过按照规定的宽度，呈卷筒状卷绕制备，其也可传送到后面将要描述的各步骤，还可制备按照规定的尺寸切割的导电箔，传送到后面将要描述的各步骤。
接着，进行按照小于导电箔60的厚度，将至少除了形成电路51的区域以外的导电箔60减薄去除的步骤。
首先，如图15所示，在Cu箔60上，形成光致抗蚀剂PR，按照除了形成电路51的区域以外的导电箔60露出的方式，制作光致抗蚀剂PR图案。另外，如图16所示，可通过上述光致抗蚀剂PR，进行蚀刻。
通过蚀刻而形成的分离槽61的深度比如，为50μm，由于其侧面形成较粗糙的面，故与绝缘性树脂50的粘接性提高。
此外，由于此分离槽61的侧壁按照非各向异性的方式，蚀刻，从而其弯曲。上述去除步骤可采用湿性蚀刻，干性蚀刻。于是，通过该弯曲结构，形成产生锚固效果的结构(具体内容参照说明电路装置的制造方法的第1实施例)。
还有，在图15中，也可有选择地覆盖相对蚀刻液，具有耐腐蚀性的导电膜，以代替光致抗蚀剂PR。如果有选择地覆着于形成电路的部分上，则该导电膜形成蚀刻保护膜，在不采用抗蚀剂的情况下，可对分离槽进行蚀刻。
接着，如图17所示，进行将电路元件52A以导通方式连接，装设于形成有分离槽61的导电箔60上的步骤。
电路元件52A为晶体三极管，二极管，IC芯片等的半导体元件，芯片电容器，片状电阻器等的从动元件。此外，还可装配厚度较大的，CSP，BGA等的倒装的半导体元件。
在这里，裸露的晶体管芯片52A通过管芯方式焊接于电路51A上，，发射极与电路51B，基极与电路51B通过金属丝55A连接。
再有，如图18所示，进行在上述导电箔60和分离槽61，附着绝缘性树脂50的步骤。这可通过递模法，塑模法，或浸渍法实现。
在本实施例中，覆盖于导电箔60的表面上的绝缘性树脂的厚度按照覆盖距装配的电路元件的最高的位置，约100μm的膜。考虑到电路装置的强度，该厚度可增加，也可减小。
本步骤的特征在于在覆盖绝缘性树脂50时，形成电路51的导电箔60构成支承主板。在过去，如图26所示，采用本来不必要的支承主板5，电路7～11，按照本发明，形成支承主板的导电箔60为作为电极材料而必要的材料。由此，具有可在大大节省构成材料的情况下进行作业的优点，另外还可降低成本。
另外，由于分离槽61的厚度小于导电箔的厚度，故导电箔60不作为电路51而分别分离。因此，在作为片状的导电箔60，成一体处理，对绝缘性树脂进行模制时，具有非常顺利地进行朝向模具的传送，模具的装配作业的特性。
接着，进行通过化学和/或物理方式去除导电箔60的内面，电路51实现断开的步骤。在这里，除了前述的以外的步骤通过研磨，磨削，蚀刻，激光的金属蒸发等方式实现。
通过实验，借助研磨装置或磨削装置，将其整个表面去除掉30μm，使绝缘性树脂50露出。此露出的面在图18中，通过虚线表示。其结果是，形成约40μm的厚度的电路51，其实现断开。另外，也可在绝缘性树脂50露出之前，对导电箔60的整个表面进行蚀刻，之后，通过研磨或磨削装置，对其整个表面进行切削，使绝缘性树脂50露出。
其结果是，形成在绝缘性树脂50上，电路51的表面露出的结构。
此外，如图19所示，在露出的电路51上，覆盖焊锡等的导电材料。
最后，如图20所示，进行针对每个电路元件，实现断开，最终完成电路装置的步骤。
分离线为箭头的部位，其可通过切割，切断，加压，巧克力压缝等方式实现。另外，在采用巧无克力压缝的场合，在覆盖绝缘性树脂时，可按照在分离线上，形成槽的方式，在模具上，形成突出部。
特别是，切割多用于普通的半导体装置的制造方法，由于尺寸非常小的物体也可分离，故最好采用该方式。
在通过以上的第1～第3实施例描述的制造方法中，还可形成图28所示的复杂的图案。特别是，弯曲，与焊接点26形成一体，其另一端与电路元件导通的导线的宽度也较窄，另外，其长度较长。由此，因加热而产生的翘曲非常大，在过去的结构中，产生剥离的问题。但是，在本发明中，由于导线以埋入的方式支承于绝缘性树脂中，从而可防止导线本身的翘曲，剥离，脱落。另外，焊接点本身的平面面积较小，在过去的结构中，产生焊接点的剥离。在本发明中，由于按照前述的方式，导线埋入绝缘性树脂中，另外具有锚固效果而支承于绝缘性树脂中，故具有防止脱落的优点。
此外，还具有可获得在绝缘性树脂50中，埋入电路的电路装置的优点。按照过去的结构中的描述，电路装配于印刷电路主板，陶瓷主板中。这通过后面的实际装配方法来说明。
图27的右侧给出了流程，以便简化本发明。通过制备Cu箔，Ag或Ni等的电镀，半蚀刻，管芯焊接，引线焊接，递模法，内面Cu箔去除，电路的内面处理和切割这9个步骤，获得电路装置。另外，在不从制造厂商，供给支承主板的情况下，可自制全部的步骤。
说明电路装置的种类和这些种类的装配方法的实施例
图21表示装配有倒装型的电路元件80的电路装置81。电路元件80相当于裸露的半导体片，表面密封的CSP或BGA。另外，图22表示装配有片状电阻器或片状电阻器等的从动元件62的电路装置83。由于这些元件不需要支承主板，故其为薄型，另外由于它们通过绝缘性树脂密封，故其耐环境性优良。
图23为说明叠层结构的图。在图23A中，在形成于印刷电路主板，或金属主板，陶瓷主板等的安装主板84上的电路85上，装配有目前描述的本发明的电路装置53，81，83。
特别是，由于半导体片52的内面所固定的电路51A通过加热方式与安装主板84的电路85结合，故可通过电路85，实现对电路装置的放热。另外，如果安装主板84采用金属主板，则可降低金属主板的放热性，另外通过手动传导方式，降低半导体片52的温度。由此，可使半导体片的驱动能力提高。
比如，适合采用电源MOS，IGBT，SIT，大电流驱动用的晶体三极管，大电流驱动用的IC(MOS型，BIP型，Bi—CMOS型)存储元件等。
另外，作为金属主板，最好为Al主板，Cu主板，Fe主板，另外，考虑到与电路85发生短路，形成绝缘性树脂和/或氧化膜等。
此外，图23B为将本电路装置90灵活地用作图23A的主板84的图。这是本发明的最大的特征。即，对于过去的印刷电路主板，陶瓷主板，至多在主板中，形成通孔TH，而本发明的特征在于可获得内部设置有IC电路的主板组件。比如，为在印刷电路主板中，设置至少1个电路(也可作为系统而内部设置)的形式。
还有，在过去，作为支承主板，印刷电路主板，陶瓷主板是必要的，但是按照本发明，可获得无需该支持主板的主板组件。这样与由印刷电路主板，陶瓷主板，或金属主板构成的混合式主板相比较，可ui其厚度减小，可减小其重量。
再有，由于将此电路装置90灵活地用作支承主板，在露出的电路上，安装电路元件，故可获得高性能的主板组件。如果特别是将电路装置用作支承主板，将本电路装置91作为元件安装于其上，则可获得更轻，更薄的主板组件。
因此，通过这些装配形式，装配有该组件的电子设备可获得小型，轻质的形式。
另外，由标号93表示密封部分为绝缘性的膜。比如，最好采用抗焊锡剂等的高分子膜。通过形成该膜，可防止埋入主板90中的电路，与形成于电路元件91等中的电极之间的短路。
下面通过图29，对本电路装置的优点进行描述。关于过去的装配方法，半导体厂商形成包装型半导体装置，倒装片，装置厂商将由半导体厂商供给的半导体装置和部件厂商供给的从动元件等安装于印刷电路主板上，将其装配成组件，装配成套，形成电子设备。但是，在本电路装置中，由于本身可用作安装主板，故半导体厂商可采用后续步骤，形成安装主板组件，将其供给装置厂商。因此，装置厂商可大幅度地节省朝向该主板的元件安装量。
从上面描述知道，按照本发明，电路装置由电路和绝缘性树脂的必要最小量形成，形成资源没有浪费的电路装置。于是，可获得下述电路装置，其中在完成之前，没有多余构成元件，可大幅度地降低成本。此外，由于使绝缘性树脂的膜的厚度，导电箔的厚度为最适合的值，故可获得非常小型的，薄型的，轻质的电路装置。另外，翘曲或剥离的现象显著的导线以埋入方式支承于绝缘性树脂中，可解决这些问题。
另外，由于仅仅导电箔的内面从绝缘性树脂中露出，故具有下述优点，即电路的内面可用于与外部直接连接，如图25所示，可无需已有结构的内面电极和通孔。
此外，由于在电路元件通过焊料，Au，Ag等的导电膜直接固定的场合，电路的内面露出，电路元件所产生的热量可通过电路，直接传递给安装主板上。特别是，通过该放热，还可进行电源元件的装配。
另外，在本电路装置中，分离槽的表面与电路的表面形成具有实质上保持一致的平整的表面的结构，即使在如图23B所示，将较窄的芯片QFP等装配于支承主板上的情况下，由于可按照原样沿水平方向移动电路装置本身，很容易修正导线偏移。
此外，由于在电路的表侧，形成第2材料，可抑制因热膨胀系数的不同，安装主板的翘曲，特别细长的导线的翘曲或剥离。
还有，由于电路的侧面为弯曲结构，另外，在电路的表面上，形成由第2材料形成的膜，可形成附着于电路上的凸缘。于是，可产生锚固效果，可防止电路的翘曲，脱落。
另外，在本发明的电路装置的制造方法中，将形成电路的材料的导电箔本身用作支承主板，到分离槽的形成时或电路元件的装配，绝缘性树脂的覆盖时，通过导电箔支承全体，此外，在将导电箔作为电路而实现断开时，使绝缘性树脂用作支承主板。于是，可以电路元件，导电箔，绝缘性树脂的必要最小量制造。如过去的实例中所描述的那样，在本来构成电路装置的方面，不要求支承主板，另外可使成本降低。由于可无需支承主板，电路埋入绝缘性树脂中，另外可调整绝缘性树脂与导电箔的厚度，故还具有可形成非常薄的电路装置的优点。此外，在分离槽的形成步骤中，还形成弯曲结构，同时还可获得具有锚固效果的结构。
此外，从图27知道，由于可省略通孔的形成步骤，导体的打印步骤(陶瓷主板的场合)等，故具有下述优点，即可相对过去，大幅度地缩短制造步骤，自制全部过程。还有，形成支架模具也完全不需要，形成极短的交货期的制造方法。
由于在将导电箔的厚度减薄的步骤(比如，半蚀刻)之前，在不分别分离的情况下对电路进行处理，故还具有在后面的绝缘性树脂的覆盖步骤中，作业性提高的特征。
还有，由于电路与绝缘性树脂形成同一面，故装配的电路装置可在不与安装主板上的电路侧面相接触的情况下稍稍错动。可将特别是，按照位置偏移的方式装配的电路装置沿水平方向错开地重新设置。另外，在电路装置装配后，当焊料熔化时，错位地安装的电路装置在熔化的焊料的表面张力的作用下，可在电路顶部自己恢复，通过电路装置本身，实现再配置。
最后，由于可将本电路装置灵活用作本电路装置，将电路元件安装于露出的电路上，故可获得高性能的主板组件。特别是，如果将本电路装置用作支承主板，将该电路元件91作为元件装配于其上，则可获得更轻质的，更薄的主板组件。

Claims (46)

1.一种电路装置，其包括多个电路；电路元件，其连接于上述电路上；包装件，其由绝缘性树脂形成，该包装件覆盖上述电路元件和上述电路，成整体支承上述电路元件和电路；外部连接用的引线端子，其在上述包装件的一个主面露出。
2.根据权利要求1所述的电路装置，其特征在于上述电路由金属轧制体形成。
3.根据权利要求1所述的电路装置，其特征在于上述多个电路中的至少几个为与绝缘性树脂接合的弯曲面。
4.根据权利要求3所述的电路装置，其特征在于上述分离槽通过蚀刻形成。
5.根据权利要求1～4中的任何一项所述的电路装置，其特征在于上述电路元件包括多个电路元件。
6.根据权利要求1～5中的任何一项所述的电路装置，其特征在于上述电路的厚度在20～100微米的范围内。
7.根据权利要求2～6中的任何一项所述的电路装置，其特征在于上述电路由以铜为主成分的轧制体形成。
8.根据权利要求2～6中的任何一项所述的电路装置，其特征在于上述电路由以铁镍为主成分的轧制体形成。
9.根据权利要求2～6中的任何一项所述的电路装置，其特征在于上述电路由以铝为主成分的轧制体形成。
10.根据权利要求1～9中的任何一项所述的电路装置，其特征在于在上述电路中，晶粒边界按照电路表面呈平直状的方式无规则地设置。
11.根据权利要求1～10中的任何一项所述的电路装置，其特征在于在上述电路中的电路元件放置面上，形成由与上述电路不同的金属材料构成的导电膜。
12.根据权利要求11所述的电路装置，其特征在于上述导电膜由镍镀层形成。
13.根据权利要求11所述的电路装置，其特征在于上述导电膜由金镀层形成。
14.根据权利要求11所述的电路装置，其特征在于上述导电膜由银镀层形成。
15.根据权利要求1～14中的任何一项所述的电路装置，其特征在于上述电路元件由半导体集成电路芯片形成。
16.根据权利要求1～14中的任何一项所述的电路装置，其特征在于上述电路元件由片状部件形成。
17.根据权利要求1～16中的任何一项所述的电路装置，其特征在于上述电路元件与上述电路的连接通过焊接丝进行进行。
18.根据权利要求1～16中的任何一项所述的电路装置，其特征在于上述电路元件与上述电路的连接通过直接焊接进行。
19.根据权利要求1～18中的任何一项所述的电路装置，其特征在于上述电路的内面与上述绝缘性树脂的内面实质上构成同一面。
20.根据权利要求1～18中的任何一项所述的电路装置，其特征在于上述电路的内面相对上述绝缘性表面突出。
21.根据权利要求1～18中的任何一项所述的电路装置，其特征在于上述绝缘性树脂表面相对电路的内面突出，在凹部，形成与外部电路连接用的焊锡球。
22.一种电路装置的制造方法，该方法包括下述步骤：
制备导电性板；
按照至少存留形成电路的区域的方式，在上述导电性板上，形成其深度小于上述导电性板的厚度的分离槽，形成电路用图案；
将电路元件固定于上述电路用图案中的分离槽形成面一侧；
通过绝缘性树脂，将上述电路元件和电路模制在一起；
将上述导电性板从上述电路元件放置面的相对面侧，去除而达到上述分离槽的深度，按照形成电路的方式，将该导电性板分离。
23.根据权利要求22所述的制造方法，其特征在于其包括下述步骤：
制备导电性板；
按照至少存留形成电路的区域的方式，在上述导电性板上，形成其深度小于上述导电性板的厚度的分离槽，形成多个单元的电路用图案；
将电路元件固定于上述电路用图案中的分离槽形成面一侧；
通过绝缘性树脂，将上述电路元件和电路模制在一起；
将上述导电性板从上述电路元件放置面的相对面侧，去除而达到上述分离槽的深度，按照形成上述电路的方式，将该导电性板分离，形成多个电路装置。
24.根据权利要求22或23所述的制造方法，其特征在于制备导电性板的步骤包括对金属进行轧制的步骤。
25.根据权利要求22～24中的任何一项所述的制造方法，其特征在于电路图案的形成步骤包括按照形成弯曲侧面的方式，形成电路的步骤。
26.根据权利要求22～24中的任何一项所述的制造方法，其特征在于电路用图案的形成步骤为通过半蚀刻方式，形成使上述电路断开的分离槽的步骤。
27.根据权利要求22～24中的任何一项所述的制造方法，其特征在于电路用图案的形成步骤为通过半冲压步骤，使上述电路断开的分离槽的步骤。
28.根据权利要求22所述的制造方法，其特征在于固定上述电路元件的步骤包括将多个电路元件固定的步骤。
29.根据权利要求22～27中的任何一项所述的制造方法，其特征在于电路用图案的形成步骤为形成深度在20～100微米的范围内的分离槽的步骤。
30.根据权利要求22～28中的任何一项所述的制造方法，其特征在于制备导电性板的步骤包括通过热轧制方法，对以铜为主成分的板状体进行轧制处理的步骤。
31.根据权利要求22～28中的任何一项所述的制造方法，其特征在于制备导电性板的步骤包括通过热轧制方法，对以铁镍为主成分的板状体进行轧制处理的步骤。
32.根据权利要求22～28中的任何一项所述的制造方法，其特征在于制备导电性板的步骤包括通过热轧制方法，对以铝为主成分的板状体进行轧制处理的步骤。
33.根据权利要求22～28中的任何一项所述的制造方法，其特征在于制备导电性板的步骤包括形成按照表面为平直状的方式，设置有晶粒边界无规则地的板状体的步骤。
34.根据权利要求22～28中的任何一项所述的制造方法，其特征在于制备导电性板的步骤包括在电路中的电路元件的放置面的至少一部分上，形成由与上述电路不同的金属材料形成的导电膜。
35.根据权利要求33所述的制造方法，其特征在于形成导电膜的步骤包括镀镍步骤。
36.根据权利要求33所述的制造方法，其特征在于形成导电膜的步骤包括镀金步骤。
37.根据权利要求33所述的制造方法，其特征在于形成导电膜的步骤包括镀银步骤。
38.根据权利要求22～36中的任何一项所述的制造方法，其特征在于固定电路元件的步骤包括将半导体集成电路芯片放置于电路上的步骤。
39.根据权利要求22～36中的任何一项所述的制造方法，其特征在于固定电路元件的步骤包括将片状部件连接于电路上的步骤。
40.根据权利要求22～38中的任何一项所述的制造方法，其特征在于固定电路元件的步骤包括通过焊接丝，进行丝焊接的步骤。
41.根据权利要求22～38中的任何一项所述的制造方法，其特征在于固定电路元件的步骤通过直接焊接进行。
42.根据权利要求22～38中的任何一项所述的制造方法，其特征在于形成上述电路的步骤包括下述步骤，即上述电路的内面与绝缘性树脂的内面按照实质上形成同一面的方式蚀刻。
43.根据权利要求22～38中的任何一项所述的制造方法，其特征在于形成电路的步骤包括下述步骤，即上述电路的内面按照相对绝缘性表面突出的方式蚀刻。
44.根据权利要求22～38中的任何一项所述的制造方法，其特征在于形成电路的步骤包括下述步骤，即绝缘性树脂表面按照相对上述电路的内面突出的方式蚀刻。
45.根据权利要求22～38中的任何一项所述的制造方法，其特征在于形成电路的步骤包括下述步骤，即绝缘性树脂表面按照相对上述电路的内面突出的方式蚀刻，在通过蚀刻形成的凹部，形成与外部电路连接用的焊锡球。
46.根据权利要求22所述的制造方法，其特征在于其还包括将绝缘性树脂切断，将其与相应的电路装置分离的步骤。
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