CN105097571B - 芯片封装方法及封装组件 - Google Patents

芯片封装方法及封装组件 Download PDF

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CN105097571B
CN105097571B CN201510317651.8A CN201510317651A CN105097571B CN 105097571 B CN105097571 B CN 105097571B CN 201510317651 A CN201510317651 A CN 201510317651A CN 105097571 B CN105097571 B CN 105097571B
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metallic conductor
groove
plastic
chip
packaging method
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CN105097571A (zh
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谭小春
叶佳明
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Hefei Silicon Microelectronics Technology Co ltd
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Hefei Silicon Microelectronics Technology Co Ltd
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Priority to US15/179,284 priority patent/US9595453B2/en
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Abstract

本申请提供了芯片封装方法及封装组件,通过在金属基板上微蚀刻形成具有预定深度的凹槽,然后在所述凹槽处选择与所述金属基板粘附力较小的材质形成金属导电体作为引线框架。采用这种方法,在将芯片与所述金属导电体电连接以及进行塑封工艺后,金属基板可直接从塑封体上剥离下来,以将所述金属导电体的底部裸露于塑封体之外,便完成了芯片的封装。因此,所述芯片封装方法的工艺流程简单,生产成本低,且封装可靠性高。

Description

芯片封装方法及封装组件
技术领域
本发明涉及芯片封装技术领域,尤其涉及一种芯片封装方法及封装组件。
背景技术
将半导体裸芯片上的电极端子通过导电凸块或者金属引线与引线框架电连接,然后进行塑封,使引线框架的引脚裸露在塑封体外与外部电路电连接,便形成了一个封装组件。
引线框架可以预先制造好,以在封装过程中可以直接使用,但是预先批量形成的引线框架不便于封装布线的灵活性。因此,现有技术出现了在封装过程中形成引线框架,以便与后续的封装工艺更具兼容性。现有的在封装过程中形成引线框架的方法为先在一个封装基板上沉积或电镀形成图案化的金属层作为引线框架,然后再在这些引线框架的引脚与引脚之间填充塑封料,以将这些分离的引脚固定成于塑封料中,然后化学蚀刻位于底部的大部分封装基板,再将封装体翻转过来,另一面安装芯片,以将电极端子引出。然而,这种在封装过程中形成引线框架的封装方法,在形成引线框架后,需要化学蚀刻封装基板,且需要翻转封装体,增加了工艺难度和复杂度,也会进一步影响了封装组件的性能。
发明内容
有鉴于此,本发明的目的是提供一种芯片封装方法及封装组件,以减少封装工艺流程、降低封装成本以及提高封装的可靠性。
一种芯片封装方法,包括:
蚀刻金属基板,以在所述金属基板表面至少形成一个凹槽;
在所述凹槽处电镀形成金属导电体,所述金属导电体的底部位于所述凹槽中;
将芯片放置于所述金属导电体之上,并将所述芯片上的电极端子通过电连接体与所述金属导电体电连接;
利用塑封工艺包封所述芯片、金属导电体和电连接体,以形成塑封体,且所述金属基板裸露于所述塑封体外;
将所述金属基板从所述塑封体上剥离下来,以将所述金属基板与所述金属导电体相分离,且使所述金属导电体的底部裸露于所述塑封体之外;
所述凹槽的深度为预定深度值,以使得在将所述金属基板从所述塑封体上剥离下来前,所述凹槽能够锁定所述金属导电体,在将所述金属基板从所述塑封体上剥离下来时,所述金属导电体能够脱离所述凹槽。
优选的,在所述凹槽处电镀形成所述金属导电体的步骤包括:
利用电镀掩模层,在所述凹槽中电镀形成第一金属层;
并在所述第一金属层上电镀形成第二金属层;
所述第一金属层与第二金属层构成所述金属导电体。
优选的,形成所述凹槽的步骤包括:
在所述金属基板上形成图案化的光刻胶;
在所述光刻胶暴露的地方开始蚀刻,以形成所述凹槽;
所述光刻胶作为所述电镀掩模层,在形成所述第二金属层之后再去除所述光刻胶。
优选的,在电镀形成所述第二金属层时,使所述第二金属层底部截面积大于顶部的截面积。
优选的,所述金属基板的化学元素与所述金属导电体底部的化学元素为不同族的元素,以使所述金属基板与所述金属导电之间的粘附力小于预定值。
优选的,所述金属基板为的化学元素为铁,所述第一金属层的化学元素为金,第二金属层的化学元素为镍。
优选的,所述凹槽的深度介于0微米到5微米之间。
优选的,电连接体为导电凸块或金属引线。
优选的,采用机械剥离的方法,将所述金属基板从所述塑封体上剥离下来。
一种根据上述任意一项所述的芯片封装方法所制造芯片封装组件。
由上可见,在本申请提供的芯片封装方法中,通过在金属基板上微蚀刻形成具有预定深度的凹槽,然后在所述凹槽处选择与所述金属基板粘附力较小的材质形成金属导电体作为引线框架。采用这种方法,在将芯片与所述金属导电体电连接以及进行塑封工艺后,金属基板可直接从塑封体上剥离下来,以将所述金属导电体的底部裸露于塑封体之外,便完成了芯片的封装。因此,所述芯片封装方法的工艺流程简单,生产成本低,且封装可靠性高。
附图说明
图1a至图1d为根据本发明实施例的芯片封装方法中各个工艺步骤形成结构的剖面示意图;
图2为根据本发明实施例的芯片封装组件的结构示意图。
具体实施方式
以下将参照附图更详细地描述本发明。在各个附图中,相同的组成部分采用类似的附图标记来表示。为了清楚起见,附图中的各个部分没有按比例绘制。此外,可能未示出某些公知的部分。为了简明起见,可以在一幅图中描述经过数个步骤后获得的结构。在下文中描述了本发明的许多特定的细节,例如每个组成部分的结构、材料、尺寸、处理工艺和技术,以便更清楚地理解本发明。但正如本领域的技术人员能够理解的那样,可以不按照这些特定的细节来实现本发明。
本发明提供的芯片封装方法具体包括以下步骤:
步骤a:蚀刻金属基板,以在所述金属基板表面至少形成一个凹槽。
步骤b:在所述凹槽处电镀形成金属导电体,所述金属导电体的底部位于所述凹槽中。
步骤c:将芯片放置于所述金属导电体之上,并将所述芯片上的电极端子通过电连接体与所述金属导电体电连接。
步骤d:利用塑封工艺包封所述芯片、金属导电体和电连接体,以形成塑封体,且所述金属基板裸露于所述塑封体外;
步骤e:将所述金属基板从所述塑封体上剥离下来,以将所述金属基板与所述金属导电体相分离,且使所述金属导电体的底部裸露于所述塑封体之外,以用于实现所述电极端子与外部电路的电连接。
其中,在形成所述凹槽时,控制所述凹槽的深度为预定深度值,以确保在将所述金属基板从所述塑封体上剥离下来前,所述凹槽能够锁定所述金属导电体,在将所述金属基板从所述塑封体上剥离下来时,所金属导体能够脱离所述凹槽。
图1a至图1d为根据本发明实施例的芯片封装方法中各个工艺步骤形成结构的剖面示意图。结合各个示意图来进一步阐述被发明提供的芯片封装方法。
如图1a,所述,在步骤a中,形成所述凹槽的步骤具体包括:在金属基板1上涂覆一层光刻胶2,然后图案化光刻胶2,以使光刻胶暴露出部分金属基板1的表面,最后由被光刻胶2暴露的金属基板1的表面处开始蚀刻,通过对蚀刻液的浓度和蚀刻速率的控制,控制蚀刻深度为预定的深度值,从而在金属基板1的表面形成具有预定的深度值的凹槽3。可控制凹槽3的深度为0微米到6微米之间,例如3微米或者5微米这样的较小的深度。因此,这种蚀刻凹槽的方式也可以为微蚀刻工艺。采用微蚀刻形成凹槽的目的,就是为了在后续的工艺中既能暂时的将形成与凹槽中的金属层锁定住,又可通过剥离的方式,例如机械剥离的方式将形成于凹槽中金属层从凹槽中剥离出来。还可通过对蚀刻的控制,使凹槽的底部面积大于顶部面积,从而更加有利于用一个深度较小的凹槽来锁定形成于该处的金属层。
继续参考图1b所示,具体的,步骤b可进一步包括:利用电镀掩模层,在所述凹槽中电镀形成第一金属层4,然后并在所述第一金属层4上电镀形成第二金属层5,所形成的第一金属层4与第二金属层5便构成了所述金属导电体,第一金属层4作为所述金属导电体的底部。
在这里,为了减少光刻的次数,以降低生产成本,在形成凹槽3时所采用的图案化的光刻胶2在形成凹槽3后可先不去除,而继续在步骤b中,充当所述电镀掩模层,直到在形成所述第二金属层5之后再去除,具体的去除光刻胶2的方法可以采用剥离的方式去除。在形成第二金属层时,可使电镀区域大于凹槽的顶部区域,从而使形成的第二金属层的底部截面积小于顶部截面积,即最终形成的金属导电体为底部截面积小,顶部截面积大的结构,以有利于其与后续工艺中塑封料的结合,可有效的提高封装的可靠性。
具体的,为了使所述金属基板在从所述塑封体上剥离下来时,也能与金属导电体的底部相分离,所述金属基板的化学元素与所述金属导电体底部的化学元素为不同族的元素,以使所述金属基板与所述金属导电之间的粘附力小于预定值。该预定值为适当的值,以确保所述金属导电体的底部能与所述金属基板采用机械方式相剥离的情况。例如所述技术所述金属基板为的化学元素为铁,所述第一金属层的化学元素为金,第二金属层的化学元素为镍。
参考图1c所示,将芯片通过电连接体与所述金属导电体电连接的的步骤进一步包括:将芯片6放置于所述金属导电体之上,其有源面朝向所述金属导电体,并将所述有源面上的电极端子通过电连接体7与所述金属导电体电连接,从而以倒装封装的形式实现了对芯片6的封装。这里的电连接体7为导电凸块,例如铜柱。在将芯片6安装完后,再利用塑封工艺,使塑封料包封芯片6、金属导电体和导电凸块7,以形成塑封体8,且所述金属基板1裸露于所述塑封体8外。完成塑封后,将金属基板从塑封体8上剥离下来,例如可以采用机械剥离的方式进行剥离,与此同时所述金属导电体的底部,即第一金属层4也从凹槽3中分离出来,实现了所述金属导电体与金属基板的分离。剥离了所述金属基板1后,便形成了封装组件,其结果如图1d所示,金属导电体的底部裸露与所述塑封体8之外,以用于实现所述电极端子与外部电路的电连接。
在另一个事实例中,所述电连接体7还可以为金属引线,如图2所示,所形成的金属导体在此实施例中可包括面积较大的部分,以用于承载所述芯片6,还包括位于面积较大部分的金属导电体周围的面积较小的部分。面积较小的这一部分金属导电体充当作为引出所述电极端子的引脚。具体的封装过程为,将芯片的非有源面贴装于面积较大的金属导电体上,使有源面上的电极端子通过金属引线7与面积较小的金属导电体上,然后再进行塑封和剥离金属基板,便形成了如图2所示的封装组件。
此外,本发明还提供一种根据本发明提供的封装方法所形成的封装组件,所述封装组件的结构可如图1d和图2所示。
由上可见,在本申请提供的芯片封装方法中,通过在金属基板上微蚀刻形成具有预定深度的凹槽,然后在所述凹槽处选择与所述金属基板粘附力较小的材质形成金属导电体作为引线框架。采用这种方法,在将芯片与所述金属导电体电连接以及进行塑封工艺后,金属基板可直接从塑封体上剥离下来,以将所述金属导电体的底部裸露于塑封体之外,便完成了芯片的封装。因此,所述芯片封装方法的工艺流程简单,生产成本低,且封装可靠性高。
依照本发明的实施例如上文所述,这些实施例并没有详尽叙述所有的细节,也不限制该发明仅为所述的具体实施例。显然,根据以上描述,可作很多的修改和变化。本说明书选取并具体描述这些实施例,是为了更好地解释本发明的原理和实际应用,从而使所属技术领域技术人员能很好地利用本发明以及在本发明基础上的修改使用。本发明仅受权利要求书及其全部范围和等效物的限制。

Claims (10)

1.一种芯片封装方法,包括:
蚀刻金属基板,以在所述金属基板表面形成至少一个凹槽;
在所述凹槽处电镀形成金属导电体,所述金属导电体的底部位于所述凹槽中;
将芯片放置于所述金属导电体之上,并将所述芯片上的电极端子通过电连接体与所述金属导电体电连接;
利用塑封工艺包封所述芯片、金属导电体和电连接体,以形成塑封体,且所述金属基板裸露于所述塑封体外;
将所述金属基板从所述塑封体上剥离下来,以将所述金属基板与所述金属导电体相分离,且使所述金属导电体的底部裸露于所述塑封体之外;
其中,在形成所述凹槽的步骤和电镀形成金属导电体的步骤中,采用公共的图案化光刻胶作为掩模,
所述凹槽的深度为预定深度值,以使得在将所述金属基板从所述塑封体上剥离下来前,所述凹槽能够锁定所述金属导电体,在将所述金属基板从所述塑封体上剥离下来时,所述金属导电体能够脱离所述凹槽。
2.根据权利要求1所述的芯片封装方法,其特征在于,在所述凹槽处电镀形成所述金属导电体的步骤包括:
利用所述掩模,在所述凹槽中电镀形成第一金属层;
在所述第一金属层上电镀形成第二金属层;以及
去除所述掩模,
其中,所述第一金属层与第二金属层构成所述金属导电体。
3.根据权利要求2所述的芯片封装方法,其特征在于,形成所述凹槽的步骤包括:
在所述光刻胶暴露的地方开始蚀刻,以形成所述凹槽。
4.根据权利要求3所述的芯片封装方法,其特征在于,在电镀形成所述第二金属层时,使所述第二金属层底部截面积大于顶部的截面积。
5.根据权利要求3所述的芯片封装方法,其特征在于,所述金属基板的化学元素与所述金属导电体底部的化学元素为不同族的元素,以使所述金属基板与所述金属导电体之间的粘附力小于预定值。
6.根据权利要求5所述的芯片封装方法,其特征在于,所述金属基板为的化学元素为铁,所述第一金属层的化学元素为金,第二金属层的化学元素为镍。
7.根据权利要求3所述的芯片封装方法,其特征在于,所述凹槽的深度介于0微米到5微米之间。
8.根据权利要求3所述的芯片封装方法,其特征在于,所述电连接体为导电凸块或金属引线。
9.根据权利要求3所述的芯片封装方法,其特征在于,采用机械剥离的方法,将所述金属基板从所述塑封体上剥离下来。
10.一种根据权利要求1至9中任意一项所述的芯片封装方法所制造芯片封装组件。
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CN110323141B (zh) 2019-04-15 2021-10-12 矽力杰半导体技术(杭州)有限公司 引线框架结构,芯片封装结构及其制造方法
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