CN113614896A - Rf半导体装置及其制造方法 - Google Patents
Rf半导体装置及其制造方法 Download PDFInfo
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- CN113614896A CN113614896A CN202080023383.8A CN202080023383A CN113614896A CN 113614896 A CN113614896 A CN 113614896A CN 202080023383 A CN202080023383 A CN 202080023383A CN 113614896 A CN113614896 A CN 113614896A
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Abstract
本公开涉及一种射频装置,所述射频装置包含传递装置管芯和位于所述传递装置管芯之下的多层重新分布结构。所述传递装置管芯包含装置区域和传递衬底,所述装置区域具有后段制程(BEOL)部分和位于所述BEOL部分之上的前段制程(FEOL)部分。所述FEOL部分包含隔离区段和有源层,所述有源层被所述隔离区段围绕。所述装置区域的顶表面是平坦化的。所述传递衬底位于所述装置区域的所述顶表面之上。在本文中,在所述传递衬底内或在所述传递衬底与所述有源层之间不存在硅晶体。所述多层重新分布结构包含多个凸起结构,所述多个凸起结构位于所述多层重新分布结构的底部处并且电耦接到所述传递装置管芯的所述FEOL部分。
Description
技术领域
本公开涉及一种射频(RF)装置和其制造过程,并且更具体地涉及具有增强的热性能和增强的电性能的RF装置,以及提供具有增强性能的RF装置的晶圆级制造和封装工艺。
背景技术
蜂窝装置和无线装置的广泛利用驱动了射频(RF)技术的快速发展。在其上制造RF装置的衬底在实现RF技术的高水平性能方面发挥着重要作用。在常规的硅衬底上制造RF装置可以受益于低成本的硅材料、大规模的晶圆生产能力、完善的半导体设计工具和完善的半导体制造技术。尽管使用常规的硅衬底对RF装置制造有益处,但在本行业中众所周知,常规的硅衬底可能对于RF装置具有两个不期望的性质:谐波失真和低电阻率值。谐波失真是在硅衬底之上构建的RF装置中实现高水平线性化的关键障碍。
另外,高速且高性能的晶体管更密集地集成在RF装置中。因此,由于大量晶体管集成在RF装置上,大量功率穿过晶体管,和/或晶体管操作速度高,由RF装置产生的热量将显著增加。因此,期望将RF装置封装在用于实现更好的散热的配置中。
晶圆级扇出型(WLFO)技术和嵌入式晶圆级球栅阵列型(eWLB)技术目前在便携式RF应用中引起了广泛关注。WLFO和eWLB技术被设计成在不增加封装体大小的情况下提供高密度输入/输出(I/O)端口。这种能力允许在单个晶圆内密集地封装RF装置。
为了提高RF装置的操作速度和性能,适应RF装置发热量的增加,减少RF装置的有害谐波失真,并且利用WLFO/eWLB技术的优势,因此本公开的目的是提供一种改进的用于具有增强性能的RF装置的晶圆级制造和封装工艺。进一步地,还需要在不增加装置大小的情况下增强RF装置的性能。
发明内容
本公开涉及一种具有增强性能的射频(RF)装置和其制造过程。所公开的RF装置包含传递装置管芯(transfer device die)和多层重新分布结构。所述传递装置管芯包含装置区域和传递衬底,所述装置区域具有前段制程(front-end-of-line,FEOL)部分和后段制程(back-end-of-line,BEOL)部分。在本文中,所述FEOL部分位于所述BEOL部分之上,并且包含隔离区段和有源层,所述有源层被所述隔离区段围绕并且未竖直延伸超过隔离区段。所述装置区域具有平坦化的顶表面。所述传递衬底位于所述装置区域的所述顶表面之上。在所述传递衬底内或在所述传递衬底与所述装置区域内的所述有源层之间不存在不具有锗、氮或氧含量的硅晶体。包含多个凸起结构的所述多层重新分布结构形成于所述传递装置管芯的所述BEOL部分之下。所述凸起结构位于所述多层重新分布结构的底表面上并且电耦接到所述传递装置管芯的所述FEOL部分。
在所述RF装置的一个实施例中,所述传递衬底的热导率大于10W/m·K并且电阻率大于1E5 Ohm-cm。
在所述RF装置的一个实施例中,所述传递衬底由以下中的一种形成:蓝宝石、导热石英、氮化铝、氮化硼和氧化铍。
在所述RF装置的一个实施例中,所述传递衬底的厚度介于10μm与1000μm之间。
在所述RF装置的一个实施例中,所述有源层由应变硅外延层形成,在300K的温度下,所述应变硅外延层中的硅的晶格常数大于5.461。
在所述RF装置的一个实施例中,所述BEOL部分包含连接层,所述FEOL部分进一步包含接触层,并且所述多层重新分布结构进一步包含重新分布互连部。在本文中,所述有源层和所述隔离区段位于所述接触层之上,并且所述BEOL部分位于所述接触层之下。所述凸起结构通过所述多层重新分布结构内的所述重新分布互连部和所述BEOL部分内的所述连接层电耦接到所述传递装置管芯的所述FEOL部分。
在所述RF装置的一个实施例中,所述装置区域进一步包含钝化层,所述钝化层位于所述有源层之上并被所述隔离区段围绕。在本文中,所述钝化层由二氧化硅形成。每个隔离区段的顶表面和所述钝化层的顶表面共面并形成所述装置区域的所述顶表面。
在所述RF装置的一个实施例中,每个隔离区段的顶表面和所述有源层的顶表面共面并形成所述装置区域的所述顶表面。
在所述RF装置的一个实施例中,所述传递装置管芯进一步包含由氮化硅形成的阻挡层,所述阻挡层耦接在所述装置区域的所述顶表面与所述传递衬底之间。
在所述RF装置的一个实施例中,所述FEOL部分被配置成提供开关场效应晶体管(FET)、二极管、电容器、电阻器或电感器中的至少一个。
根据另一个实施例,替代性RF装置包含传递装置管芯和多层重新分布结构。所述传递装置管芯包含装置区域和传递衬底,所述装置区域具有FEOL部分和BEOL部分。在本文中,所述FEOL部分位于所述BEOL部分之上,并且包含隔离区段和有源层,所述有源层被所述隔离区段围绕并且未竖直延伸超过隔离区段。所述装置区域具有平坦化的顶表面。所述传递衬底位于所述装置区域的所述顶表面之上。在所述传递衬底内或在所述传递衬底与所述装置区域内的所述有源层之间不存在不具有锗、氮或氧含量的硅晶体。形成于所述传递装置管芯的所述BEOL部分之下的所述多层重新分布结构水平延伸超过所述传递装置管芯。所述多层重新分布结构包含多个凸起结构,所述多个凸起结构位于所述多层重新分布结构的底表面上并且电耦接到所述传递装置管芯的所述FEOL部分。所述替代性RF装置进一步包含模制化合物,所述模制化合物位于所述多层重新分布结构之上以包封所述传递装置管芯。
在所述替代性RF装置的一个实施例中,所述传递衬底的热导率大于10W/m·K并且电阻率大于1E5 Ohm-cm。
在所述替代性RF装置的一个实施例中,所述传递衬底由以下中的一种形成:蓝宝石、导热石英、氮化铝、氮化硼和氧化铍。
在所述替代性RF装置的一个实施例中,所述传递衬底的厚度介于10μm与1000μm之间。
在所述替代性RF装置的一个实施例中,所述有源层由应变硅外延层形成,在300K的温度下,所述应变硅外延层中的硅的晶格常数大于5.461。
在所述替代性RF装置的一个实施例中,所述BEOL部分包含连接层,所述FEOL部分进一步包含接触层,并且所述多层重新分布结构进一步包含重新分布互连部。在本文中,所述有源层和所述隔离区段位于所述接触层之上,并且所述BEOL部分位于所述接触层之下。所述凸起结构通过所述多层重新分布结构内的所述重新分布互连部和所述BEOL部分内的所述连接层电耦接到所述传递装置管芯的所述FEOL部分。
在所述替代性RF装置的一个实施例中,所述装置区域进一步包含钝化层,所述钝化层位于所述有源层之上并被所述隔离区段围绕。在本文中,所述钝化层由二氧化硅形成。每个隔离区段的顶表面和所述钝化层的顶表面共面并形成所述装置区域的所述顶表面。
在所述替代性RF装置的一个实施例中,每个隔离区段的顶表面和所述有源层的顶表面共面并形成所述装置区域的所述顶表面。
在所述替代性RF装置的一个实施例中,所述传递装置管芯进一步包含由氮化硅形成的阻挡层,所述阻挡层耦接在所述装置区域的所述顶表面与所述传递衬底之间。
在所述替代性RF装置的一个实施例中,所述FEOL部分被配置成提供开关FET、二极管、电容器、电阻器或电感器中的至少一个。
根据示例性过程,首先提供前体晶圆,所述前体晶圆包含多个完整的装置区域、多个单独的界面层和硅处理衬底。每个完整的装置区域包含BEOL部分和位于所述BEOL部分之上的完整的FEOL部分。所述完整的FEOL部分具有有源层和完整的隔离区段,所述隔离区段竖直延伸超过所述有源层并围绕所述有源层。在本文中,每个单独的界面层位于一个有源层之上,并且被对应的完整的装置区域的所述完整的隔离区段围绕。每个单独的界面层由SiGe形成。所述硅处理衬底位于每个完整的隔离区段和每个单独的界面层之上。接下来,完全去除所述硅处理衬底。然后将所述完整的隔离区段减薄,以提供具有平坦化顶表面的经减薄晶圆。所述经减薄晶圆包含多个装置区域,并且每个装置区域的顶表面的组合形成所述经减薄晶圆的所述平坦化顶表面。每个装置区域包含所述BEOL部分和位于所述BEOL部分之上的FEOL部分。所述FEOL部分具有所述有源层和所述经减薄隔离区段,所述隔离区段围绕所述有源层。传递衬底附接到所述经减薄晶圆的所述顶表面,以提供包含多个传递装置管芯的传递装置晶圆。在本文中,在所述传递衬底内或每个装置区域的所述有源层与所述传递衬底之间不存在不具有锗、氮或氧含量的硅晶体。每个传递装置管芯包含对应的装置区域和所述传递衬底的位于所述对应的装置区域之上的一部分。
在所述示例性过程的一个实施例中,所述传递衬底的热导率大于10W/m·K并且电阻率大于1E5 Ohm-cm。
在所述示例性过程的一个实施例中,所述传递衬底由以下中的一种形成:蓝宝石、导热石英、氮化铝、氮化硼和氧化铍。
在所述示例性过程的一个实施例中,所述传递衬底的厚度介于10μm与1000μm之间。
根据另一个实施例,所述示例性过程进一步包含,在去除所述硅处理衬底之前,通过接合层将所述前体晶圆与临时载体接合;以及在附接所述传递衬底之后,将所述临时载体与所述传递装置晶圆解除接合并且将所述接合层从所述传递装置晶圆清除。
根据另一个实施例,所述示例性过程进一步包含在所述传递装置晶圆之下形成多层重新分布结构。在本文中,所述多层重新分布结构包含所述多层重新分布结构的底表面上的多个凸起结构和所述多层重新分布结构内的重新分布互连部。每个凸起结构通过所述多层重新分布结构内的所述重新分布互连部和对应的传递装置管芯的所述BEOL部分内的连接层电耦接到所述对应的传递装置管芯的一个有源层。
根据另一个实施例,所述示例性过程进一步包含将所述传递装置晶圆单切成多个单独的传递装置管芯。然后在每个单独的传递装置管芯周围和之上施涂模制化合物,以提供模制装置晶圆。在本文中,所述模制化合物包封每个单独的传递装置管芯的顶表面和侧表面,而每个单独的传递装置管芯的底表面暴露。所述模制装置晶圆的底表面是每个单独的传递装置管芯的所述底表面和所述模制化合物的底表面的组合。接下来,在所述模制装置晶圆之下形成多层重新分布结构。所述多层重新分布结构包含所述多层重新分布结构的底表面上的多个凸起结构和所述多层重新分布结构内的重新分布互连部。每个凸起结构通过所述多层重新分布结构内的所述重新分布互连部和对应的单独的传递装置管芯的所述BEOL部分内的连接层电耦接到所述对应的单独的传递装置管芯的一个有源层。
根据另一个实施例,所述示例性过程进一步包含在去除所述硅处理衬底之后并且在减薄所述完整的隔离区段之前去除每个单独的界面层。如此,在所述减薄步骤之后,每个装置区域的所述平坦化顶表面由对应的有源层的顶表面和对应的经减薄隔离区段的顶表面形成。
根据另一个实施例,所述示例性过程进一步包含在去除所述硅处理衬底之后并且在减薄所述完整的隔离区段之前去除每个单独的界面层并且在对应的有源层之上施涂钝化层。如此,在所述减薄步骤之后,每个装置区域的所述平坦化顶表面由对应的钝化层的顶表面和对应的经减薄隔离区段的顶表面形成。
在所述示例性过程的一个实施例中,通过等离子体增强沉积工艺、阳极氧化工艺和基于臭氧的氧化工艺中的一种工艺来施涂所述钝化层。
根据另一个实施例,所述示例性过程进一步包含在将所述传递衬底附接到所述经减薄晶圆之前,在所述经减薄晶圆的所述顶表面之上施涂阻挡层。在本文中,所述阻挡层由氮化硅形成。
在所述示例性过程的一个实施例中,提供所述前体晶圆始于提供起始晶圆,所述起始晶圆包含公共硅外延层、位于所述公共硅外延层之上的公共界面层和位于所述公共界面层之上的硅处理衬底。然后执行互补金属氧化物半导体(CMOS)工艺以提供所述前体晶圆。在本文中,所述完整的隔离区段延伸穿过所述公共硅外延层和所述公共界面层并且延伸到所述硅处理衬底中,使得所述公共界面层分离成所述单独的界面层,并且所述公共硅外延层分离成多个单独的硅外延层。每个有源层由对应的单独的硅外延层形成。
在所述示例性过程的一个实施例中,通过机械研磨工艺,随后通过蚀刻工艺去除所述硅处理衬底。
在所述示例性过程的一个实施例中,通过使用蚀刻剂化学物质的蚀刻工艺来去除所述硅处理衬底,所述蚀刻剂化学物质是氢氧化四甲铵(TMAH)、氢氧化钾(KOH)、氢氧化钠(NaOH)、乙酰胆碱(ACH)和二氟化氙(XeF2)中的至少一种。
在所述示例性过程的一个实施例中,通过具有氯基气体化学物质的反应离子蚀刻系统去除所述硅处理衬底。
在所述示例性过程的一个实施例中,所述传递衬底通过由以下组成的组中的一种附接到所述经减薄晶圆的所述顶表面:阳极接合、等离子体接合和聚合物粘合剂接合。
本领域的技术人员将在结合附图阅读优选实施例的以下详细描述之后了解本公开的范围并且认识到本公开的另外的方面。
附图说明
并入本说明书中并且形成本说明书的一部分的附图展示了本公开的若干方面,并且与说明书一起用于解释本公开的原理。
图1示出了根据本公开的一个实施例的具有增强性能的示例性射频(RF)装置。
图2示出了根据本公开的一个实施例的具有增强的热性能和增强的电性能的替代性RF装置。
图3A-15示出了展示了提供图1所示的示例性RF装置的步骤的示例性晶圆级制造和封装工艺。
图16-21示出了展示了提供图2所示的替代性RF装置的步骤的替代性晶圆级制造和封装工艺。
应当理解,为了清楚说明,图1-21可以不按比例绘制。
具体实施方式
下文阐述的实施例表示使本领域的技术人员能够实践实施例的必要信息,并且展示了实践实施例的最佳方式。在根据附图阅读以下说明时,本领域的技术人员将理解本公开的概念并且将认识到本文中未特别提出的这些概念的应用。应当理解,这些概念和应用落入本公开和所附权利要求的范围内。
应当理解,尽管本文中可以使用术语第一、第二等来描述各种元件,但是这些元件不应受到这些术语的限制。这些术语仅用于将一个元件与另一个元件相区分。例如,在不偏离本公开的范围的情况下,第一元件可以被称为第二元件,并且类似地,第二元件可以被称为第一元件。如本文所使用的,术语“和/或”包含相关联列举项中的一个或多个的任何组合和全部组合。
应当理解,当如层、区域或衬底等元件被称为“在另一个元件上”或延伸“到另一个元件上”时,其可以直接在其它元件上或直接延伸到其它元件上或者还可以存在中间元件。相比之下,当元件被称为“直接地在另一个元件上”或“直接地延伸到另一个元件上”时,不存在中间元件。同样,应当理解,当如层、区域或衬底等元件被称为“在另一个元件之上”或“在另一个元件之上”延伸时,其可以直接在另一个元件之上或直接在另一个元件之上延伸,或者还可以存在中间元件。相比之下,当元件被称为“直接在另一个元件之上”或“直接在另一个元件之上延伸”时,不存在中间元件。还应当理解,当元件被称为“连接”或“耦接”到另一个元件时,其可以直接地连接或耦接到其它元件,或者可以存在中间元件。相比之下,当元件被称为“直接地连接”或“直接地耦接”到另一个元件时,不存在中间元件。
在本文中可以使用如“下方(below)”或“上方(above)”或“上部(upper)”或“下部(lower)”或“水平”或“竖直”或“之上(over)”或“之下(under)”等相对术语来描述如图所示的一个元件、层或区域与另一个元件、层或区域的关系。应当理解,除了附图中描绘的朝向之外,这些术语和上文所讨论的那些术语旨在涵盖装置的不同朝向。
本文所使用的术语仅出于描述特定实施例的目的并且不旨在限制本公开。如本文所使用的,单数形式“一个(a)”、“一种(an)”和“所述(the)”旨在同样包含复数形式,除非上下文另有明确指示。应进一步理解,当在本文中使用时,术语“包括(comprises)”、“包括(comprising)”、“包含(includes)”和/或“包含(including)”指定所陈述的特征、整体、步骤、操作、元件和/或组件的存在,但不排除一个或多个其它特征、整体、步骤、操作、元件、组件和/或其组合的存在或添加。
除非另外限定,否则本文所使用的所有术语(包含技术术语和科技术语)具有本公开所属领域的普通技术人员通常所理解的相同含义。应进一步理解的是,本文所使用的术语应被解释为具有与其在本说明书和相关领域的上下文中的含义一致的含义,并且除非本文中明确地如此定义,否则将不会在理想化的或过度正式的意义上进行解释。
随着预期未来几年常规的射频绝缘体上硅(RFSOI)晶圆将出现短缺,替代性技术正在被设计成使用硅晶圆、富陷阱层形成和智能切割SOI晶圆工艺以满足高电阻率需求。一种替代性技术基于在硅衬底与硅外延层之间使用硅锗(SiGe)界面层而不是埋入式氧化物层(BOX)。然而,这种技术将仍然遭受由硅衬底造成的有害失真效应,与在RFSOI技术中所观察到的类似。本公开涉及一种具有增强性能的射频(RF)装置,以及用于制造所述装置的晶圆级制造和封装工艺,其利用了SiGe界面层,而没有来自硅衬底的有害变形效应。
图1示出了根据本公开的一个实施例的具有增强性能的示例性RF装置10。出于这种说明的目的,示例性RF装置10包含具有装置区域14和传递衬底16的传递装置管芯12,以及形成于传递装置管芯12的装置区域14之下的多层重新分布结构18。
具体地,装置区域14包含前段制程(FEOL)部分20和位于FEOL部分20之下的后段制程(BEOL)部分22。在一个实施例中,FEOL部分20可以被配置成提供开关场效应晶体管(FET),并且包含有源层24和接触层26。有源层24可以由弛豫硅外延层或应变硅外延层形成,并且包含源极28、漏极30以及介于源极28与漏极30之间的沟道32。在本文中,弛豫硅外延层是指硅外延层,其中在300K的温度下,硅的晶格常数为5.431。应变硅外延层是指硅外延层,其中在300K的温度下,硅的晶格常数大于弛豫硅外延层中的晶格常数,如大于5.461、或大于5.482、或大于5.493或大于5.515。如此,与弛豫硅外延层相比,应变硅外延层中的电子的迁移率可以增强。因此,与由弛豫硅外延层形成的FET相比,由应变硅外延层形成的FET的开关速度可以更快。
接触层26形成于有源层24之下,并且包含栅极结构34、源极触点36、漏极触点38和栅极触点40。栅极结构34可以由氧化硅形成,并且在沟道32之下水平延伸(例如,从源极28之下延伸到漏极30之下)。源极触点36连接到源极28并位于所述源极之下,漏极触点38连接到漏极30并位于所述漏极之下,并且栅极触点40连接到栅极结构34并位于所述栅极结构之下。绝缘材料42可以在源极触点36、漏极触点38、栅极结构34和栅极触点40周围形成,以将源极28、漏极30和栅极结构34电分离。在不同的应用中,FEOL部分20可以具有不同的FET配置或提供不同的装置组件,如二极管、电容器、电阻器和/或电感器。
另外,FEOL部分20还包含隔离区段44,所述隔离区段位于接触层26的绝缘材料42之上并且围绕有源层24。隔离区段44被配置成将RF装置10尤其是有源层24与形成于公共晶圆中的其它装置电分离(未示出)。隔离区段44可以由二氧化硅形成,所述二氧化硅可以抗蚀刻化学物质,如氢氧化四甲铵(TMAH)、二氟化氙(XeF2)、氢氧化钾(KOH)、氢氧化钠(NaOH)或乙酰胆碱(ACH),并且可以抗干法蚀刻系统,如具有氯基气体化学物质的反应离子蚀刻(RIE)系统。
在一些应用中,装置区域14进一步包含可以由二氧化硅形成的钝化层48,以使有源层24钝化。钝化层48沉积在有源层24的顶表面之上,并且被隔离区段44围绕。在一个实施例中,钝化层48的顶表面和隔离区段44的顶表面共面。钝化层48被配置成终止有源层24的表面接合,这可能是不想要的泄漏的原因。
在一些应用中,装置区域14进一步包含由SiGe形成的位于有源层24的顶表面之上并且被隔离区段44围绕的界面层和/或缓冲结构(未示出)(在以下段落中描述,本文中未示出)。如果钝化层48、缓冲结构和界面层存在,则界面层和缓冲结构竖直位于有源层24与钝化层48之间。在本文中,钝化层48的顶表面和隔离区段44的顶表面共面。如果省略了钝化层48,并且界面层和/或缓冲结构存在,则界面层的顶表面(或缓冲结构的顶表面)和隔离区段44的顶表面共面(未示出)。如果省略了钝化层48、缓冲结构和界面层,则有源层24的顶表面和隔离区段44的顶表面共面(未示出)。应当注意,不管钝化层48、缓冲结构和/或界面层的存在,装置区域14的顶表面(隔离区段44的顶表面和钝化层48的顶表面的组合、隔离区段44的顶表面和界面层的顶表面的组合、隔离区段44的顶表面和缓冲结构的顶表面的组合或者隔离区段44的顶表面和有源层24的顶表面的组合)总是平坦化的。
传递衬底16位于装置区域14的顶表面之上。在装置区域14中产生的热量可以向上行进到传递衬底16的位于所述有源层24之上的底部部分,并且然后将向下穿过装置区域14并朝向多层重新分布结构18,这将消散热量。因此,非常期望传递衬底16具有高热导率,尤其是对于有源层24附近的部分。在本文中,传递衬底16的高热导率介于2W/m·K与500W/m·K之间(期望高于10W/m·K),并且高电阻率介于1E5 Ohm-cm与1E14 Ohm-cm之间。用于形成传递衬底16的合适的衬底材料可以包含蓝宝石、导热石英和陶瓷材料,如氮化铝、氮化硼等。传递衬底16也可以由氧化铍形成。传递衬底16的厚度基于RF装置10所需的热性能、装置布局、距多层重新分布结构18的距离以及封装体和组合件的细节。传递衬底16的厚度可以介于10μm与1000μm之间。
在一些应用中,传递装置管芯12可以进一步包含阻挡层,所述阻挡层耦接在装置区域14的顶表面与传递衬底16之间(未示出)。此阻挡层可以由厚度介于与 之间的氮化硅形成。阻挡层被配置成对可能扩散到有源层24的沟道32中并且引起装置的可靠性问题的湿气和杂质提供极好的阻挡。另外,阻挡层可以被配置成增强装置区域14与传递衬底16之间的粘附性。应当注意,不管阻挡层、钝化层48或界面层的存在,在传递衬底16内或传递衬底16与有源层24的顶表面之间不存在不具有锗、氮或氧含量的硅晶体。阻挡层、钝化层48和界面层中的每一个都由硅复合物形成。
BEOL部分22位于FEOL部分20之下,并且包含形成于介电层52内的多个连接层50。连接层50中的一些连接层(用于内部连接)由介电层52包封(未示出),而连接层50中的一些连接层具有未被介电层52覆盖的底部部分。某些连接层50电连接到FEOL部分20。出于这种说明的目的,连接层50之一连接到源极触点36,并且另一个连接层50连接到漏极触点38。
形成于传递装置管芯12的BEOL部分22之下的多层重新分布结构18包含多个重新分布互连部54、介电图案56和多个凸起结构58。在本文中,每个重新分布互连部54连接到BEOL部分22内的对应的连接层50,并且在BEOL部分22的底表面之上延伸。重新分布互连部54与连接层50之间的连接是无焊料的。介电图案56形成于每个重新分布互连部54的周围和之下。重新分布互连部54中的一些重新分布互连部(将传递装置管芯12连接到由同一晶圆形成的其它装置组件)可以被介电图案56包封(未示出),而重新分布互连部54中的一些重新分布互连部具有通过介电图案56暴露的底部部分。每个凸起结构58形成于多层重新分布结构18的底表面处,并且通过介电图案56电耦接到对应的重新分布互连部54。如此,重新分布互连部54被配置成将凸起结构58连接到BEOL部分22中的连接层50中的电连接到FEOL部分20的某些连接层。因此,凸起结构58通过对应的重新分布互连部54和对应的连接层50电连接到FEOL部分20。另外,凸起结构58彼此分离,并且从介电图案56凸出。
在一些应用中,可以存在通过介电图案56电耦接到重新分布互连部54的额外的重新分布互连部(未示出),以及形成于介电图案56之下的额外的介电图案(未示出),使得一些额外的重新分布互连部的底部部分可以暴露。因此,每个凸起结构58通过额外的介电图案(未示出)耦接到对应的额外的重新分布互连部。不管重新分布互连部和/或介电图案的层数如何,多层重新分布结构18可以不含玻璃纤维或不含玻璃。在本文中,玻璃纤维是指扭曲成更大分组的单独的玻璃原丝。然后,这些玻璃原丝可以编织成织物。重新分布互连部54可以由铜或其它合适的金属形成。介电图案56可以由苯并环丁烯(BCB)、聚酰亚胺或其它介电材料形成。凸起结构58可以是焊料球或铜柱。多层重新分布结构18的厚度介于2μm与300μm之间。
图2示出了与如图1所示的RF装置10相比,进一步包含模制化合物60的替代性RF装置10A。在本文中,多层重新分布结构18可以水平延伸超过传递装置管芯12,并且模制化合物60位于多层重新分布结构18之上以包封传递装置管芯12。在此实施例中,多层重新分布结构18的重新分布互连部54可以水平延伸超过传递装置管芯12,并且多层重新分布结构18的凸起结构58可以不被限制在传递装置管芯12的外围内。模制化合物60可以是有机环氧树脂体系等。
图3A-15提供了展示了制造图1所示的示例性RF装置10的步骤的示例性晶圆级制造和封装工艺。尽管示例性步骤以系列展示,但是示例性步骤不一定取决于顺序。一些步骤可能会以不同于所呈现的顺序进行。进一步地,本公开范围内的过程可以包含比图3A-15所展示的步骤更少或更多的步骤。
首先,如图3A和3B所展示的,提供起始晶圆62。起始晶圆62包含公共硅外延层64、位于公共硅外延层64之上的公共界面层66和位于公共界面层66之上的硅处理衬底68。在本文中,公共硅外延层64由具有形成电子装置所期望的硅外延特性的装置级硅材料形成。硅处理衬底68可以由常规的低成本、低电阻率和高介电常数的硅组成,在300K的温度下,所述硅的晶格常数为约5.431。公共界面层66由SiGe形成,所述公共界面层将公共硅外延层64与硅处理衬底68分离。
在固定温度例如300K下,弛豫硅的晶格常数为而弛豫Si1-xGex的晶格常数取决于锗浓度,如弛豫SiGe的晶格常数大于弛豫硅的晶格常数。如果公共界面层66直接生长在硅处理衬底68之下,则公共界面层66中的晶格常数将因硅处理衬底68而产生应变(降低)。如果公共硅外延层64直接生长在公共界面层66之下,则公共硅外延层64中的晶格常数可以保持为原始弛豫形式(与硅衬底中的晶格常数大约相同)。因此,公共硅外延层64可能不会增强电子迁移率。
在一个实施例中,公共缓冲结构70可以形成于硅处理衬底68与公共界面层66之间,如图3A所展示的。公共缓冲结构70允许从硅处理衬底68到公共界面层66的晶格常数转变。公共缓冲结构70可以包含多层,并且可以由具有竖直分级的锗浓度的SiGe形成。公共缓冲结构70内的锗浓度可以从顶侧(硅处理衬底68附近)处的0%增加到底侧(公共界面层66附近)处的X%。X%可以取决于公共界面层66内的锗浓度,如15%、或25%、或30%或40%等。在本文中,生长在公共缓冲结构70之下的公共界面层66可以以弛豫形式保持其晶格常数,并且可以未产生应变(减小)以匹配硅处理衬底68的晶格常数。锗浓度在整个公共界面层66中可以是均匀的,并且大于15%、25%、30%或40%,使得在300K的温度下,公共界面层66中的弛豫SiGe的晶格常数大于5.461、或大于5.482、或大于5.493或大于5.515。
在本文中,公共硅外延层64直接生长在弛豫公共界面层66之下,使得公共硅外延层64的晶格常数匹配(拉伸为)弛豫公共界面层66中的晶格常数。因此,在300K的温度下,应变公共硅外延层64中的晶格常数可以大于5.461、或大于5.482、或大于5.493或大于5.515,并且因此大于弛豫硅外延层中的晶格常数(例如,在300K的温度下为5.431)。应变公共硅外延层64的电子迁移率可以比弛豫硅外延层的电子迁移率高。公共硅外延层64的厚度可以介于700nm与2000nm之间,公共界面层66的厚度可以介于与之间,公共缓冲结构70的厚度可以介于100nm与1000nm之间,并且硅处理衬底68的厚度可以介于200μm与700μm之间。
在另一个实施例中,公共界面层66可以直接形成于硅处理衬底68之下,并且公共缓冲结构70可以形成于公共界面层66与公共硅外延层64之间,如图3B所展示的。在本文中,公共界面层66的晶格常数可以因硅处理衬底68而产生应变(减小)。公共缓冲结构70仍然可以由具有竖直分级的锗浓度的SiGe形成。公共缓冲结构70内的锗浓度可以从顶侧(公共界面层66附近)处的0%增加到底侧(公共硅外延层64附近)处的X%。X%可以为15%、或25%、或30%或40%。公共缓冲结构70的底侧处的晶格常数大于公共缓冲结构70的顶侧处的晶格常数。在本文中,生长在公共缓冲结构70之下的公共硅外延层64的晶格常数匹配(拉伸为)公共缓冲结构70的底侧处的晶格常数。因此,应变公共硅外延层64中的晶格常数大于弛豫硅外延层中的晶格常数(例如,在300K的温度下为5.431)。
在一些应用中,省略了公共缓冲结构70(未示出)。公共界面层66直接生长在硅处理衬底68之下,并且公共硅外延层64直接生长在公共界面层66之下。如此,公共界面层66中的晶格常数产生应变(降低)以匹配硅处理衬底68中的晶格常数,并且公共硅外延层64中的晶格常数保持为原始弛豫形式(与硅衬底中的晶格常数大约相同)。
接下来,对起始晶圆62(在图3A中)执行互补金属氧化物半导体(CMOS)工艺,以提供具有多个完整的装置区域14'的前体晶圆72,如图4所展示的。每个完整的装置区域14'包含完整的FEOL部分20'和位于完整的FEOL部分20'之下的BEOL部分22,所述完整的FEOL部分具有有源层24、接触层26和完整的隔离区段44'。出于这种说明的目的,完整的FEOL部分20'被配置成提供开关FET。在不同的应用中,完整的FEOL部分20'可以具有不同的FET配置或提供不同的装置组件,如二极管、电容器、电阻器和/或电感器。
在一个实施例中,每个完整的装置区域14'的完整的隔离区段44'延伸穿过公共硅外延层64、公共界面层66和公共缓冲结构70并且延伸到硅处理衬底68中。如此,公共缓冲结构70分离成多个单独的缓冲结构70I,公共界面层66分离成多个单独的界面层66I,并且公共硅外延层64分离成多个单独的硅外延层64I。每个单独的硅外延层64I用于在一个完整的装置区域14'中形成对应的有源层24。完整的隔离区段44'可以通过浅沟槽隔离(STI)形成。如果有源层24由一个具有应变(增加的)晶格常数的单独的硅外延层64I形成,则基于有源层24的FET可以比由具有弛豫晶格常数的弛豫硅外延层形成的FET具有更快的开关速度(更低的导通电阻)。
有源层24的顶表面与位于对应的缓冲结构70I之下的对应的界面层66I接触。硅处理衬底68位于每个单独的缓冲结构70I之上,并且硅处理衬底68的一部分可以位于完整的隔离区段44'之上。完整的装置区域14'的至少包含所述多个连接层50和介电层52的BEOL部分22形成于完整的FEOL部分20'的接触层26之下。某些连接层50的底部部分通过位于BEOL部分22的底表面处的介电层52暴露。
在完成前体晶圆72后,前体晶圆72然后与临时载体74接合,如图5所展示的。前体晶圆72可以通过为临时载体74提供平坦化表面的接合层76与临时载体74接合。从成本和热膨胀的角度来看,临时载体74可以是厚的硅晶圆,但是也可以构造成玻璃、蓝宝石或任何其它合适的载体材料。接合层76可以是跨接式聚合粘合膜(span-on polymeric adhesivefilm),如布鲁尔科技公司(Brewer Science)WaferBOND临时粘合材料系列。
然后选择性地去除硅处理衬底68以提供蚀刻的晶圆78,如图6所展示的。在每个单独的缓冲结构70I或每个界面层66I处停止选择性去除。去除硅处理衬底68可以在每个有源层24之上和完整的隔离区段44'内提供开口79。去除硅处理衬底68可以通过机械研磨工艺和蚀刻工艺来提供,或者通过蚀刻工艺本身来提供。作为实例,硅处理衬底68可以被研磨到更薄的厚度,以减少随后的蚀刻时间。然后执行蚀刻工艺以至少完全去除剩余的硅处理衬底68。由于硅处理衬底68、单独的缓冲结构70I和单独的界面层66I具有不同的锗浓度,其可能对相同的蚀刻技术具有不同的反应(例如:在相同的蚀刻剂下有不同蚀刻速度)。因此,蚀刻系统可以能够标识单独的缓冲结构70I或单独的界面层66I的存在(锗的存在),并且能够指示何时停止蚀刻工艺。通常,锗浓度越高,硅处理衬底68与单独的缓冲结构70I之间(或硅处理衬底68与单独的界面层66I之间)的蚀刻选择性越好。蚀刻工艺可以由具有蚀刻化学物质的湿法蚀刻系统提供,所述蚀刻化学物质是TMAH、KOH、NaOH、ACH和XeF2中的至少一种,或者由如具有氯基气体化学物质的反应离子蚀刻系统等干法蚀刻系统提供。
在去除工艺期间,不去除完整的隔离区段44'并且保护每个有源层24的侧面。接合层76和临时载体74保护每个BEOL部分22的底表面。在本文中,在去除步骤之后,每个完整的隔离区段44'的顶表面和每个单独的缓冲结构70I(或每个单独的界面层66I)的顶表面暴露。由于SiGe材料的窄间隙性质,单独的缓冲结构70I和/或单独的界面层66I可能是传导的(对于某些类型的装置)。单独的缓冲结构70I和/或单独的界面层66I可能在有源层24的源极28与漏极30之间导致明显的泄漏。因此,在如FET开关应用等一些应用中,也期望去除单独的缓冲结构70I和单独的界面层66I,如图7所展示的。每个有源层24在对应的开口79的底部处暴露。单独的缓冲结构70I和单独的界面层66I可以通过用于去除硅处理衬底68的相同蚀刻工艺来去除,或者可以通过如氯基干法蚀刻系统等另一种蚀刻工艺来去除。在本文中,如果每个单独的界面层66I足够薄,其可能不会在FEOL部分20的源极28与漏极30之间导致任何明显的泄漏。在所述情况下,可以留下单独的界面层66I(未示出)。类似地,如果单独的界面层66I和单独的缓冲结构70I两者都足够薄,其可能不会在FEOL部分20的源极28与漏极30之间导致任何明显的泄漏。使得可以留下单独的界面层66I和单独的缓冲结构70I(未示出)。
在一些应用中,在去除硅处理衬底68、单独的缓冲结构70I和单独的界面层66I之后,每个有源层24可以被钝化以在装置中实现适当的低水平电流泄漏。钝化层48可以形成于每个有源层24之上并且位于每个完整的FEOL部分20'的开口79内,如图8所展示的。钝化层48可以通过等离子体增强沉积工艺、阳极氧化工艺、基于臭氧的氧化工艺和多种其它的合适的技术由二氧化硅形成。钝化层48被配置成终止有源层24的顶表面处的表面接合,这可能是不想要的泄漏的原因。
接下来,完整的隔离区段44'经减薄作为隔离区段44,以提供具有平坦化顶表面的经减薄晶圆80,如图9所展示的。经减薄晶圆80包含多个装置区域14,并且每个装置区域14的顶表面的组合形成了经减薄晶圆80的平坦化顶表面。在本文中,如果施涂钝化层48,则每个钝化层48的顶表面和每个隔离区段44的顶表面共面。如果省略了钝化层48,并且单独的界面层66I(和/或单独的缓冲结构70I存在),则每个隔离区段44的顶表面和每个单独的界面层66I的顶表面(或每个单独的缓冲结构70I的顶表面)共面(未示出)。如果省略了钝化层48、单独的缓冲结构70I和单独的界面层66I,则每个有源层24的顶表面和每个隔离区段44的顶表面共面(未示出)。不管钝化层48、单独的缓冲结构70I和/或单独的界面层66I的存在,每个装置区域14的顶表面总是平坦化的。平坦化步骤可以通过使用合适的浆液和抛光轮等的化学机械抛光(CMP)工艺来完成。
然后,传递衬底16接合到经减薄晶圆80的顶表面以提供传递装置晶圆82,如图10所展示的。由于经减薄晶圆80的顶表面是平坦化的,因此传递装置晶圆82在接合区域处没有任何空隙或缺陷。传递装置晶圆82包含多个传递装置管芯12,每个传递装置管芯至少包含装置区域14和传递衬底16的一部分。传递衬底16的高热导率介于2W/m·K与500W/m·K之间,并且高电阻率介于1E5 Ohm-cm与1E14 Ohm-cm之间。传递衬底16可以由蓝宝石、导热石英、陶瓷材料(如氮化铝、氮化硼等)或氧化铍形成。传递衬底16的厚度可以介于10μm与1000μm之间。在此步骤中可以采用多种合适的低温接合工艺,如阳极接合、等离子体接合、聚合物粘合剂接合等。在传递衬底16的接合工艺期间,临时载体74为经减薄晶圆80提供机械强度和刚性。
在一些应用中,在接合传递衬底16之前,可以在经减薄晶圆80的顶表面之上形成阻挡层(未示出)。此阻挡层可以由厚度介于与之间的氮化硅形成。阻挡层被配置成对可能扩散到每个有源层24的沟道32中的湿气和杂质提供极好的阻挡。另外,阻挡层可以被配置成增强经减薄晶圆80与传递衬底16之间的粘附性。应当注意,不管阻挡层、钝化层48或单独的界面层66I的存在,在传递衬底16内或传递衬底16与每个有源层24的顶表面之间不存在不具有锗、氮或氧含量的硅晶体。阻挡层、钝化层48和单独的界面层66I中的每一个都由硅复合物形成。
然后将临时载体74与传递装置晶圆82解除接合,并将接合层76从传递装置晶圆82清除,如图11所展示的。根据先前步骤中选择的临时载体74和接合层76的性质,可以应用多种解除接合工艺和清除工艺。例如,可以在堆叠件被加热到合适的温度的情况下使用侧刃工艺(lateral blade process)对临时载体74进行机械解除接合。如果临时载体74由透明材料形成,其它合适的工艺涉及穿过所述临时载体的UV光照射,或者使用合适的溶剂的化学解除接合。接合层76可以通过如专有溶剂和等离子体清洗等湿法蚀刻或干法蚀刻工艺去除。在解除接合和清除工艺之后,连接层50中的某些连接层的可以用作每个传递装置管芯12的输入/输出(I/O)端口的底部部分通过每个BEOL部分22的底表面处的介电层52暴露。如此,此时可以对每个传递装置晶圆82中的每个传递装置管芯12进行电气验证以确定所述传递装置管芯工作正常。
参考图12到14,根据本公开的一个实施例,多层重新分布结构18形成于传递装置晶圆82之下。尽管重新分布步骤以系列展示,但是重新分布步骤不一定取决于顺序。一些步骤可能会以不同于所呈现的顺序进行。进一步地,本公开范围内的重新分布步骤可以包含比图12-14所展示的步骤更少或更多的步骤。
首先在每个BEOL部分22之下形成多个重新分布互连部54,如图12所展示的。每个重新分布互连部54电耦接到BEOL部分22内的对应的连接层50的暴露的底部部分,并且可以在BEOL部分22的底表面之上延伸。重新分布互连部54与连接层50之间的连接是无焊料的。然后在每个BEOL部分22之下形成介电图案56以部分包封每个重新分布互连部54,如图13所展示的。如此,每个重新分布互连部54的底部部分通过介电图案56暴露。在不同的应用中,可以存在通过介电图案56电耦接到重新分布互连部54的额外的重新分布互连部(未示出),以及形成于介电图案56之下的额外的介电图案(未示出),使得每个额外的重新分布互连部的底部部分暴露。
接下来,形成多个凸起结构58以完成多层重新分布结构18,并且提供晶圆级扇出(WLFO)型封装体84,如图14所展示的。每个凸起结构58形成于多层重新分布结构18的底部处,并且通过介电图案56电耦接到对应的重新分布互连部54的暴露的底部部分。因此,重新分布互连部54被配置成将凸起结构58连接到BEOL部分22中的连接层50中的电连接到FEOL部分20的某些连接层。如此,凸起结构58通过对应的重新分布互连部54和对应的连接层50电连接到FEOL部分20。另外,凸起结构58彼此分离,并且从介电图案56竖直凸出。
多层重新分布结构18可以不含玻璃纤维或不含玻璃。在本文中,玻璃纤维是指扭曲成更大分组的单独的玻璃原丝。然后,这些玻璃原丝可以编织成织物。重新分布互连部54可以由铜或其它合适的金属形成,介电图案56可以由BCB、聚酰亚胺或其它介电材料形成,并且凸起结构58可以是焊料球或铜柱。多层重新分布结构18的厚度介于2μm与300μm之间。图15示出了将WLFO封装体84单切成单独的RF装置10的最后步骤。可以通过在某些隔离区段44处进行探测和分割工艺来提供单切步骤。
在另一个实施例中,图16-21提供了展示了制造图2所示的替代性RF装置10A的步骤的替代性工艺。尽管示例性步骤以系列展示,但是示例性步骤不一定取决于顺序。一些步骤可能会以不同于所呈现的顺序进行。进一步地,本公开范围内的过程可以包含比图16-21所展示的步骤更少或更多的步骤。
如图11所示,在解除接合工艺和清除工艺之后以提供干净的传递装置晶圆82,进行单切步骤以将传递装置晶圆82单切成单独的传递装置管芯12,如图16所展示的。可以通过在某些隔离区段44处进行探测和分割工艺来提供此单切步骤。在本文中,每个传递装置管芯12可以具有相同的高度,并且至少包含具有FEOL部分20和BEOL部分22的装置区域14以及传递衬底16。
接下来,在传递装置管芯12周围和之上施涂模制化合物60,以提供模制装置晶圆86,如图17所展示的。模制化合物60包封每个传递装置管芯12的顶表面和侧表面,而每个传递装置管芯12的底表面即BEOL部分22的底表面是暴露的。模制装置晶圆86的底表面是每个传递装置管芯12的底表面和模制化合物60的底表面的组合。在本文中,连接层50中的某些连接层的底部部分保持在每个传递装置管芯12的底表面处暴露。模制化合物60可以通过各种程序施涂,如片材模制、包覆模制、压缩模制、传递模制、围堰填充包封或丝网印刷包封。与传递衬底16不同,模制化合物60没有热导率或电阻率要求。模制化合物60可以是有机环氧树脂体系等。然后使用固化工艺(未示出)来使模制化合物60硬化。固化温度介于100℃与320℃之间,这取决于哪种材料作为模制化合物60。可以进行研磨工艺(未示出)以提供模制化合物60的平坦化顶表面。
参考图18到20,根据本公开的一个实施例形成多层重新分布结构18。尽管重新分布步骤以系列展示,但是重新分布步骤不一定取决于顺序。一些步骤可能会以不同于所呈现的顺序进行。进一步地,本公开范围内的重新分布步骤可以包含比图18-20所展示的步骤更少或更多的步骤。
首先在模制装置晶圆86之下形成多个重新分布互连部54,如图18所展示的。每个重新分布互连部54电耦接到BEOL部分22内的对应的连接层50,并且可以水平延伸超过对应的传递装置管芯12并且在模制化合物60之下水平延伸。重新分布互连部54与连接层50之间的连接是无焊料的。然后在模制装置晶圆86之下形成介电图案56,以部分包封每个重新分布互连部54,如图19所展示的。如此,每个重新分布互连部54的底部部分通过介电图案56暴露。在不同的应用中,可以存在通过介电图案56电耦接到重新分布互连部54的额外的重新分布互连部(未示出),以及形成于介电图案56之下的额外的介电图案(未示出),使得每个额外的重新分布互连部的底部部分暴露。
接下来,形成多个凸起结构58以完成多层重新分布结构18,并且提供替代性WLFO封装体84A,如图20所展示的。每个凸起结构58形成于多层重新分布结构18的底部处,并且通过介电图案56电耦接到对应的重新分布互连部54的暴露的底部部分。因此,重新分布互连部54被配置成将凸起结构58连接到BEOL部分22中的连接层50中的电连接到FEOL部分20的某些连接层。如此,凸起结构58通过对应的重新分布互连部54和对应的连接层50电连接到FEOL部分20。在本文中,凸起结构58可以不被限制在对应的传递装置管芯12的外围内。另外,凸起结构58彼此分离,并且从介电图案56竖直凸出。
图21示出了将替代性WLFO封装体84A单切成单独的替代性RF装置10A的最后步骤。可以通过在模制化合物60的部分处进行探测和切割工艺来提供单切步骤,所述部分水平地位于相邻的传递装置管芯12之间。
本领域的技术人员将认识到对本公开的优选实施例的改进和修改。所有此类改进和修改都认为是在本文公开的概念和以下权利要求的范围内。
权利要求书(按照条约第19条的修改)
1.一种设备,包括:
●传递装置管芯,所述传递装置管芯包括装置区域和传递衬底,其中:
●所述装置区域包含前段制程(FEOL)部分和位于所述FEOL部分之下的后段制程(BEOL)部分,其中所述FEOL部分包括隔离区段和有源层,所述有源层被所述隔离区段围绕并且未竖直延伸超过所述隔离区段;
●包含所述隔离区段的顶表面的所述装置区域的顶表面是平坦化的;并且
●所述传递衬底位于所述装置区域的所述顶表面之上,其中;
●在所述传递衬底内或在所述传递衬底与所述装置区域内的所述有源层之间不存在不具有锗、氮或氧含量的硅晶体;并且
●在所述传递衬底与所述隔离区段的所述顶表面之间不存在二氧化硅;以及●多层重新分布结构,所述多层重新分布结构形成于所述传递装置管芯的所述BEOL部分之下,其中所述多层重新分布结构包括多个凸起结构,所述多个凸起结构位于所述多层重新分布结构的底表面上并且电耦接到所述传递装置管芯的所述FEOL部分。
2.根据权利要求1所述的设备,其中所述传递衬底的热导率大于10W/m·K并且电阻率大于1E5 Ohm-cm。
3.根据权利要求2所述的设备,其中所述传递衬底由以下组成的组中的一种形成:蓝宝石、导热石英、氮化铝、氮化硼和氧化铍。
4.根据权利要求2所述的设备,其中所述传递衬底的厚度为10μm至1000μm。
5.根据权利要求1所述的设备,其中所述有源层由应变硅外延层形成,在300K的温度下,所述应变硅外延层中的硅的晶格常数大于5.461。
6.根据权利要求1所述的设备,其中:
●所述BEOL部分包括连接层;
●所述FEOL部分进一步包括接触层,其中所述有源层和所述隔离区段位于所述接触层之上,并且所述BEOL部分位于所述接触层之下;并且
●所述多层重新分布结构进一步包括重新分布互连部,其中所述多个凸起结构通过所述多层重新分布结构内的所述重新分布互连部和所述BEOL部分内的所述连接层电耦接到所述传递装置管芯的所述FEOL部分。
7.根据权利要求1所述的设备,其中所述装置区域进一步包含钝化层,所述钝化层位于所述有源层之上并被所述隔离区段围绕,其中:
●所述钝化层由二氧化硅形成;并且
●每个隔离区段的所述顶表面和所述钝化层的顶表面共面并形成所述装置区域的所述顶表面。
8.根据权利要求1所述的设备,其中每个隔离区段的所述顶表面和所述有源层的顶表面共面并形成所述装置区域的所述顶表面。
9.根据权利要求1所述的设备,其中所述传递装置管芯进一步包括由氮化硅形成的阻挡层,所述阻挡层耦接在所述装置区域的所述顶表面与所述传递衬底之间。
10.根据权利要求1所述的设备,其中所述FEOL部分被配置成提供开关场效应晶体管(FET)、二极管、电容器、电阻器或电感器中的至少一个。
11.一种设备,包括:
●传递装置管芯,所述传递装置管芯包括装置区域和传递衬底,其中:
●所述装置区域包含前段制程(FEOL)部分和位于所述FEOL部分之下的后段制程(BEOL)部分,其中所述FEOL部分包括隔离区段和有源层,所述有源层被所述隔离区段围绕并且未竖直延伸超过所述隔离区段;
●包含所述隔离区段的顶表面的所述装置区域的顶表面是平坦化的;并且
●所述传递衬底位于所述装置区域的所述顶表面之上,其中;
●在所述传递衬底内或在所述传递衬底与所述装置区域内的所述有源层之间不存在不具有锗、氮或氧含量的硅晶体;并且
●在所述传递衬底与所述隔离区段的所述顶表面之间不存在二氧化硅;以及●多层重新分布结构,所述多层重新分布结构形成于所述传递装置管芯的所述BEOL部分之下,其中:
●所述多层重新分布结构水平延伸超过所述传递装置管芯;并且
●所述多层重新分布结构包括多个凸起结构,所述多个凸起结构位于所述多层重新分布结构的底表面上并且电耦接到所述传递装置管芯的所述FEOL部分;以及
●模制化合物,所述模制化合物位于所述多层重新分布结构之上以包封所述传递装置管芯。
12.根据权利要求11所述的设备,其中所述传递衬底的热导率大于10W/m·K并且电阻率大于1E5 Ohm-cm。
13.根据权利要求12所述的设备,其中所述传递衬底由以下组成的组中的一种形成:蓝宝石、导热石英、氮化铝、氮化硼和氧化铍。
14.根据权利要求12所述的设备,其中所述传递衬底的厚度为10μm至1000μm。
15.根据权利要求11所述的设备,其中所述有源层由应变硅外延层形成,在300K的温度下,所述应变硅外延层中的硅的晶格常数大于5.461。
16.根据权利要求11所述的设备,其中:
●所述BEOL部分包括连接层;
●所述FEOL部分进一步包括接触层,其中所述有源层和所述隔离区段位于所述接触层之上,并且所述BEOL部分位于所述接触层之下;并且
●所述多层重新分布结构进一步包括重新分布互连部,其中所述多个凸起结构通过所述多层重新分布结构内的所述重新分布互连部和所述BEOL部分内的所述连接层电耦接到所述传递装置管芯的所述FEOL部分。
17.根据权利要求11所述的设备,其中所述装置区域进一步包含钝化层,所述钝化层位于所述有源层之上并被所述隔离区段围绕,其中:
●所述钝化层由二氧化硅形成;并且
●每个隔离区段的所述顶表面和所述钝化层的顶表面共面并形成所述装置区域的所述顶表面。
18.根据权利要求11所述的设备,其中每个隔离区段的所述顶表面和所述有源层的顶表面共面并形成所述装置区域的所述顶表面。
19.根据权利要求11所述的设备,其中所述传递装置管芯进一步包括由氮化硅形成的阻挡层,所述阻挡层耦接在所述装置区域的所述顶表面与所述传递衬底之间。
20.根据权利要求11所述的设备,其中所述FEOL部分被配置成提供开关场效应晶体管(FET)、二极管、电容器、电阻器或电感器中的至少一个。
Claims (20)
1.一种设备,包括:
●传递装置管芯,所述传递装置管芯包括装置区域和传递衬底,其中:
●所述装置区域包含前段制程(FEOL)部分和位于所述FEOL部分之下的后段制程(BEOL)部分,其中所述FEOL部分包括隔离区段和有源层,所述有源层被所述隔离区段围绕并且未竖直延伸超过所述隔离区段;
●所述装置区域的顶表面是平坦化的;并且
●所述传递衬底位于所述装置区域的所述顶表面之上,其中在所述传递衬底内或在所述传递衬底与所述装置区域内的所述有源层之间不存在不具有锗、氮或氧含量的硅晶体;以及
●多层重新分布结构,所述多层重新分布结构形成于所述传递装置管芯的所述BEOL部分之下,其中所述多层重新分布结构包括多个凸起结构,所述多个凸起结构位于所述多层重新分布结构的底表面上并且电耦接到所述传递装置管芯的所述FEOL部分。
2.根据权利要求1所述的设备,其中所述传递衬底的热导率大于10W/m·K并且电阻率大于1E5 Ohm-cm。
3.根据权利要求2所述的设备,其中所述传递衬底由以下组成的组中的一种形成:蓝宝石、导热石英、氮化铝、氮化硼和氧化铍。
4.根据权利要求2所述的设备,其中所述传递衬底的厚度为10μm至1000μm。
5.根据权利要求1所述的设备,其中所述有源层由应变硅外延层形成,在300K的温度下,所述应变硅外延层中的硅的晶格常数大于5.461。
6.根据权利要求1所述的设备,其中:
●所述BEOL部分包括连接层;
●所述FEOL部分进一步包括接触层,其中所述有源层和所述隔离区段位于所述接触层之上,并且所述BEOL部分位于所述接触层之下;并且
●所述多层重新分布结构进一步包括重新分布互连部,其中所述多个凸起结构通过所述多层重新分布结构内的所述重新分布互连部和所述BEOL部分内的所述连接层电耦接到所述传递装置管芯的所述FEOL部分。
7.根据权利要求1所述的设备,其中所述装置区域进一步包含钝化层,所述钝化层位于所述有源层之上并被所述隔离区段围绕,其中:
●所述钝化层由二氧化硅形成;并且
●每个隔离区段的顶表面和所述钝化层的顶表面共面并形成所述装置区域的所述顶表面。
8.根据权利要求1所述的设备,其中每个隔离区段的顶表面和所述有源层的顶表面共面并形成所述装置区域的所述顶表面。
9.根据权利要求1所述的设备,其中所述传递装置管芯进一步包括由氮化硅形成的阻挡层,所述阻挡层耦接在所述装置区域的所述顶表面与所述传递衬底之间。
10.根据权利要求1所述的设备,其中所述FEOL部分被配置成提供开关场效应晶体管(FET)、二极管、电容器、电阻器或电感器中的至少一个。
11.一种设备,包括:
●传递装置管芯,所述传递装置管芯包括装置区域和传递衬底,其中:
●所述装置区域包含前段制程(FEOL)部分和位于所述FEOL部分之下的后段制程(BEOL)部分,其中所述FEOL部分包括隔离区段和有源层,所述有源层被所述隔离区段围绕并且未竖直延伸超过所述隔离区段;
●所述装置区域的顶表面是平坦化的;并且
●所述传递衬底位于所述装置区域的所述顶表面之上,其中在所述传递衬底内或在所述传递衬底与所述装置区域内的所述有源层之间不存在不具有锗、氮或氧含量的硅晶体;
●多层重新分布结构,所述多层重新分布结构形成于所述传递装置管芯的所述BEOL部分之下,其中:
●所述多层重新分布结构水平延伸超过所述传递装置管芯;并且
●所述多层重新分布结构包括多个凸起结构,所述多个凸起结构位于所述多层重新分布结构的底表面上并且电耦接到所述传递装置管芯的所述FEOL部分;以及
●模制化合物,所述模制化合物位于所述多层重新分布结构之上以包封所述传递装置管芯。
12.根据权利要求11所述的设备,其中所述传递衬底的热导率大于10W/m·K并且电阻率大于1E5 Ohm-cm。
13.根据权利要求12所述的设备,其中所述传递衬底由以下组成的组中的一种形成:蓝宝石、导热石英、氮化铝、氮化硼和氧化铍。
14.根据权利要求12所述的设备,其中所述传递衬底的厚度为10μm至1000μm。
15.根据权利要求11所述的设备,其中所述有源层由应变硅外延层形成,在300K的温度下,所述应变硅外延层中的硅的晶格常数大于5.461。
16.根据权利要求11所述的设备,其中:
●所述BEOL部分包括连接层;
●所述FEOL部分进一步包括接触层,其中所述有源层和所述隔离区段位于所述接触层之上,并且所述BEOL部分位于所述接触层之下;并且
●所述多层重新分布结构进一步包括重新分布互连部,其中所述多个凸起结构通过所述多层重新分布结构内的所述重新分布互连部和所述BEOL部分内的所述连接层电耦接到所述传递装置管芯的所述FEOL部分。
17.根据权利要求11所述的设备,其中所述装置区域进一步包含钝化层,所述钝化层位于所述有源层之上并被所述隔离区段围绕,其中:
●所述钝化层由二氧化硅形成;并且
●每个隔离区段的顶表面和所述钝化层的顶表面共面并形成所述装置区域的所述顶表面。
18.根据权利要求11所述的设备,其中每个隔离区段的顶表面和所述有源层的顶表面共面并形成所述装置区域的所述顶表面。
19.根据权利要求11所述的设备,其中所述传递装置管芯进一步包括由氮化硅形成的阻挡层,所述阻挡层耦接在所述装置区域的所述顶表面与所述传递衬底之间。
20.根据权利要求11所述的设备,其中所述FEOL部分被配置成提供开关场效应晶体管(FET)、二极管、电容器、电阻器或电感器中的至少一个。
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