KR20180093823A - 선택적 패시베이션 및 선택적 증착 - Google Patents

선택적 패시베이션 및 선택적 증착 Download PDF

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KR20180093823A
KR20180093823A KR1020180017259A KR20180017259A KR20180093823A KR 20180093823 A KR20180093823 A KR 20180093823A KR 1020180017259 A KR1020180017259 A KR 1020180017259A KR 20180017259 A KR20180017259 A KR 20180017259A KR 20180093823 A KR20180093823 A KR 20180093823A
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South Korea
Prior art keywords
layer
dielectric
selectively
deposition
passivation layer
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Korean (ko)
Inventor
에바 에. 토이스
수비 프. 하우카
라이야 흐. 마테로
엘리나 파름
델프히네 롱리에
히데미 스에모리
잔 윌렘 매즈
마르코 투오미넨
샤오런 덩
이보 요하네스 라이마커르스
안드레아 일리베리
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에이에스엠 아이피 홀딩 비.브이.
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Publication of KR20180093823A publication Critical patent/KR20180093823A/ko
Priority to KR1020240053275A priority Critical patent/KR102841716B1/ko
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TW202140832A (zh) * 2020-03-30 2021-11-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 氧化矽在金屬表面上之選擇性沉積

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KR102027776B1 (ko) * 2018-09-04 2019-11-04 전북대학교산학협력단 무한 선택비를 갖는 원자층증착법을 이용한 패턴의 제조 방법
KR20210043745A (ko) * 2018-09-14 2021-04-21 어플라이드 머티어리얼스, 인코포레이티드 선택적 산화알루미늄 막 증착
KR20200108243A (ko) * 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOC 층을 포함한 구조체 및 이의 형성 방법
KR20220113328A (ko) * 2019-03-18 2022-08-12 가부시키가이샤 코쿠사이 엘렉트릭 기판 처리 방법, 반도체 장치의 제조 방법, 기판 처리 장치 및 프로그램
KR20220058636A (ko) * 2019-09-24 2022-05-09 도쿄엘렉트론가부시키가이샤 성막 방법
KR20220058634A (ko) * 2019-09-24 2022-05-09 도쿄엘렉트론가부시키가이샤 성막 방법
KR20230150367A (ko) * 2021-03-09 2023-10-30 도쿄엘렉트론가부시키가이샤 성막 방법 및 성막 시스템
WO2024117887A1 (ko) * 2022-11-30 2024-06-06 주식회사 동진쎄미켐 절연막 패턴 형성 방법 및 반도체 소자
WO2024263543A1 (en) * 2023-06-19 2024-12-26 Applied Materials, Inc. Selective liner deposition for via resistance reduction
WO2025135449A1 (ko) * 2023-12-18 2025-06-26 주식회사 원익아이피에스 기판 처리 방법

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US20210358739A1 (en) 2021-11-18
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