JP3973395B2 - 半導体装置とその製造方法 - Google Patents

半導体装置とその製造方法 Download PDF

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Publication number
JP3973395B2
JP3973395B2 JP2001318700A JP2001318700A JP3973395B2 JP 3973395 B2 JP3973395 B2 JP 3973395B2 JP 2001318700 A JP2001318700 A JP 2001318700A JP 2001318700 A JP2001318700 A JP 2001318700A JP 3973395 B2 JP3973395 B2 JP 3973395B2
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Japan
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region
conductivity type
forming
semiconductor
type
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Expired - Fee Related
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JP2001318700A
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Japanese (ja)
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JP2003124464A5 (enExample
JP2003124464A (ja
Inventor
佳晋 服部
仁 山口
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Denso Corp
Toyota Central R&D Labs Inc
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Denso Corp
Toyota Central R&D Labs Inc
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Priority to JP2001318700A priority Critical patent/JP3973395B2/ja
Priority to US10/411,373 priority patent/US20040016959A1/en
Publication of JP2003124464A publication Critical patent/JP2003124464A/ja
Publication of JP2003124464A5 publication Critical patent/JP2003124464A5/ja
Priority to US10/950,526 priority patent/US7112519B2/en
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Publication of JP3973395B2 publication Critical patent/JP3973395B2/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/051Forming charge compensation regions, e.g. superjunctions
    • H10D62/058Forming charge compensation regions, e.g. superjunctions by using trenches, e.g. implanting into sidewalls of trenches or refilling trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
JP2001318700A 2001-10-16 2001-10-16 半導体装置とその製造方法 Expired - Fee Related JP3973395B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001318700A JP3973395B2 (ja) 2001-10-16 2001-10-16 半導体装置とその製造方法
US10/411,373 US20040016959A1 (en) 2001-10-16 2003-04-11 Semiconductor device and its manufacturing method
US10/950,526 US7112519B2 (en) 2001-10-16 2004-09-28 Semiconductor device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001318700A JP3973395B2 (ja) 2001-10-16 2001-10-16 半導体装置とその製造方法

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JP2003124464A JP2003124464A (ja) 2003-04-25
JP2003124464A5 JP2003124464A5 (enExample) 2004-07-15
JP3973395B2 true JP3973395B2 (ja) 2007-09-12

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JP2001318700A Expired - Fee Related JP3973395B2 (ja) 2001-10-16 2001-10-16 半導体装置とその製造方法

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US (2) US20040016959A1 (enExample)
JP (1) JP3973395B2 (enExample)

Families Citing this family (84)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3899231B2 (ja) * 2000-12-18 2007-03-28 株式会社豊田中央研究所 半導体装置
JP2004047967A (ja) * 2002-05-22 2004-02-12 Denso Corp 半導体装置及びその製造方法
JP3634848B2 (ja) * 2003-01-07 2005-03-30 株式会社東芝 電力用半導体素子
JP4166627B2 (ja) * 2003-05-30 2008-10-15 株式会社デンソー 半導体装置
JP4882212B2 (ja) * 2003-08-20 2012-02-22 株式会社デンソー 縦型半導体装置
CN1823421B (zh) * 2003-08-20 2010-04-28 株式会社电装 垂直型半导体装置
JP2005101334A (ja) * 2003-09-25 2005-04-14 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP4253558B2 (ja) * 2003-10-10 2009-04-15 株式会社豊田中央研究所 半導体装置
US7166890B2 (en) 2003-10-21 2007-01-23 Srikant Sridevan Superjunction device with improved ruggedness
JP4536366B2 (ja) * 2003-12-22 2010-09-01 株式会社豊田中央研究所 半導体装置とその設計支援用プログラム
US7368777B2 (en) * 2003-12-30 2008-05-06 Fairchild Semiconductor Corporation Accumulation device with charge balance structure and method of forming the same
JP4773716B2 (ja) 2004-03-31 2011-09-14 株式会社デンソー 半導体基板の製造方法
JP4907862B2 (ja) * 2004-12-10 2012-04-04 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP4940546B2 (ja) * 2004-12-13 2012-05-30 株式会社デンソー 半導体装置
JP4825424B2 (ja) * 2005-01-18 2011-11-30 株式会社東芝 電力用半導体装置
JP4840738B2 (ja) * 2005-03-15 2011-12-21 株式会社デンソー 半導体装置とその製造方法
JP2007012977A (ja) 2005-07-01 2007-01-18 Toshiba Corp 半導体装置
JP5147163B2 (ja) * 2005-07-01 2013-02-20 株式会社デンソー 半導体装置
JP4744958B2 (ja) * 2005-07-13 2011-08-10 株式会社東芝 半導体素子及びその製造方法
JP5150048B2 (ja) * 2005-09-29 2013-02-20 株式会社デンソー 半導体基板の製造方法
US7811907B2 (en) * 2005-09-29 2010-10-12 Denso Corporation Method for manufacturing semiconductor device and epitaxial growth equipment
KR100997153B1 (ko) * 2005-10-06 2010-11-30 가부시키가이샤 덴소 반도체 기판 및 그 제조 방법
JP4865290B2 (ja) 2005-10-06 2012-02-01 株式会社Sumco 半導体基板の製造方法
JP5369372B2 (ja) * 2005-11-28 2013-12-18 富士電機株式会社 半導体装置および半導体装置の製造方法
JP5201307B2 (ja) 2005-12-22 2013-06-05 富士電機株式会社 半導体装置
JP5072221B2 (ja) 2005-12-26 2012-11-14 株式会社東芝 半導体装置及びその製造方法
JP5225546B2 (ja) * 2005-12-27 2013-07-03 株式会社豊田中央研究所 半導体装置
US7790549B2 (en) * 2008-08-20 2010-09-07 Alpha & Omega Semiconductor, Ltd Configurations and methods for manufacturing charge balanced devices
US7492003B2 (en) * 2006-01-24 2009-02-17 Siliconix Technology C. V. Superjunction power semiconductor device
US7659588B2 (en) * 2006-01-26 2010-02-09 Siliconix Technology C. V. Termination for a superjunction device
JP5076335B2 (ja) * 2006-03-09 2012-11-21 株式会社デンソー 半導体装置およびスーパージャンクション構造を有する半導体基板の製造方法
DE102007004616B4 (de) 2006-01-31 2014-01-23 Denso Corporation Halbleitervorrichtung mit Super-Junction-Struktur und Verfahren zur Herstellung derselben
US7592668B2 (en) * 2006-03-30 2009-09-22 Fairchild Semiconductor Corporation Charge balance techniques for power devices
CN101461066A (zh) * 2006-04-11 2009-06-17 意法半导体股份有限公司 用于制造半导体功率器件的工艺及相应器件
WO2007122646A1 (en) 2006-04-21 2007-11-01 Stmicroelectronics S.R.L. Process for manufacturing a power semiconductor device and corresponding power semiconductor device
JP5124999B2 (ja) 2006-06-15 2013-01-23 富士電機株式会社 半導体装置およびその製造方法
EP1873837B1 (en) * 2006-06-28 2013-03-27 STMicroelectronics Srl Semiconductor power device having an edge-termination structure and manufacturing method thereof
US9437729B2 (en) 2007-01-08 2016-09-06 Vishay-Siliconix High-density power MOSFET with planarized metalization
JP2008218656A (ja) * 2007-03-02 2008-09-18 Denso Corp 半導体装置の製造方法及び半導体ウエハ
US9947770B2 (en) 2007-04-03 2018-04-17 Vishay-Siliconix Self-aligned trench MOSFET and method of manufacture
US20080272429A1 (en) * 2007-05-04 2008-11-06 Icemos Technology Corporation Superjunction devices having narrow surface layout of terminal structures and methods of manufacturing the devices
JP4539680B2 (ja) * 2007-05-14 2010-09-08 株式会社デンソー 半導体装置およびその製造方法
US9484451B2 (en) 2007-10-05 2016-11-01 Vishay-Siliconix MOSFET active area and edge termination area charge balance
US7989882B2 (en) 2007-12-07 2011-08-02 Cree, Inc. Transistor with A-face conductive channel and trench protecting well region
US7943989B2 (en) * 2008-12-31 2011-05-17 Alpha And Omega Semiconductor Incorporated Nano-tube MOSFET technology and devices
US9508805B2 (en) 2008-12-31 2016-11-29 Alpha And Omega Semiconductor Incorporated Termination design for nanotube MOSFET
TWI473270B (zh) * 2009-05-15 2015-02-11 尼克森微電子股份有限公司 半導體元件及其製造方法
TWI402985B (zh) * 2009-06-02 2013-07-21 Anpec Electronics Corp 絕緣閘雙極電晶體與二極體之整合結構及其製作方法
US7910486B2 (en) * 2009-06-12 2011-03-22 Alpha & Omega Semiconductor, Inc. Method for forming nanotube semiconductor devices
US8299494B2 (en) 2009-06-12 2012-10-30 Alpha & Omega Semiconductor, Inc. Nanotube semiconductor devices
DE102009038710B4 (de) * 2009-08-25 2020-02-27 Infineon Technologies Austria Ag Halbleiterbauelement
US9443974B2 (en) * 2009-08-27 2016-09-13 Vishay-Siliconix Super junction trench power MOSFET device fabrication
US9425306B2 (en) * 2009-08-27 2016-08-23 Vishay-Siliconix Super junction trench power MOSFET devices
US10026835B2 (en) * 2009-10-28 2018-07-17 Vishay-Siliconix Field boosted metal-oxide-semiconductor field effect transistor
JP5448733B2 (ja) * 2009-11-13 2014-03-19 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2011142269A (ja) * 2010-01-08 2011-07-21 Toshiba Corp 半導体装置および半導体装置の製造方法
JP5672708B2 (ja) * 2010-02-03 2015-02-18 株式会社デンソー 縦型半導体素子を備えた半導体装置
JP5659558B2 (ja) * 2010-05-20 2015-01-28 富士電機株式会社 超接合半導体装置の製造方法
CN102299073A (zh) * 2010-06-25 2011-12-28 无锡华润上华半导体有限公司 Vdmos器件及其制作方法
JP5621442B2 (ja) * 2010-09-14 2014-11-12 株式会社デンソー 半導体装置の製造方法
US9842911B2 (en) 2012-05-30 2017-12-12 Vishay-Siliconix Adaptive charge balanced edge termination
WO2014082095A1 (en) * 2012-11-26 2014-05-30 D3 Semiconductor LLC Device architecture and method for improved packing of vertical field effect devices
JP6077385B2 (ja) * 2013-05-17 2017-02-08 トヨタ自動車株式会社 半導体装置
US9508596B2 (en) 2014-06-20 2016-11-29 Vishay-Siliconix Processes used in fabricating a metal-insulator-semiconductor field effect transistor
US9887259B2 (en) 2014-06-23 2018-02-06 Vishay-Siliconix Modulated super junction power MOSFET devices
CN106575666B (zh) 2014-08-19 2021-08-06 维西埃-硅化物公司 超结金属氧化物半导体场效应晶体管
WO2016028943A1 (en) 2014-08-19 2016-02-25 Vishay-Siliconix Electronic circuit
JP6782529B2 (ja) * 2015-01-29 2020-11-11 富士電機株式会社 半導体装置
JP2016163004A (ja) * 2015-03-05 2016-09-05 株式会社東芝 半導体装置および半導体装置の製造方法
CN106328488B (zh) * 2015-06-25 2020-10-16 北大方正集团有限公司 超结功率器件的制备方法和超结功率器件
JP2019054169A (ja) * 2017-09-15 2019-04-04 株式会社東芝 半導体装置
JP6981890B2 (ja) * 2018-01-29 2021-12-17 ルネサスエレクトロニクス株式会社 半導体装置
JP7099369B2 (ja) * 2018-03-20 2022-07-12 株式会社デンソー 半導体装置およびその製造方法
JP7184681B2 (ja) * 2019-03-18 2022-12-06 株式会社東芝 半導体装置およびその制御方法
JP6777198B2 (ja) * 2019-07-03 2020-10-28 富士電機株式会社 半導体装置
DE112019007551T5 (de) * 2019-07-16 2022-03-31 Mitsubishi Electric Corporation Halbleitereinheit, leistungswandlereinheit und verfahren zum herstellen einer halbleitereinheit
JP2021057552A (ja) * 2019-10-02 2021-04-08 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN113628969B (zh) * 2020-05-06 2022-06-24 苏州东微半导体股份有限公司 半导体超结器件的制造方法
CN113628968B (zh) * 2020-05-06 2022-06-24 苏州东微半导体股份有限公司 半导体超结器件的制造方法
CN113488522A (zh) * 2021-06-07 2021-10-08 西安电子科技大学 一种具有沟道缓冲层的半超结mosfet器件及其制备方法
US12068390B2 (en) 2021-07-28 2024-08-20 Infineon Technologies Ag Power semiconductor device having a gate dielectric stack that includes a ferroelectric insulator
US11791383B2 (en) * 2021-07-28 2023-10-17 Infineon Technologies Ag Semiconductor device having a ferroelectric gate stack
CN116137283B (zh) * 2021-11-17 2025-09-12 苏州东微半导体股份有限公司 半导体超结功率器件
CN116190236B (zh) * 2022-12-20 2025-09-05 深圳天狼芯半导体有限公司 一种垂直型鳍状功率器件及其制备方法、芯片

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3291957B2 (ja) * 1995-02-17 2002-06-17 富士電機株式会社 縦型トレンチmisfetおよびその製造方法
JP3158973B2 (ja) * 1995-07-20 2001-04-23 富士電機株式会社 炭化けい素縦型fet
SE9601179D0 (sv) * 1996-03-27 1996-03-27 Abb Research Ltd A field controlled semiconductor device of SiC and a method for production thereof
DE19730759C1 (de) * 1997-07-17 1998-09-03 Siemens Ag Vertikaler Leistungs-MOSFET
JP3940518B2 (ja) 1999-03-10 2007-07-04 株式会社東芝 高耐圧半導体素子
JP2006210368A (ja) * 1999-07-02 2006-08-10 Toyota Central Res & Dev Lab Inc 縦型半導体装置及びその製造方法
JP4924781B2 (ja) 1999-10-13 2012-04-25 株式会社豊田中央研究所 縦型半導体装置
JP2001244461A (ja) 2000-02-28 2001-09-07 Toyota Central Res & Dev Lab Inc 縦型半導体装置
JP2001332726A (ja) 2000-05-22 2001-11-30 Hitachi Ltd 縦形電界効果半導体装置及びその製造方法
JP4764987B2 (ja) * 2000-09-05 2011-09-07 富士電機株式会社 超接合半導体素子
JP3899231B2 (ja) * 2000-12-18 2007-03-28 株式会社豊田中央研究所 半導体装置
JP5010774B2 (ja) * 2000-12-28 2012-08-29 富士電機株式会社 半導体装置の製造方法及び半導体装置

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US20050035401A1 (en) 2005-02-17
US7112519B2 (en) 2006-09-26
JP2003124464A (ja) 2003-04-25
US20040016959A1 (en) 2004-01-29

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