JP4907862B2 - 半導体装置の製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims description 37
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000010410 layer Substances 0.000 claims description 58
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 26
- 229920005591 polysilicon Polymers 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 230000002093 peripheral effect Effects 0.000 claims description 17
- 239000011229 interlayer Substances 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 description 13
- 230000008021 deposition Effects 0.000 description 11
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000005360 phosphosilicate glass Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Description
図1(a)に示す半導体基板101は、例えばシリコンなどで形成されたn+型(第1の導電型)の半導体基板である。この半導体基板101上の全面にはエピタキシャル層102が形成されている。エピタキシャル層102は、例えばn−型(第1の導電型)半導体であり、半導体基板101と共に縦型パワーMOSFETのドレインとして動作する。エピタキシャル層102上には、ベース領域103が形成される。ベース領域103は、例えばボロンを含んだp型(第2の導電型)半導体領域であり、縦型パワーMOSFETの動作時にゲート電極106近傍にチャネルが形成される領域である。また、p型半導体をコラム状に形成したコラム領域104が形成されている。コラム領域104は、例えばボロンを含んだp型半導体である。このエピタキシャル層102にコラム領域を形成する構造がスーパージャンクション構造である。
102 ドリフト領域
103 ベース領域
104 素子活性部のコラム領域
105 ソース領域
106 ゲート電極
107 ゲート電極の引き出し部
108 LOCOS領域
109 層間絶縁膜
110 ゲート電極プラグ
111 ゲート電極金属膜
112 ソース電極プラグ
113 ソース電極金属膜
201 ポリシリコン層
301 ポリシリコン堆積層
Claims (8)
- 第1の導電型の半導体基板上に素子活性部と前記素子活性部の外周に形成される外周部とを含む半導体層を形成し、
前記素子活性部に形成される第1のトレンチと、前記外周部に形成され、前記半導体層において前記第1のトレンチと互いに接続される第2のトレンチと、を形成し、
前記第1のトレンチに埋め込まれるゲート電極と、前記ゲート電極と互いに接続され、前記第2のトレンチに埋め込まれるゲート電極引き出し部と、を形成し、
前記ゲート電極と前記ゲート電極引き出し部とを形成した後に、イオン注入により、前記半導体層に形成された前記素子活性部の前記第1のトレンチよりも深い領域に第2の導電型の第1のコラム領域を形成するとともに、前記半導体層に形成された前記外周部の前記第2のトレンチよりも深い領域に前記第1のコラム領域と同じ深さの前記第2の導電型の第2のコラム領域を形成することで、前記半導体層、前記第1及び第2のコラム領域によりスーパージャンクション構造を形成し、
前記ゲート電極、前記ゲート電極引き出し部及び前記半導体層を覆う領域に層間絶縁膜を形成し、
前記層間絶縁膜を貫き、前記ゲート電極引き出し部が露出するようにコンタクトホールを形成し、
前記コンタクトホール中に導電体によってゲート電極プラグを形成し、
前記層間絶縁膜上に前記ゲート電極プラグと接続されるゲート電極金属膜を形成する半導体装置の製造方法。 - 前記ゲート電極及び前記ゲート電極引き出し部は、ポリシリコンにより形成される請求項1に記載の半導体装置の製造方法。
- 前記ゲート電極プラグは、タングステンを含む請求項1又は2に記載の半導体装置の製造方法。
- 前記ゲート電極引き出し部は、前記ゲート電極よりも広い幅で形成される請求項1乃至3のいずれか1項に記載の半導体装置の製造方法。
- 前記半導体層中の上層部に前記第2の導電型のベース領域を形成し、
前記ベース領域の上層に前記第1の導電型のソース領域を形成し、
前記コンタクトホールを形成する工程において前記ゲート電極プラグが形成される第1のコンタクトホールと、前記ソース領域を貫き、前記ベース領域が露出する深さの第2のコンタクトホールを形成し、
前記ゲート電極プラグを形成する工程において、前記ゲート電極プラグと、前記第2のコンタクトホールに埋め込まれるソース電極プラグを形成し、
前記ゲート電極金属膜を形成する工程において、前記ゲート電極金属膜と、前記層間絶縁膜上に前記ソース電極プラグと接続されるソース電極金属膜と、を形成する請求項1乃至4のいずれか1項に記載の半導体装置の製造方法。 - 前記ソース電極プラグは、タングステンを含む請求項5に記載の半導体装置の製造方法。
- 前記ゲート電極金属膜と前記ソース電極金属膜との間に接続されるツェナーダイオードを形成する工程をさらに有する請求項5又は6のいずれか1項に記載の半導体装置の製造方法。
- 前記ツェナーダイオードは、前記ゲート電極と前記ゲート電極引き出し部を形成するポリシリコンにより形成される請求項7に記載の半導体装置の製造方法。
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US12/503,297 US7919374B2 (en) | 2004-12-10 | 2009-07-15 | Method for manufacturing a semiconductor device |
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JP4860929B2 (ja) * | 2005-01-11 | 2012-01-25 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP4955958B2 (ja) * | 2005-08-04 | 2012-06-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4980663B2 (ja) * | 2006-07-03 | 2012-07-18 | ルネサスエレクトロニクス株式会社 | 半導体装置および製造方法 |
DE102007008777B4 (de) * | 2007-02-20 | 2012-03-15 | Infineon Technologies Austria Ag | Halbleiterbauelement mit Zellenstruktur und Verfahren zur Herstellung desselben |
JP2008300420A (ja) | 2007-05-29 | 2008-12-11 | Nec Electronics Corp | 半導体装置及び半導体装置の製造方法 |
JP2009038318A (ja) * | 2007-08-03 | 2009-02-19 | Toshiba Corp | 半導体装置 |
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JP7175787B2 (ja) * | 2019-02-07 | 2022-11-21 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP7289258B2 (ja) * | 2019-11-22 | 2023-06-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CN115020240B (zh) * | 2022-08-03 | 2023-03-28 | 上海维安半导体有限公司 | 一种低压超结沟槽mos器件的制备方法及结构 |
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JP4843843B2 (ja) * | 2000-10-20 | 2011-12-21 | 富士電機株式会社 | 超接合半導体素子 |
US6608350B2 (en) * | 2000-12-07 | 2003-08-19 | International Rectifier Corporation | High voltage vertical conduction superjunction semiconductor device |
JP3899231B2 (ja) * | 2000-12-18 | 2007-03-28 | 株式会社豊田中央研究所 | 半導体装置 |
US6657256B2 (en) * | 2001-05-22 | 2003-12-02 | General Semiconductor, Inc. | Trench DMOS transistor having a zener diode for protection from electro-static discharge |
JP4608133B2 (ja) * | 2001-06-08 | 2011-01-05 | ルネサスエレクトロニクス株式会社 | 縦型mosfetを備えた半導体装置およびその製造方法 |
JP4854868B2 (ja) * | 2001-06-14 | 2012-01-18 | ローム株式会社 | 半導体装置 |
US6569738B2 (en) * | 2001-07-03 | 2003-05-27 | Siliconix, Inc. | Process for manufacturing trench gated MOSFET having drain/drift region |
JP3973395B2 (ja) * | 2001-10-16 | 2007-09-12 | 株式会社豊田中央研究所 | 半導体装置とその製造方法 |
JP4004843B2 (ja) * | 2002-04-24 | 2007-11-07 | Necエレクトロニクス株式会社 | 縦型mosfetの製造方法 |
JP2004047967A (ja) * | 2002-05-22 | 2004-02-12 | Denso Corp | 半導体装置及びその製造方法 |
JP3966151B2 (ja) * | 2002-10-10 | 2007-08-29 | 富士電機デバイステクノロジー株式会社 | 半導体素子 |
US6969657B2 (en) * | 2003-03-25 | 2005-11-29 | International Rectifier Corporation | Superjunction device and method of manufacture therefor |
JP4865194B2 (ja) * | 2004-03-29 | 2012-02-01 | ルネサスエレクトロニクス株式会社 | 超接合半導体素子 |
JP4825424B2 (ja) * | 2005-01-18 | 2011-11-30 | 株式会社東芝 | 電力用半導体装置 |
JP5074671B2 (ja) * | 2005-04-28 | 2012-11-14 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
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US7919374B2 (en) | 2011-04-05 |
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