IT1259016B - Dispositivo semiconduttore e metodo per fabbicarlo - Google Patents

Dispositivo semiconduttore e metodo per fabbicarlo

Info

Publication number
IT1259016B
IT1259016B ITMI921873A ITMI921873A IT1259016B IT 1259016 B IT1259016 B IT 1259016B IT MI921873 A ITMI921873 A IT MI921873A IT MI921873 A ITMI921873 A IT MI921873A IT 1259016 B IT1259016 B IT 1259016B
Authority
IT
Italy
Prior art keywords
layer
spacer
formation
make
semiconductive device
Prior art date
Application number
ITMI921873A
Other languages
English (en)
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1019910015250A external-priority patent/KR940009611B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI921873A0 publication Critical patent/ITMI921873A0/it
Publication of ITMI921873A1 publication Critical patent/ITMI921873A1/it
Application granted granted Critical
Publication of IT1259016B publication Critical patent/IT1259016B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Si illustra un dispositivo di memoria a semiconduttori e un metodo per fabbricarlo. Il metodo comprende un processo per fabbricare un condensatore consistente dei passaggi di:formazione di un primo strato conduttore (46) su di un substrato semiconduttore (101), formazione di un primo elemento (70) composto di un primo strato di primo materiale sul primo strato conduttore, formazione di un primo spaziatore (80a) composto di un primo strato di secondo materiale sulla struttura risultante, e la incisione dello strato di materiale sotto il primo spaziatore, usando il primo spaziatore come maschera di incisione.Il dispositivo di memoria a semiconduttori così ottenuto può essere altamente integrato ed è molto affidabile.
ITMI921873A 1991-08-31 1992-07-30 Dispositivo semiconduttore e metodo per fabbicarlo IT1259016B (it)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1019910015250A KR940009611B1 (ko) 1991-08-31 1991-08-31 산화막식각마스크를 이용하여 패터닝된 고집적 반도체장치의 커패시터 제조방법(poem 셀)
KR910021974 1991-11-30
KR920003339 1992-02-29

Publications (3)

Publication Number Publication Date
ITMI921873A0 ITMI921873A0 (it) 1992-07-30
ITMI921873A1 ITMI921873A1 (it) 1994-01-30
IT1259016B true IT1259016B (it) 1996-03-11

Family

ID=27348767

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI921873A IT1259016B (it) 1991-08-31 1992-07-30 Dispositivo semiconduttore e metodo per fabbicarlo

Country Status (7)

Country Link
US (1) US5330614A (it)
JP (1) JP2677490B2 (it)
DE (1) DE4224946A1 (it)
FR (1) FR2680913B1 (it)
GB (1) GB2259187B (it)
IT (1) IT1259016B (it)
TW (1) TW243541B (it)

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960009998B1 (ko) * 1992-06-08 1996-07-25 삼성전자 주식회사 반도체 메모리장치의 제조방법
KR960008865B1 (en) * 1992-07-15 1996-07-05 Samsung Electronics Co Ltd Method for manufacturing a capacitor in semiconductor memory device
CN1560691B (zh) * 1992-08-27 2010-05-26 株式会社半导体能源研究所 半导体器件及其制造方法和有源矩阵显示器
DE4404129C2 (de) * 1993-02-12 2000-04-20 Micron Technology Inc Verfahren zum Herstellen einer mehrere Stifte aufweisenden leitfähigen Struktur
KR970000977B1 (ko) * 1993-05-21 1997-01-21 현대전자산업 주식회사 반도체 소자의 캐패시터 제조방법
KR960011664B1 (ko) * 1993-05-21 1996-08-24 현대전자산업 주식회사 반도체 장치의 캐패시터 형성방법
KR950010078A (ko) * 1993-09-09 1995-04-26 김주용 반도체 기억장치의 제조방법
KR100231593B1 (ko) * 1993-11-19 1999-11-15 김주용 반도체 소자의 캐패시터 제조방법
KR0132859B1 (ko) * 1993-11-24 1998-04-16 김광호 반도체장치의 커패시터 제조방법
KR950021710A (ko) * 1993-12-01 1995-07-26 김주용 반도체 장치의 캐패시터 제조방법
US5429976A (en) * 1993-12-01 1995-07-04 United Microelectronics Corporation Self-aligned method for forming polysilicon word lines on top of gate electrodes to increase capacitance of a stacked capacitor in a DRAM cell
JP2555965B2 (ja) * 1993-12-13 1996-11-20 日本電気株式会社 半導体装置の製造方法
GB2285176B (en) * 1993-12-27 1997-11-26 Hyundai Electronics Ind Structure and manufacturing method of a charge storage electrode
KR0131744B1 (ko) * 1993-12-28 1998-04-15 김주용 반도체 소자의 캐패시터 제조방법
KR950021644A (ko) * 1993-12-31 1995-07-26 김주용 반도체 기억장치 및 그 제조방법
JPH0837240A (ja) * 1994-07-22 1996-02-06 Nec Corp 半導体装置の製造方法
ATE220478T1 (de) * 1995-02-28 2002-07-15 Micron Technology Inc Verfahren zur herstellung einer struktur unter verwendung von wiederablagerung
JPH0917968A (ja) * 1995-06-27 1997-01-17 Mitsubishi Electric Corp 半導体装置とその製造方法
KR0155856B1 (ko) * 1995-07-20 1998-10-15 김광호 원통형 캐패시터의 제조방법
KR100224710B1 (ko) 1995-10-10 1999-10-15 윤종용 반도체 장치의 커패시터 제조 방법
KR0155918B1 (ko) * 1995-11-03 1998-12-01 김광호 선택적 텅스텐질화박막을 이용한 반도체장치의 캐패시터 형성방법
US5712202A (en) * 1995-12-27 1998-01-27 Vanguard International Semiconductor Corporation Method for fabricating a multiple walled crown capacitor of a semiconductor device
US6218237B1 (en) 1996-01-03 2001-04-17 Micron Technology, Inc. Method of forming a capacitor
US5733808A (en) * 1996-01-16 1998-03-31 Vanguard International Semiconductor Corporation Method for fabricating a cylindrical capacitor for a semiconductor device
JP2751906B2 (ja) * 1996-01-17 1998-05-18 日本電気株式会社 容量素子の形成方法
JPH09199680A (ja) * 1996-01-17 1997-07-31 Nec Corp 半導体装置およびその製造方法
KR100207463B1 (ko) * 1996-02-26 1999-07-15 윤종용 반도체 장치의 커패시터 제조방법
KR100207462B1 (ko) * 1996-02-26 1999-07-15 윤종용 반도체 장치의 커패시터 제조방법
KR100207466B1 (ko) * 1996-02-28 1999-07-15 윤종용 반도체 장치의 커패시터 제조방법
US5851882A (en) 1996-05-06 1998-12-22 Micron Technology, Inc. ZPROM manufacture and design and methods for forming thin structures using spacers as an etching mask
KR100219483B1 (ko) * 1996-06-03 1999-09-01 윤종용 반도체 장치의 커패시터 제조방법
TW312037B (en) * 1996-08-07 1997-08-01 United Microelectronics Corp Manufacturing method of capacitor of dynamic random access memory
GB2324409A (en) * 1996-08-07 1998-10-21 United Microelectronics Corp Method of forming data storage capacitors in dynamic random access memory cells
US5759890A (en) * 1996-08-16 1998-06-02 United Microelectronics Corporation Method for fabricating a tree-type capacitor structure for a semiconductor memory device
JP2930110B2 (ja) * 1996-11-14 1999-08-03 日本電気株式会社 半導体記憶装置およびその製造方法
KR100236069B1 (ko) * 1996-12-26 1999-12-15 김영환 캐패시터 및 그 제조방법
US6548346B1 (en) * 1997-04-04 2003-04-15 United Microelectronics Corp. Process for forming DRAM cell
US6218260B1 (en) * 1997-04-22 2001-04-17 Samsung Electronics Co., Ltd. Methods of forming integrated circuit capacitors having improved electrode and dielectric layer characteristics and capacitors formed thereby
KR100234379B1 (ko) * 1997-06-10 1999-12-15 윤종용 비트라인의 산화를 방지하기 위한 반도체 메모리장치의 제조방법
TW463289B (en) * 1997-06-27 2001-11-11 Taiwan Semiconductor Mfg Method for forming annular capacitor of memory
KR100244306B1 (ko) * 1997-07-29 2000-02-01 김영환 반도체 소자의 커패시터의 제조 방법
US6027860A (en) 1997-08-13 2000-02-22 Micron Technology, Inc. Method for forming a structure using redeposition of etchable layer
JP3090198B2 (ja) * 1997-08-21 2000-09-18 日本電気株式会社 半導体装置の構造およびその製造方法
JP3221376B2 (ja) 1997-11-07 2001-10-22 日本電気株式会社 半導体装置の製造方法
JPH11168199A (ja) * 1997-12-02 1999-06-22 Nippon Steel Corp 半導体記憶装置及びその製造方法
US5879986A (en) * 1998-02-27 1999-03-09 Vangaurd International Semiconductor Corporation Method for fabrication of a one gigabit capacitor over bit line DRAM cell with an area equal to eight times the used minimum feature
KR100301370B1 (ko) * 1998-04-29 2001-10-27 윤종용 디램셀커패시터의제조방법
JP2000077619A (ja) * 1998-08-27 2000-03-14 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
US6030878A (en) * 1998-11-25 2000-02-29 United Microelectronics Corp. Method of fabricating a dynamic random access memory capacitor
KR100363083B1 (ko) 1999-01-20 2002-11-30 삼성전자 주식회사 반구형 그레인 커패시터 및 그 형성방법
US6214687B1 (en) 1999-02-17 2001-04-10 Micron Technology, Inc. Method of forming a capacitor and a capacitor construction
KR100317042B1 (ko) 1999-03-18 2001-12-22 윤종용 반구형 알갱이 실리콘을 가지는 실린더형 커패시터 및 그 제조방법
US6136661A (en) * 1999-06-14 2000-10-24 Vanguard International Semiconductor Corporation Method to fabricate capacitor structures with very narrow features using silyated photoresist
KR100450671B1 (ko) 2002-02-26 2004-10-01 삼성전자주식회사 스토리지 노드 콘택플러그를 갖는 반도체 소자의 제조방법
KR100546395B1 (ko) * 2003-11-17 2006-01-26 삼성전자주식회사 반도체소자의 커패시터 및 그 제조방법
DE102004021401B4 (de) * 2004-04-30 2011-02-03 Qimonda Ag Herstellungsverfahren für ein Stapelkondensatorfeld
US20070037349A1 (en) * 2004-04-30 2007-02-15 Martin Gutsche Method of forming electrodes
DE102005042524A1 (de) * 2005-09-07 2007-03-08 Infineon Technologies Ag Verfahren zur Herstellung von Stapelkondensatoren für dynamische Speicherzellen
US20080113483A1 (en) * 2006-11-15 2008-05-15 Micron Technology, Inc. Methods of etching a pattern layer to form staggered heights therein and intermediate semiconductor device structures

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0736437B2 (ja) * 1985-11-29 1995-04-19 株式会社日立製作所 半導体メモリの製造方法
JPH07103463B2 (ja) * 1986-11-18 1995-11-08 日新製鋼株式会社 深絞り性に優れた合金化亜鉛メツキ鋼板の製造方法
JP2621181B2 (ja) * 1987-06-12 1997-06-18 日本電気株式会社 Ｍｉｓ型半導体記憶装置
DE3856528T2 (de) * 1987-06-17 2002-12-05 Fujitsu Ltd Dynamisches Speicherbauteil mit wahlfreiem Zugriff und Verfahren zu seiner Herstellung
KR910009805B1 (ko) * 1987-11-25 1991-11-30 후지쓰 가부시끼가이샤 다이나믹 랜덤 액세스 메모리 장치와 그의 제조방법
JP2755591B2 (ja) * 1988-03-25 1998-05-20 株式会社東芝 半導体記憶装置
JP2838412B2 (ja) * 1988-06-10 1998-12-16 三菱電機株式会社 半導体記憶装置のキャパシタおよびその製造方法
KR910010043B1 (ko) * 1988-07-28 1991-12-10 한국전기통신공사 스페이서를 이용한 미세선폭 형성방법
JP2724209B2 (ja) * 1989-06-20 1998-03-09 シャープ株式会社 半導体メモリ素子の製造方法
JPH0338061A (ja) * 1989-07-05 1991-02-19 Fujitsu Ltd 半導体記憶装置
JPH03142966A (ja) * 1989-10-30 1991-06-18 Sanyo Electric Co Ltd 半導体装置の製造方法
US5164337A (en) * 1989-11-01 1992-11-17 Matsushita Electric Industrial Co., Ltd. Method of fabricating a semiconductor device having a capacitor in a stacked memory cell
JP2524842B2 (ja) * 1989-11-08 1996-08-14 三菱電機株式会社 半導体記憶装置
KR960002078B1 (ko) * 1989-12-29 1996-02-10 샤프 가부시끼가이샤 반도체메모리의 제조방법
DD299990A5 (de) * 1990-02-23 1992-05-14 Dresden Forschzentr Mikroelek Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung
KR930000581B1 (ko) * 1990-04-04 1993-01-25 금성일렉트론 주식회사 자기 정렬된 캐패시터 콘택을 갖는 셀 제조방법 및 구조
KR930002292B1 (ko) * 1990-06-02 1993-03-29 삼성전자 주식회사 반도체 장치 및 그 제조방법
JP2644908B2 (ja) * 1990-06-25 1997-08-25 松下電子工業株式会社 半導体装置の製造方法
JP3123073B2 (ja) * 1990-11-08 2001-01-09 日本電気株式会社 半導体記憶装置の製造方法
KR930009583B1 (ko) * 1990-11-29 1993-10-07 삼성전자 주식회사 융모모양의 커패시터구조를 가진 반도체 메모리장치의 제조방법
KR930009593B1 (ko) * 1991-01-30 1993-10-07 삼성전자 주식회사 고집적 반도체 메모리장치 및 그 제조방법(HCC Cell)
US5084405A (en) * 1991-06-07 1992-01-28 Micron Technology, Inc. Process to fabricate a double ring stacked cell structure

Also Published As

Publication number Publication date
JP2677490B2 (ja) 1997-11-17
FR2680913B1 (fr) 1998-04-03
GB2259187B (en) 1996-06-19
DE4224946A1 (de) 1993-03-04
US5330614A (en) 1994-07-19
GB9218177D0 (en) 1992-10-14
JPH05218333A (ja) 1993-08-27
GB2259187A (en) 1993-03-03
ITMI921873A0 (it) 1992-07-30
ITMI921873A1 (it) 1994-01-30
TW243541B (it) 1995-03-21
FR2680913A1 (fr) 1993-03-05

Similar Documents

Publication Publication Date Title
IT1259016B (it) Dispositivo semiconduttore e metodo per fabbicarlo
IT1158954B (it) Processo di fabbricazione di un contatto di tantalio su un substrato semiconduttore di silicio
KR900003896A (ko) 반도체 메모리와 그 제조방법
KR860002135A (ko) 반도체기판의 주표면에 凹형 도랑이 형성된 반도체장치 및 그 제조방법
EP0236123A3 (en) A semiconductor device and method for preparing the same
MY117089A (en) Photo sensor and method for forming the same
EP0487739A4 (en) Method of manufacturing semiconductor device
EP0087312A3 (en) Formation of regions of different conductivity types in a substrate
JPS5578577A (en) Method of fabricating field effect transistor utilizing one conductivity semiconductor substrate
GB1513116A (en) Formation of integrated circuits
GB2016803A (en) Thin film transistor construction and manufacturing method of the same
EP0227189A3 (en) Method of manufacturing a thin conductor device
JPS5577156A (en) Method of forming mutually connecting structure on semiconductor substrate
CA2051778A1 (en) Method for manufacturing superconducting device having a reduced thickness of oxide superconducting layer and superconducting device manufactured thereby
KR850002696A (ko) 유전체 격리 구조를 가진 보상 반도체 장치를 제조 하는 방법
EP0851502A3 (en) Thin film semiconductor apparatus and production method thereof
DE3750300D1 (de) Photoelektrisches Umwandlungselement und Verfahren zu seiner Herstellung.
KR890011059A (ko) 반도체 장치의 제조방법
KR960009102B1 (en) Manufacturing method of semiconductor device fuse
IT1276042B1 (it) Dispositivo a circuito integrato e metodo per produrre lo stesso
KR900005849A (ko) El표시소자의 투명전극 및 그 제조방법
KR960002844A (ko) 반도체소자의 캐패시터 제조방법
KR900005594A (ko) 반도체장치의 개패시터의 그 제조방법
KR970053935A (ko) 반도체 소자의 캐패시터 제조방법
JPS6157545U (it)

Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970730