KR950021710A - 반도체 장치의 캐패시터 제조방법 - Google Patents

반도체 장치의 캐패시터 제조방법 Download PDF

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Publication number
KR950021710A
KR950021710A KR1019930026091A KR930026091A KR950021710A KR 950021710 A KR950021710 A KR 950021710A KR 1019930026091 A KR1019930026091 A KR 1019930026091A KR 930026091 A KR930026091 A KR 930026091A KR 950021710 A KR950021710 A KR 950021710A
Authority
KR
South Korea
Prior art keywords
capacitor
contact
forming
storage electrode
semiconductor device
Prior art date
Application number
KR1019930026091A
Other languages
English (en)
Inventor
김춘환
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019930026091A priority Critical patent/KR950021710A/ko
Priority to DE4442432A priority patent/DE4442432C2/de
Priority to US08/347,954 priority patent/US5447882A/en
Priority to JP6298248A priority patent/JPH07283376A/ja
Publication of KR950021710A publication Critical patent/KR950021710A/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/92—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by patterning layers, e.g. by etching conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8256—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using technologies not covered by one of groups H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252 and H01L21/8254

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 반도체장치의 캐패시터 제조방법에 관한 것으로서, 반도체 기판상에 층간 절연막을 형성한 후, 상기 반도체장치의 캐패시터 콘택으로 예정된 부분상의 층간 절연막을 제거하여 콘택홀을 형성하고, 상기 콘택홀을 선택증착 텅스텐으로 메꾸어 콘택 플러그를 형성하며, 상기 콘택 플러그와 접촉되는 저장 전극을 형성하고, 상기 저장 전극의 상부를 소정 두께 식각하여 다수개의 홈들을 형성하였으므로, 캐패시터의 표면적을 증가시켜 반도체장치를 고집적화할 수 있으며, 공정이 간단하고, 캐패시터의 단차를 감소시켜 신뢰성을 향상시킬 수 있다.

Description

반도체장치의 캐패시터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 (A)~(E)는 본 발명에 따른 반도체장치의 제조공정도.

Claims (3)

  1. 반도체 기판상에 형성되어 있는 층간 절연막의 캐패시터 콘택으로 예정된 부분을 제거하여 콘택홀을 형성하는 공정과, 상기 콘택홀을 메꾸는 콘택 플러그를 선택 증착 텅스텐으로 형성하는 공정과, 상기 콘택 플러그와 접촉되는 저장 전극을 형성하는 공정과, 상기 저장 전극의 소정부분 상부를 소정 두께 식각하여 홈을 형성하는 공정과, 상기 홈이 형성되어 있는 저장전극의 표면에 유전막을 형성하는 공정을 구비하는 반도체장치의 캐패시터 제조방법.
  2. 제1항에 있어서, 상기 저장전극을 폴리 실리콘으로 형성하는 것을 특징으로 하는 반도체장치의 캐패시터 제조방법.
  3. 제1항에 있어서, 상기 유전막을 산화막-진화막-산화막구조로 형성되는 것을 특징으로 하는 반도체장치의 캐패시터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930026091A 1993-12-01 1993-12-01 반도체 장치의 캐패시터 제조방법 KR950021710A (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019930026091A KR950021710A (ko) 1993-12-01 1993-12-01 반도체 장치의 캐패시터 제조방법
DE4442432A DE4442432C2 (de) 1993-12-01 1994-11-29 Verfahren zum Herstellen von Kondensatoren in Halbleiterspeichervorrichtungen
US08/347,954 US5447882A (en) 1993-12-01 1994-12-01 Method for fabricating capacitor of semiconductor memory device
JP6298248A JPH07283376A (ja) 1993-12-01 1994-12-01 半導体メモリー装置のキャパシター製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930026091A KR950021710A (ko) 1993-12-01 1993-12-01 반도체 장치의 캐패시터 제조방법

Publications (1)

Publication Number Publication Date
KR950021710A true KR950021710A (ko) 1995-07-26

Family

ID=19369599

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930026091A KR950021710A (ko) 1993-12-01 1993-12-01 반도체 장치의 캐패시터 제조방법

Country Status (4)

Country Link
US (1) US5447882A (ko)
JP (1) JPH07283376A (ko)
KR (1) KR950021710A (ko)
DE (1) DE4442432C2 (ko)

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KR100400284B1 (ko) * 1996-06-29 2003-12-24 주식회사 하이닉스반도체 반도체소자의저장전극형성방법

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US5595929A (en) * 1996-01-16 1997-01-21 Vanguard International Semiconductor Corporation Method for fabricating a dram cell with a cup shaped storage node
US5928969A (en) * 1996-01-22 1999-07-27 Micron Technology, Inc. Method for controlled selective polysilicon etching
US5702989A (en) * 1996-02-08 1997-12-30 Taiwan Semiconductor Manufacturing Company Ltd. Method for fabricating a tub structured stacked capacitor for a DRAM cell having a central column
US5710074A (en) * 1996-10-18 1998-01-20 Vanguard International Semiconductor Corporation Increased surface area of an STC structure via the use of a storage node electrode comprised of polysilicon mesas and polysilicon sidewall spacers
US5716883A (en) * 1996-11-06 1998-02-10 Vanguard International Semiconductor Corporation Method of making increased surface area, storage node electrode, with narrow spaces between polysilicon columns
US5792688A (en) * 1996-11-06 1998-08-11 Vanguard International Semiconductor Corporation Method to increase the surface area of a storage node electrode, of an STC structure, for DRAM devices, via formation of polysilicon columns
US5710075A (en) * 1996-11-06 1998-01-20 Vanguard International Semiconductor Corporation Method to increase surface area of a storage node electrode, of an STC structure, for DRAM devices
US5766993A (en) * 1996-11-25 1998-06-16 Vanguard International Semiconductor Corporation Method of fabricating storage node electrode, for DRAM devices, using polymer spacers, to obtain polysilicon columns, with minimum spacing between columns
US5804481A (en) * 1997-03-10 1998-09-08 Vanguard International Semiconductor Corporation Increased capacitor surface area via use of an oxide formation and removal procedure
US5763306A (en) * 1997-10-24 1998-06-09 Vanguard International Semiconductor Corporation Method of fabricating capacitor over bit line COB structure for a very high density DRAM applications
US6479341B1 (en) 1998-03-02 2002-11-12 Vanguard International Semiconductor Corporation Capacitor over metal DRAM structure
KR100341120B1 (ko) 1998-07-20 2002-12-26 주식회사 현대 디스플레이 테크놀로지 액정표시소자
US6150707A (en) * 1999-01-07 2000-11-21 International Business Machines Corporation Metal-to-metal capacitor having thin insulator
US6188122B1 (en) 1999-01-14 2001-02-13 International Business Machines Corporation Buried capacitor for silicon-on-insulator structure
US6201730B1 (en) * 1999-06-01 2001-03-13 Infineon Technologies North America Corp. Sensing of memory cell via a plateline
DE10131490B4 (de) * 2001-06-29 2006-06-29 Infineon Technologies Ag Verfahren zum Herstellen einer Halbleiterspeichereinrichtung
US6630380B1 (en) 2002-09-30 2003-10-07 Chartered Semiconductor Manufacturing Ltd Method for making three-dimensional metal-insulator-metal capacitors for dynamic random access memory (DRAM) and ferroelectric random access memory (FERAM)

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JP3123073B2 (ja) * 1990-11-08 2001-01-09 日本電気株式会社 半導体記憶装置の製造方法
JPH04186657A (ja) * 1990-11-16 1992-07-03 Sharp Corp コンタクト配線の作製方法
KR930009593B1 (ko) * 1991-01-30 1993-10-07 삼성전자 주식회사 고집적 반도체 메모리장치 및 그 제조방법(HCC Cell)
KR940006587B1 (ko) * 1991-05-23 1994-07-22 삼성전자 주식회사 디램셀의 캐패시터 제조방법
TW243541B (ko) * 1991-08-31 1995-03-21 Samsung Electronics Co Ltd
US5192703A (en) * 1991-10-31 1993-03-09 Micron Technology, Inc. Method of making tungsten contact core stack capacitor
JPH05243515A (ja) * 1992-01-08 1993-09-21 Nec Corp 半導体メモリ
DE4221431A1 (de) * 1992-06-30 1994-01-05 Siemens Ag Herstellverfahren für einen Schlüsselkondensator
US5278091A (en) * 1993-05-04 1994-01-11 Micron Semiconductor, Inc. Process to manufacture crown stacked capacitor structures with HSG-rugged polysilicon on all sides of the storage node

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100400284B1 (ko) * 1996-06-29 2003-12-24 주식회사 하이닉스반도체 반도체소자의저장전극형성방법

Also Published As

Publication number Publication date
DE4442432C2 (de) 2000-11-23
US5447882A (en) 1995-09-05
JPH07283376A (ja) 1995-10-27
DE4442432A1 (de) 1995-06-08

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