DE3856543D1 - Dynamische Spreicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür - Google Patents

Dynamische Spreicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür

Info

Publication number
DE3856543D1
DE3856543D1 DE3856543T DE3856543T DE3856543D1 DE 3856543 D1 DE3856543 D1 DE 3856543D1 DE 3856543 T DE3856543 T DE 3856543T DE 3856543 T DE3856543 T DE 3856543T DE 3856543 D1 DE3856543 D1 DE 3856543D1
Authority
DE
Germany
Prior art keywords
random access
manufacturing process
dynamic random
access arrangement
process therefor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3856543T
Other languages
English (en)
Other versions
DE3856543T2 (de
Inventor
Taiji Ema
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62296669A external-priority patent/JP2772375B2/ja
Priority claimed from JP62302464A external-priority patent/JPH07118520B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE3856543D1 publication Critical patent/DE3856543D1/de
Application granted granted Critical
Publication of DE3856543T2 publication Critical patent/DE3856543T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/90—MOSFET type gate sidewall insulating spacer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
DE3856543T 1987-11-25 1988-11-24 Dynamische Spreicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür Expired - Lifetime DE3856543T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62296669A JP2772375B2 (ja) 1987-11-25 1987-11-25 半導体記憶装置
JP62302464A JPH07118520B2 (ja) 1987-11-30 1987-11-30 半導体記憶装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE3856543D1 true DE3856543D1 (de) 2002-11-28
DE3856543T2 DE3856543T2 (de) 2003-03-20

Family

ID=26560793

Family Applications (2)

Application Number Title Priority Date Filing Date
DE3856543T Expired - Lifetime DE3856543T2 (de) 1987-11-25 1988-11-24 Dynamische Spreicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür
DE3854421T Expired - Lifetime DE3854421T2 (de) 1987-11-25 1988-11-24 Dynamische Speicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE3854421T Expired - Lifetime DE3854421T2 (de) 1987-11-25 1988-11-24 Dynamische Speicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür.

Country Status (4)

Country Link
US (5) US4953126A (de)
EP (2) EP0318277B1 (de)
KR (1) KR910009805B1 (de)
DE (2) DE3856543T2 (de)

Families Citing this family (82)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910009805B1 (ko) * 1987-11-25 1991-11-30 후지쓰 가부시끼가이샤 다이나믹 랜덤 액세스 메모리 장치와 그의 제조방법
US20010008288A1 (en) * 1988-01-08 2001-07-19 Hitachi, Ltd. Semiconductor integrated circuit device having memory cells
US5374576A (en) * 1988-12-21 1994-12-20 Hitachi, Ltd. Method of fabricating stacked capacitor cell memory devices
JP2755591B2 (ja) * 1988-03-25 1998-05-20 株式会社東芝 半導体記憶装置
JP2838412B2 (ja) * 1988-06-10 1998-12-16 三菱電機株式会社 半導体記憶装置のキャパシタおよびその製造方法
US5091761A (en) * 1988-08-22 1992-02-25 Hitachi, Ltd. Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover
US5219781A (en) * 1988-12-08 1993-06-15 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing semiconductor memory device having a stacked type capacitor
JPH02156566A (ja) * 1988-12-08 1990-06-15 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
US5059548A (en) * 1989-04-03 1991-10-22 Hyundai Electronics Industries Co., Ltd. Method of making a semiconductor memory device having a double stacked capacitor
US5162249A (en) * 1989-04-03 1992-11-10 Hyundai Electronics Industries Co., Ltd. Method of making semiconductor memory device having a double stacked capacitor
JPH0824169B2 (ja) * 1989-05-10 1996-03-06 富士通株式会社 半導体記憶装置の製造方法
US5196365A (en) * 1989-07-05 1993-03-23 Fujitsu Limited Method of making semiconductor memory device having stacked capacitor
JP2974252B2 (ja) * 1989-08-19 1999-11-10 富士通株式会社 半導体記憶装置
US5196909A (en) * 1989-11-30 1993-03-23 Sgs-Thomson Microelectronics, Inc. Capacitor for DRAM cell
JP2528719B2 (ja) * 1989-12-01 1996-08-28 三菱電機株式会社 半導体記憶装置
EP0449000B1 (de) * 1990-03-08 2004-08-18 Fujitsu Limited Schichtstruktur mit Kontaktierungsöffnung für flossenförmige Kondensatoren in DRAMS und Methode zur Herstellung desselben
JP2934325B2 (ja) * 1990-05-02 1999-08-16 三菱電機株式会社 半導体装置およびその製造方法
US5240872A (en) * 1990-05-02 1993-08-31 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device having interconnection layer contacting source/drain regions
JP2746730B2 (ja) * 1990-05-17 1998-05-06 富士通株式会社 半導体記憶装置
JP2504606B2 (ja) * 1990-05-18 1996-06-05 株式会社東芝 半導体記憶装置およびその製造方法
KR920001760A (ko) * 1990-06-29 1992-01-30 김광호 디램셀의 적층형 캐패시터 제조방법
KR930007192B1 (ko) * 1990-06-29 1993-07-31 삼성전자 주식회사 디램셀의 적층형캐패시터 및 제조방법
US5219778A (en) * 1990-10-16 1993-06-15 Micron Technology, Inc. Stacked V-cell capacitor
US5236855A (en) * 1990-11-06 1993-08-17 Micron Technology, Inc. Stacked V-cell capacitor using a disposable outer digit line spacer
US5049517A (en) * 1990-11-07 1991-09-17 Micron Technology, Inc. Method for formation of a stacked capacitor
JPH04181769A (ja) * 1990-11-15 1992-06-29 Matsushita Electric Ind Co Ltd 半導体記憶装置およびその製造方法
US6002149A (en) * 1990-11-19 1999-12-14 Micron Technology, Inc. Capacitor structures for memory cells
KR930009594B1 (ko) * 1991-01-30 1993-10-07 삼성전자 주식회사 고집적 반도체 메모리장치 및 그 제조방법
KR920017248A (ko) * 1991-02-18 1992-09-26 문정환 반도체 메모리 소자의 커패시터 제조방법
US5053351A (en) * 1991-03-19 1991-10-01 Micron Technology, Inc. Method of making stacked E-cell capacitor DRAM cell
US5100826A (en) * 1991-05-03 1992-03-31 Micron Technology, Inc. Process for manufacturing ultra-dense dynamic random access memories using partially-disposable dielectric filler strips between wordlines
KR930010081B1 (ko) * 1991-05-24 1993-10-14 현대전자산업 주식회사 2중 적층캐패시터 구조를 갖는 반도체 기억장치 및 그 제조방법
US5084406A (en) * 1991-07-01 1992-01-28 Micron Technology, Inc. Method for forming low resistance DRAM digit-line
EP0782195B1 (de) * 1991-07-25 1999-10-13 Fujitsu Limited Herstellungsverfahren für Kondensator mit gestapelter Flossenstruktur und mit reduzierter Flossendicke
TW301782B (de) * 1991-08-16 1997-04-01 Gold Star Electronics
US5231043A (en) * 1991-08-21 1993-07-27 Sgs-Thomson Microelectronics, Inc. Contact alignment for integrated circuits
TW243541B (de) * 1991-08-31 1995-03-21 Samsung Electronics Co Ltd
JPH0582747A (ja) * 1991-09-19 1993-04-02 Fujitsu Ltd 半導体装置
US5573967A (en) * 1991-12-20 1996-11-12 Industrial Technology Research Institute Method for making dynamic random access memory with fin-type stacked capacitor
US5208172A (en) * 1992-03-02 1993-05-04 Motorola, Inc. Method for forming a raised vertical transistor
US5525534A (en) * 1992-03-13 1996-06-11 Fujitsu Limited Method of producing a semiconductor device using a reticle having a polygonal shaped hole
US5591659A (en) * 1992-04-16 1997-01-07 Fujitsu Limited Process of producing a semiconductor device in which a height difference between a memory cell area and a peripheral area is eliminated
KR0121297B1 (en) * 1992-04-16 1997-11-15 Fujitsu Ltd Semiconductor device and process of producing the same
KR960003498B1 (ko) * 1992-06-18 1996-03-14 금성일렉트론주식회사 반도체장치의 캐패시터 제조방법
TW227628B (de) * 1992-12-10 1994-08-01 Samsung Electronics Co Ltd
GB2278907A (en) * 1993-06-08 1994-12-14 Vinten Group Plc Manual control system for camera mountings
US5648290A (en) * 1994-12-30 1997-07-15 Lsi Logic Corporation Method of making a CMOS dynamic random-access memory (DRAM)
US5959319A (en) * 1995-04-18 1999-09-28 Nippon Steel Corporation Semiconductor memory device having word line conductors provided at lower level than memory cell capacitor and method of manufacturing same
US5807782A (en) * 1995-09-25 1998-09-15 Vanguard International Semiconductor Corporation Method of manufacturing a stacked capacitor having a fin-shaped storage electrode on a dynamic random access memory cell
US5783470A (en) * 1995-12-14 1998-07-21 Lsi Logic Corporation Method of making CMOS dynamic random-access memory structures and the like
US5604146A (en) * 1996-06-10 1997-02-18 Vanguard International Semiconductor Corporation Method to fabricate a semiconductor memory device having an E-shaped storage node
TW312831B (en) * 1996-08-16 1997-08-11 United Microelectronics Corp Manufacturing method of semiconductor memory device with capacitor(3)
TW308727B (en) * 1996-08-16 1997-06-21 United Microelectronics Corp Semiconductor memory device with capacitor (4)
TW304288B (en) * 1996-08-16 1997-05-01 United Microelectronics Corp Manufacturing method of semiconductor memory device with capacitor
TW427012B (en) * 1996-08-16 2001-03-21 United Microelectronics Corp The manufacturing method of double-combined capacitor DRAM cells
TW308729B (en) * 1996-08-16 1997-06-21 United Microelectronics Corp Semiconductor memory device with capacitor (3)
TW302524B (en) * 1996-08-16 1997-04-11 United Microelectronics Corp Memory cell structure of dynamic random access memory and manufacturing method thereof
TW306064B (en) * 1996-08-16 1997-05-21 United Microelectronics Corp Semiconductor memory device with capacitor (part 6)
US5759890A (en) * 1996-08-16 1998-06-02 United Microelectronics Corporation Method for fabricating a tree-type capacitor structure for a semiconductor memory device
TW351846B (en) * 1996-08-16 1999-02-01 United Microelectronics Corp Method for fabricating memory cell for DRAM
US5739060A (en) * 1996-08-16 1998-04-14 United Microelecrtronics Corporation Method of fabricating a capacitor structure for a semiconductor memory device
TW312828B (en) * 1996-08-16 1997-08-11 United Microelectronics Corp Manufacturing method of semiconductor memory device with capacitor(5)
TW304290B (en) * 1996-08-16 1997-05-01 United Microelectronics Corp The manufacturing method for semiconductor memory device with capacitor
TW312829B (en) * 1996-08-16 1997-08-11 United Microelectronics Corp Semiconductor memory device with capacitor(6)
US5811848A (en) * 1996-08-16 1998-09-22 United Microelectronics Corporation Capacitor structure for a semiconductor memory device
US5744833A (en) * 1996-08-16 1998-04-28 United Microelectronics Corporation Semiconductor memory device having tree-type capacitor
US5796138A (en) * 1996-08-16 1998-08-18 United Microelectronics Corporation Semiconductor memory device having a tree type capacitor
TW366592B (en) * 1996-08-16 1999-08-11 United Microelectronics Corp DRAM memory and the manufacturing method for the memory cells
TW306036B (en) * 1996-08-16 1997-05-21 United Microelectronics Corp Semiconductor memory device with capacitor (part 2)
TW297948B (en) * 1996-08-16 1997-02-11 United Microelectronics Corp Memory cell structure of DRAM
JP3373134B2 (ja) * 1997-06-13 2003-02-04 沖電気工業株式会社 半導体装置の製造方法
US6146962A (en) * 1998-03-17 2000-11-14 National Semiconductor Corporation Method for forming a DRAM cell with a stacked capacitor
TW373323B (en) * 1998-03-18 1999-11-01 United Microelectronics Corporaiton Dynamic RAM production method
US6027969A (en) * 1998-06-04 2000-02-22 Taiwan Semiconductor Manufacturing Company Capacitor structure for a dynamic random access memory cell
US6333778B1 (en) * 1998-09-07 2001-12-25 Fuji Photo Film Co., Ltd. Image reading apparatus
US6083790A (en) * 1999-02-11 2000-07-04 Taiwan Semiconductor Manufacturing Company Ltd. Method for making y-shaped multi-fin stacked capacitors for dynamic random access memory cells
KR20010057669A (ko) 1999-12-23 2001-07-05 한신혁 적층형 캐패시터를 갖는 반도체 장치의 제조 방법
US6396096B1 (en) 2000-06-21 2002-05-28 International Business Machines Corporation Design layout for a dense memory cell structure
FR2816110B1 (fr) * 2000-10-27 2003-03-21 St Microelectronics Sa Lignes de bit en memoire dram
JP5179692B2 (ja) * 2002-08-30 2013-04-10 富士通セミコンダクター株式会社 半導体記憶装置及びその製造方法
JP2009206418A (ja) * 2008-02-29 2009-09-10 Elpida Memory Inc 不揮発性メモリ装置及びその製造方法
KR101597686B1 (ko) 2009-11-03 2016-02-25 삼성전자주식회사 3차원 반도체 장치 및 그 제조 방법

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5539073B2 (de) * 1974-12-25 1980-10-08
JPS5658255A (en) * 1979-10-17 1981-05-21 Oki Electric Ind Co Ltd Mos type semiconductor memory device
JPS5824022B2 (ja) * 1979-10-17 1983-05-18 沖電気工業株式会社 Ｍｏｓ型半導体記憶装置の製造方法
JPS5658253A (en) * 1979-10-17 1981-05-21 Oki Electric Ind Co Ltd Capacitor for integrated circuit
JPS57120295A (en) * 1981-01-17 1982-07-27 Mitsubishi Electric Corp Semiconductor memory device
US4493056A (en) * 1982-06-30 1985-01-08 International Business Machines Corporation RAM Utilizing offset contact regions for increased storage capacitance
JPS59175153A (ja) * 1983-03-23 1984-10-03 Nec Corp 半導体集積回路装置
JPS59197853A (ja) * 1983-04-23 1984-11-09 Nippon Telegr & Teleph Corp <Ntt> 超音波診断装置
JPS59198753A (ja) * 1983-04-27 1984-11-10 Hitachi Ltd Ｍｏｓ形ダイナミツクメモリおよびその製造方法
JPS59231851A (ja) * 1983-06-14 1984-12-26 Nippon Telegr & Teleph Corp <Ntt> 半導体メモリセル
JPS59231841A (ja) * 1983-06-14 1984-12-26 Mitsubishi Electric Corp 半導体装置
JPH0618257B2 (ja) * 1984-04-28 1994-03-09 富士通株式会社 半導体記憶装置の製造方法
US4715015A (en) * 1984-06-01 1987-12-22 Sharp Kabushiki Kaisha Dynamic semiconductor memory with improved sense signal
US4651183A (en) * 1984-06-28 1987-03-17 International Business Machines Corporation High density one device memory cell arrays
US4800525A (en) * 1984-10-31 1989-01-24 Texas Instruments Incorporated Dual ended folded bit line arrangement and addressing scheme
JPS61183952A (ja) * 1985-02-09 1986-08-16 Fujitsu Ltd 半導体記憶装置及びその製造方法
JPS61219166A (ja) * 1985-03-25 1986-09-29 Nec Corp 半導体記憶装置の製造方法
JPS61258467A (ja) * 1985-05-13 1986-11-15 Hitachi Ltd 半導体記憶装置
JPS6286853A (ja) * 1985-10-14 1987-04-21 Fujitsu Ltd 半導体装置の製造方法
JPS62120070A (ja) * 1985-11-20 1987-06-01 Toshiba Corp 半導体記憶装置
JPH0736437B2 (ja) * 1985-11-29 1995-04-19 株式会社日立製作所 半導体メモリの製造方法
JPH0691219B2 (ja) * 1985-12-20 1994-11-14 株式会社日立製作所 半導体記憶装置
JPS62286269A (ja) * 1986-06-04 1987-12-12 Fujitsu Ltd Ｄｒａｍセル及びその製造方法
JP2741857B2 (ja) * 1987-05-11 1998-04-22 株式会社日立製作所 半導体記憶装置
JPS63287363A (ja) * 1987-05-18 1988-11-24 Fujitsu Ltd 入力コンデンサの容量抜け検出方式
EP0750347B1 (de) * 1987-06-17 2002-05-08 Fujitsu Limited Dynamisches Speicherbauteil mit wahlfreiem Zugriff und Verfahren zu seiner Herstellung
KR910009805B1 (ko) * 1987-11-25 1991-11-30 후지쓰 가부시끼가이샤 다이나믹 랜덤 액세스 메모리 장치와 그의 제조방법

Also Published As

Publication number Publication date
US4953126A (en) 1990-08-28
US6114721A (en) 2000-09-05
EP0661752A3 (de) 1996-06-12
DE3856543T2 (de) 2003-03-20
EP0318277A2 (de) 1989-05-31
DE3854421D1 (de) 1995-10-12
US5572053A (en) 1996-11-05
US5128273A (en) 1992-07-07
KR910009805B1 (ko) 1991-11-30
EP0661752B1 (de) 2002-10-23
DE3854421T2 (de) 1996-02-15
EP0318277B1 (de) 1995-09-06
EP0318277A3 (en) 1990-10-31
US6046468A (en) 2000-04-04
KR890008991A (ko) 1989-07-13
EP0661752A2 (de) 1995-07-05

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