CN102497723B - 内置耐热性基板电路板 - Google Patents
内置耐热性基板电路板 Download PDFInfo
- Publication number
- CN102497723B CN102497723B CN201110360635.9A CN201110360635A CN102497723B CN 102497723 B CN102497723 B CN 102497723B CN 201110360635 A CN201110360635 A CN 201110360635A CN 102497723 B CN102497723 B CN 102497723B
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- Prior art keywords
- heat resistant
- resistant substrate
- substrate
- mentioned
- wiring board
- Prior art date
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- 239000000758 substrate Substances 0.000 title claims abstract description 209
- 239000010410 layer Substances 0.000 claims abstract description 94
- 229920005989 resin Polymers 0.000 claims abstract description 33
- 239000011347 resin Substances 0.000 claims abstract description 33
- 239000011229 interlayer Substances 0.000 claims abstract description 22
- 239000004020 conductor Substances 0.000 claims description 111
- 229910000679 solder Inorganic materials 0.000 claims description 32
- 238000009434 installation Methods 0.000 claims description 13
- 238000003475 lamination Methods 0.000 claims description 8
- 238000009713 electroplating Methods 0.000 claims 1
- 238000009413 insulation Methods 0.000 abstract description 2
- 239000006185 dispersion Substances 0.000 abstract 2
- 239000011295 pitch Substances 0.000 abstract 2
- 230000007423 decrease Effects 0.000 abstract 1
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 239000000463 material Substances 0.000 description 23
- 239000010949 copper Substances 0.000 description 15
- 229910052718 tin Inorganic materials 0.000 description 14
- 229910052802 copper Inorganic materials 0.000 description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 238000007772 electroless plating Methods 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 10
- 238000004806 packaging method and process Methods 0.000 description 10
- 238000007747 plating Methods 0.000 description 10
- 239000011248 coating agent Substances 0.000 description 9
- 238000000576 coating method Methods 0.000 description 9
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 8
- 230000004888 barrier function Effects 0.000 description 8
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 238000005476 soldering Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000003054 catalyst Substances 0.000 description 4
- 238000011049 filling Methods 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229910052763 palladium Inorganic materials 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 208000037656 Respiratory Sounds Diseases 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 238000002788 crimping Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000007788 roughening Methods 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- KWSLGOVYXMQPPX-UHFFFAOYSA-N 5-[3-(trifluoromethyl)phenyl]-2h-tetrazole Chemical compound FC(F)(F)C1=CC=CC(C2=NNN=N2)=C1 KWSLGOVYXMQPPX-UHFFFAOYSA-N 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 2
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonia chloride Chemical compound [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 230000008602 contraction Effects 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- CEYULKASIQJZGP-UHFFFAOYSA-L disodium;2-(carboxymethyl)-2-hydroxybutanedioate Chemical compound [Na+].[Na+].[O-]C(=O)CC(O)(C(=O)O)CC([O-])=O CEYULKASIQJZGP-UHFFFAOYSA-L 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 239000005297 pyrex Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910001379 sodium hypophosphite Inorganic materials 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- TXUICONDJPYNPY-UHFFFAOYSA-N (1,10,13-trimethyl-3-oxo-4,5,6,7,8,9,11,12,14,15,16,17-dodecahydrocyclopenta[a]phenanthren-17-yl) heptanoate Chemical compound C1CC2CC(=O)C=C(C)C2(C)C2C1C1CCC(OC(=O)CCCCCC)C1(C)CC2 TXUICONDJPYNPY-UHFFFAOYSA-N 0.000 description 1
- 241001270131 Agaricus moelleri Species 0.000 description 1
- 229910017083 AlN Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 229910021586 Nickel(II) chloride Inorganic materials 0.000 description 1
- 101150003085 Pdcl gene Proteins 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910021626 Tin(II) chloride Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 235000019270 ammonium chloride Nutrition 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- GVFOJDIFWSDNOY-UHFFFAOYSA-N antimony tin Chemical compound [Sn].[Sb] GVFOJDIFWSDNOY-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006555 catalytic reaction Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 229910052878 cordierite Inorganic materials 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- JSKIRARMQDRGJZ-UHFFFAOYSA-N dimagnesium dioxido-bis[(1-oxido-3-oxo-2,4,6,8,9-pentaoxa-1,3-disila-5,7-dialuminabicyclo[3.3.1]nonan-7-yl)oxy]silane Chemical compound [Mg++].[Mg++].[O-][Si]([O-])(O[Al]1O[Al]2O[Si](=O)O[Si]([O-])(O1)O2)O[Al]1O[Al]2O[Si](=O)O[Si]([O-])(O1)O2 JSKIRARMQDRGJZ-UHFFFAOYSA-N 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 229910052839 forsterite Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- HCWCAKKEBCNQJP-UHFFFAOYSA-N magnesium orthosilicate Chemical compound [Mg+2].[Mg+2].[O-][Si]([O-])([O-])[O-] HCWCAKKEBCNQJP-UHFFFAOYSA-N 0.000 description 1
- 210000004877 mucosa Anatomy 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 238000006386 neutralization reaction Methods 0.000 description 1
- QMMRZOWCJAIUJA-UHFFFAOYSA-L nickel dichloride Chemical compound Cl[Ni]Cl QMMRZOWCJAIUJA-UHFFFAOYSA-L 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910052700 potassium Inorganic materials 0.000 description 1
- 239000011591 potassium Substances 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910000029 sodium carbonate Inorganic materials 0.000 description 1
- 239000001119 stannous chloride Substances 0.000 description 1
- 235000011150 stannous chloride Nutrition 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 239000000454 talc Substances 0.000 description 1
- 229910052623 talc Inorganic materials 0.000 description 1
- 235000012222 talc Nutrition 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/01019—Potassium [K]
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
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Abstract
本发明提供一种可实现细间距的多层印刷线路板。在多层印刷线路板(10)中内置耐热性基板(30),并在该耐热性基板上交替层叠层间树脂绝缘层(50)和导体层(58),形成由导通孔(60)将各导体层之间连接起来的积层布线层。通过使用由Si基板(20)构成的耐热性基板,在镜面处理后的Si基板表面形成导通孔(48),从而与在具有凹凸的树脂基板上形成导通孔相比,可以形成较细的布线,可以实现细间距化。此外,通过在镜面处理后的表面上形成布线,可以减小布线偏差,减小阻抗偏差。
Description
本申请是申请日为“2007年4月20日”、申请号为“2007800071626(PCT/JP2007/058587)”、发明名称为“内置耐热性基板电路板”的发明申请的分案申请。
技术领域
本发明涉及一种内置有耐热性基板的内置耐热性基板电路板,特别是涉及适于用于安装IC芯片的封装基板的内置耐热性基板电路板。
背景技术
在日本特开2002-344142号公报中公开有如下这样的多层印刷线路板,作为用于安装IC芯片的多层印刷线路板,在具有通孔导体的树脂性芯基板上交替层叠层间树脂绝缘层和导体层,并用导通孔导体将导体层之间连接。
在日本特开2001-102479号公报中公开有将IC芯片和封装基板电连接的中继基板(interposer)。图2中的中继基板主体20是硅,在贯通硅的导通孔导体27上连接有IC芯片的电极,在与IC相反一侧的硅基板上形成有布线层。
专利文献1:日本特开2002-344142号公报
专利文献2:日本特开2001-102479号公报
随着IC芯片的微细化、高集成化,形成于封装基板最上层的焊盘数量增多,由于焊盘数量增多推进了焊盘的细间距(Fine-pitch)化。随着该焊盘的细间距化,封装基板的布线间距也快速细线化。但是,在现在的树脂制封装基板的布线形成技术中,难以跟上IC芯片的细间距化。
另一方面,若在上述封装基板与IC芯片之间夹设中继基板,则会增加通过焊锡回流焊(Solder Reflow)连接的焊盘的数量。与通过电镀等使电荷移动而进行的连接相比,由焊锡回流焊进行的连接可靠性低,随着焊盘数量的增多,出现可靠性降低这样的问题。
发明内容
本发明的目的之一在于提供一种可实现细间距化的内置耐热性基板电路板。另一目的在于通过将电子部件(例如IC芯片)的布线层组装到耐热性基板上来提高电子部件的成品率、降低电子部件的制造成本。再一目的在于减小内置耐热性基板电路板整体的热膨胀系数。而且,尤其是要提高内置耐热性基板电路板的可靠性。而且,提供被内置的耐热性基板与用于内置耐热性基板的内置用电路板之间的电连接可靠性,防止二者之间的剥离,防止在内置用电路板的绝缘层、导体层上发生裂纹。
本发明人为实现上述目的而进行了深入研究,想到了形成如下这样的内置耐热性基板电路板,该电路板由耐热性基板和用于内置该耐热性基板的内置用电路板构成,其中,耐热性基板由芯基板、通孔导体和积层布线层构成,该导通孔导体将该芯基板的表面和背面导通,该积层布线层形成于该芯基板上,交替层叠层间树脂绝缘层和导体层而成,并由导通孔导体连接各导体层之间,所述通孔导体的间距是30~200μm。
通过使用由Si(硅)基板那样的半导体用基板构成的芯基板,可以在平坦性优良的Si基板表面形成积层布线层,因此,与在具有凹凸的树脂基板上形成积层布线层相比,可以形成较细布线和厚度精度优良的导体电路,可以实现电路板的细间距化。而且,通过在镜面处理过的表面形成积层布线层,可以减小布线偏差,减小阻抗偏差。而且,通过在芯基板上形成积层布线层,可以实现高密度化、小型化,通过减少层数可以实现薄板化。此外,通过在芯基板表面或积层布线层上,或者是在积层布线层内形成L(电感器)、C(电容器)、R(电阻)、VRM(DC-DC转换器)等被动元件,可以实现强化电源、除去噪声。另外,通过将IC侧再布线层的一部分形成于耐热性基板一侧,也可以改善IC成品率和制造成本。
另外,通过在电路板中内置耐热性基板,可以通过电镀等与耐热性基板的连接用焊盘取得连接,可以提高可靠性。而且,与日本特开2001-102479号那样的中继基板不同,因此,减少了由焊锡凸块进行连接的连接点数,基板接受的回流焊次数减少。
由于在热膨胀系数较小的芯基板上形成再布线层,因此,与不形成再布线层时相比,耐热性基板相对于内置耐热性基板电路板的占有率变大。其结果,与没有形成再布线层相比,可减小内置耐热性基板电路板的热膨胀系数(内置耐热性基板电路板的热膨胀系数成为树脂基板与电子部件之间的热膨胀系数)。若热膨胀系数变小,则电子部件与内置耐热性基板电路板之间、内置耐热性基板电路板与同内置耐热性基板电路板连接的母板之间的剪切应力变小,因此,将电子部件与内置耐热性基板电路板之间、内置耐热性基板电路板与母板之间连接的连接构件(例如焊锡)不易发生破坏。而且,由于在芯基板上形成再布线层,因此,形成于芯基板上的通孔导体之间的间距变大。其结果,在热膨胀系数低的芯基板上不易发生裂纹。由于芯基板与形成于芯基板上的通孔导体的热膨胀系数不同,因此,在通孔导体周边,芯基板由于通孔导体而发生变形。通孔导体间隔越小,则通孔导体之间的芯基板的变形量越大。此外,通过设置再布线层,可以在整个芯基板范围形成通孔导体。因此,可以在芯基板内使热膨胀系数、杨氏模量大致均匀,因此,芯基板的翘起减小,可以防止芯基板上发生裂纹和耐热性基板与内置用电路板之间发生剥离。为了在整个芯基板大致均匀地配设通孔导体,优选是只在芯基板表面上形成积层层(表面再布线层)。
此外,不必使用日本特开2002-34414号中的由玻璃环氧树脂构成的芯基板(厚度为0.8mm左右),而是在硅等芯基板(厚度为0.3mm左右)上设置积层布线层,就可以减薄电路板的厚度(与日本特开2002-34414号中的多层印刷线路板的厚度为1mm左右相比,本申请中可以使其厚度为0.2~0.5mm左右),可以降低电感、提高电特性。另外,通过在具有层间树脂绝缘层的内置用电路板中内置由低热膨胀率的基板构成的芯基板,可以使内置耐热性基板电路板的热膨胀系数接近IC芯片的热膨胀系数,可以防止由于热收缩之差而引起的IC芯片与耐热性基板及内置耐热性基板电路板之间的接合构件(例如焊锡)发生断线。
构成耐热性基板的芯基板的材料优选是Si,但没有特别限定。例如可举出pyrex玻璃(pyrex是注册商标)、氧化锆、氮化铝、氮化硅、碳化硅、氧化铝、富铝红柱石、堇青石、滑石、镁橄榄石等陶瓷基板。
其中,Si基板最便宜且最容易获得,因此从成本方面考虑,优选是Si基板。
IC等电子部件与电路板(封装基板)之间的接合部所使用的焊锡材料无特别限定,例如可举出Sn/Pb、Sn/Ag、Sn、Sn/Cu、Sn/Sb、Sn/In/Ag、Sn/Bi、Sn/In、铜膏、银膏、导电性树脂等。
芯基板的贯通孔(通孔)可以用导电性物质填充,也可以采用在贯通孔内壁形成电镀导体(通孔导体)、在其未填充部填充了绝缘剂或导电性物质的构造。填充于贯通孔的导电性物质无特别限定,与导电性膏相比,优选是填充例如铜、金、银、镍等单一金属或由两种以上金属构成的金属。这是由于,与导电性膏相比,填充金属电阻较低,因此,向IC供电会顺利,发热量降低等。其他理由在于,由于用金属完全填充贯通孔内,因此,可利用金属的塑性变形来吸收应力。在通孔导体的未填充部填充树脂时,优选是填充低弹性的树脂。其理由是可以吸收应力。
附图说明
图1是本发明实施例1的内置耐热性基板电路板的剖视图。
图2是实施例1的耐热性基板的制造工序图。
图3是实施例1的耐热性基板的制造工序图。
图4是实施例1的耐热性基板的制造工序图。
图5是实施例1的内置耐热性基板电路板的制造工序图。
图6是实施例1的内置耐热性基板电路板的制造工序图。
图7是实施例1的内置耐热性基板电路板的制造工序图。
图8是本发明实施例2的内置耐热性基板电路板的剖视图。
图9是本发明实施例3的内置耐热性基板电路板的剖视图。
图10是本发明实施例4的内置耐热性基板电路板的剖视图。
图11是本发明实施例5的内置耐热性基板电路板的剖视图。
图12是本发明实施例6的内置耐热性基板电路板的剖视图。
图13是本发明实施例7的内置耐热性基板电路板的剖视图。
图14是本发明实施例8的内置耐热性基板电路板的剖视图。
图15是本发明实施例9的内置耐热性基板电路板的剖视图。
图16是本发明实施10的内置耐热性基板电路板的剖视图。
图17是本发明实施例11的内置耐热性基板电路板的剖视图。
附图标记的说明
10:内置耐热性基板电路板;20:基材;30:耐热性基板;36:通孔;38:焊盘;40:绝缘层;48:导通孔;50:层间绝缘层;60:导通孔;78U:焊锡凸块;78D:焊锡凸块;150:层间绝缘层;160:导通孔。
具体实施方式
实施例1
1.树脂制封装基板
图1表示构成树脂制封装基板的实施例1的内置耐热性基板电路板的结构。该内置耐热性基板电路板10内置有耐热性基板30。耐热性基板30具有基材(芯基板)20。基材20上设有通孔导体36,在通孔导体36的两端形成有通孔焊盘38。在芯基板20的两面形成有导体电路39。在基材20的两面配置有由导通孔导体48、导体电路49及绝缘层40构成的再布线层和由导通孔导体148、导体电路149及绝缘层140构成的再布线层(积层布线层)。在内置耐热性基板电路板10的表面和背面形成有阻焊层70,阻焊层70形成有使导通孔导体148和导体电路149的一部分露出的开口70a。导通孔导体148和导体电路149的露出部相当于安装用焊盘148P。在安装用焊盘148P上设有焊锡凸块78U。通过该焊锡凸块78U连接IC芯片90的电极92,从而来安装IC芯片90。
另一方面,在耐热性基板30的与IC芯片相反一侧的面(下表面)设有形成有导通孔导体60和导体电路58的层间树脂绝缘层50、以及形成有导通孔导体160和导体电路158的层间树脂绝缘层150。在该层间树脂绝缘层150的上层形成有阻焊层70,通过该阻焊层70的开口部70a而在导通孔导体160上形成焊锡凸块78D。
在此,安装用焊盘148P形成在导通孔导体148的正上方、自导通孔导体148延伸的导体电路149(除了导通孔导体148正上方以外的区域)上。安装用焊盘148P配置成格子状或交错状,将安装用焊盘148P之间的间距可以采用30~150μm的间距,考虑到安装用焊盘148P之间的绝缘性、耐热性基板30的可靠性和要将电子部件的布线层组装到印刷线路板上,安装用焊盘148P之间的间距优选为50~100μm。安装部的安装用焊盘148P其间距因积层层而扩大,通过芯基板20上的导体电路(包括将通孔导体36封住的导体电路,参照图1中心的通孔导体36之上的导体电路38)与通孔导体36导通。在此,可以使通孔导体36之间的间距大于安装用焊盘148P的间距,为30~200μm,考虑到芯基板20的绝缘可靠性、耐热循环性和抗裂纹性,通孔导体36之间的间距优选为75~150μm。在芯基板20的背面上也形成有积层层(背面再布线层),在其背面最外面形成有用于与内置用电路板电连接的连接用焊盘148D,该内置用电路板用于内置耐热性基板30。连接用焊盘148D的间距可以大于通孔导体36的间距,为50~250μm。连接用焊盘148D形成在导通孔导体148的正上方、自导通孔导体148延伸的导体电路149上。在连接用焊盘148D上形成有内置用电路板的导通孔导体60。
另外,在图1中,也可以是不形成表面再布线层,而将基材20表面上的通孔焊盘38、导体电路39作为安装用焊盘148P。此时,可以将所有安装用焊盘148P作为通孔导体36正上方的通孔焊盘38,也可以将位于外周的安装用焊盘148P作为与通孔导体36连接的导体电路39的一部分(参照图1两端的与通孔导体36连接的导体电路39),将位于中心部的安装用焊盘148P作为通孔导体36正上方的通孔焊盘38的一部分。
此外,在图1中,也可以是不形成背面再布线层,而将基材20背面上的导体电路39、通孔焊盘38作为连接用焊盘148D。此时,可以将所有连接用焊盘148D作为通孔导体36正上方的通孔焊盘38,也可以将芯基板20外周的连接用焊盘148D作为与通孔导体36相连接的导体电路39的一部分(参照图1两端的与通孔导体36连接的导体电路39),将中心部的连接用焊盘148D作为通孔导体36正上方的通孔焊盘38的一部分。从可以扩大形成在芯基板20上的通孔导体36的间距方面、提高耐热性基板30的绝缘性、抗裂纹性和耐热循环性等方面考虑,耐热性基板30优选是由基材20和表面再布线层(表面积层层)构成。
2.制作耐热性基板
参照图2~图4,说明实施例1的耐热性基板的制造工序。
(1)准备由硅构成的厚0.5mm的基材(芯基板)20(图2(A))。对基材20进行研磨,将厚度调整为0.3mm(图2(B))。
(2)进行UV激光照射,穿设贯通基材20的通孔导体形成用开口22(图2(C))。在此,虽然使用了UV激光器,但也可以取而代之,采用喷砂法、RIE而形成开口。
(3)在1000℃进行热氧化处理,形成绝缘覆膜24(图2(D))。也可以取代热氧化处理,而进行CVD。
(4)通过溅镀形成Ni/Cu薄膜26(图2(E))。也可以取代溅镀而使用无电解电镀。
(5)以薄膜26为电镀引线,按以下的电镀液和电镀条件实施电解镀铜处理,在开口22内形成电解镀铜层28作为通孔导体36,并在基材20的表面也形成电解镀铜层28(图3(A))。
(电解电镀液)
硫酸 2.24mol/l
硫酸铜 0.26mol/l
添加剂 19.5ml/l(アトテツクジヤパン(Atotech Japan)社制,カパラシドGL)
(电解电镀条件)
电流密度 6.5A/dm2
时间 30分钟
温度 22±2℃
(6)对形成于基材20表面的电解镀铜层28施加CMP研磨(图3(B))。
(7)对电解镀铜层28形成图案,形成通孔焊盘38和导体电路39(图3(C))。
(8)在基材20的两面设置绝缘层(例如聚酰亚胺或味之素社制的ABF)40,通过激光穿设出开口40a(图3(D))。
(9)通过溅镀在绝缘层40表面形成Ni/Cu薄膜44,在薄膜上设置规定图案的阻镀层42(图3(E))。也可以取代溅镀而采用无电解电镀。
(10)通过形成电解镀铜层44而形成导通孔导体48和导体电路49(图4(A))。其后,剥离阻镀层42,通过光刻除去阻镀层下的薄膜44(图4(B))。
然后,形成绝缘140(图4(C)),设置导通孔导体148和导体电路149,从而形成耐热性基板30(图4(D))。
以下,参照图5~图7,说明内置耐热性基板电路板的制造工序。
(1)准备用于安装耐热性基板的支承板31(图5(A)),在支承板31上安装上述耐热性基板30(图5(B))。
(2)在支承板31下表面粘贴1张或多张层间树脂绝缘层用树脂膜(味之素社制,商品名:ABF-45SH),并在以压力0.45MPa、温度80℃、压接时间10秒的条件进行临时压接,然后,再使用真空层压装置通过以下方法进行粘贴,从而形成了内置有耐热性基板30的层间树脂绝缘层50(图5(C))。即,以真空度67Pa、压力0.47MPa、温度85℃、压接时间60秒的条件将层间树脂绝缘层用树脂膜正式压接到基板上,之后在170℃的条件下使其热固化40分钟。
(3)接着,用波长为10.4μm的CO2气体激光在光束直径为4.0mm、平顶(top-hat)模式、脉冲宽度为3~30μ秒、掩模的贯通孔直径为1.0~5.0mm、1~3次射击的条件下,在层间树脂绝缘层50上穿设出导通孔用开口50a(图5(D))。其后,将形成了导通孔用开口50的基板浸渍在含有60g/l的高锰酸的80℃溶液中10分钟,除去存在于层间树脂绝缘层表面的粒子,从而对包括导通孔用开口50a的内壁在内的层间树脂绝缘层50的表面进行粗糙化(省略图示)。自开口50a露出的部分成为连接焊盘148D。
(5)接着,将完成了上述处理的基板浸渍在中和溶液(シプレイ(Shipley Company)社制)中之后,对其进行水洗。然后,通过在进行了表面粗糙化处理(粗糙化深度3μm)的该基板表面上施加钯催化剂,使催化核附着在层间树脂绝缘层的表面及填充导通孔用开口的内壁面。即,通过将上述基板浸渍在含有氯化钯(PdCl2)和氯化亚锡(SnCl2)的催化剂溶液中,而使钯金属析出来施加催化剂。
(5)接着,将施加了催化剂的基板浸渍在上村工业社制的无电解镀铜水溶液(スルカツプPEA(Thru-cup PEA))中,在整个粗糙面上形成了厚度为0.3~3.0μm的无电解镀铜膜,从而得到了在包括导通孔用开口50a的内壁在内的层间树脂绝缘层50的表面上形成了无电解镀铜膜52的基板(图6(A))。
(无电解电镀条件)
34度的液温下进行45分钟
(6)在形成有无电解镀铜膜52的基板上粘贴市场上销售的感光性干膜,并载置掩模,以110mJ/cm2进行曝光、以0.8%碳酸钠水溶液进行显影处理,由此设置厚度为25μm的阻镀层53(图6(B))。
(7)接着,在用50℃的水将基板30清洗干净,对其进行脱脂,并用25℃的水对其进行水洗之后,再用硫酸对其进行清洗,然后在以下条件下实施电解电镀,从而形成了电解镀膜54(图6(C))。
(电解电镀液)
(电解电镀条件)
电流密度 1A/dm2
时间 70分钟
温度 22±2℃
(8)然后,在用5%KOH剥离并除去了阻镀层53之后,用硫酸与过氧化氢的混合液对该阻镀层下面的无电解电镀膜进行蚀刻处理而将其溶解除去,形成了独立的导体电路58和导通孔导体60(图6(D))。接着,在导体电路58和导通孔导体60的表面形成了粗糙面(省略图示)。
(9)通过重复进行上述(2)~(8)的工序,进而形成了具有上层导通孔导体160的层间绝缘层150(图7(A)),通过除去支承板31而得到了多层线路板(图7(B))。
(10)接着,在多层电路板的两面涂敷20μm厚的市场上销售的阻焊剂组成物70,并在以70℃下进行20分钟、70℃下进行30分钟的条件进行干燥处理,然后使描绘出阻焊剂开口部的图案的、厚度为5mm的光掩模紧贴在阻焊层70上,并用1000mJ/cm2的紫外线进行曝光,用DMTG溶液进行显影处理,从而形成了直径为20μm的开口70a(图7(C))。
然后,进一步在80℃下进行1小时、100℃下进行1小时、120℃下进行1小时、150℃下进行3小时的条件下分别进行加热处理,使阻焊层固化,从而形成了具有开口70a的、厚度为15~25μm的阻焊剂图案层70。自开口70a露出的导通孔导体148和导体电路149的一部分成为安装用焊盘148P。
(11)接着,将形成了阻焊层70的基板在含有氯化镍(2.3×10-1mol/l)、次磷酸钠(2.8×10-1mol/l)、柠檬酸钠(1.6×10-1mol/l)的pH=4.5的无电解镀镍溶液中浸渍20分钟,在开口部70a的安装用焊盘148P上形成了厚度为5μm的镀镍层(省略图示)。然后,在80℃的条件下将该基板在含有氰化金钾(7.6×10-3mol/l)、氯化铵(1.9×10-1mol/l)、柠檬酸钠(1.2×10-1mol/l)、次磷酸钠(1.7×10-1mol/l)的无电解镀金溶液中浸渍7.5分钟,在镀镍层上形成了厚度为0.03μm的镀金层(省略图示)。除了镍-金层之外,也可以形成单层的锡、贵金属层(金、银、钯、铂等)。
(12)然后,在基板的载置IC芯片的一面的阻焊层70的开口70a中印刷了含有锡-铅的焊锡膏,并在另一面的阻焊层70的开口70a中印刷了含有锡-锑的焊锡膏,之后在200~240℃的条件下进行回流焊而形成了焊锡凸块(焊锡体),从而得到具有焊锡凸块78U、78D的内置耐热性基板电路板(图7(D))。
3.制作半导体装置
对向图7(D)所示的内置耐热性基板电路板(封装基板)10安装IC芯片进行说明。
首先,将IC芯片90与内置耐热性基板电路板10对位,将其安装于该电路板10上。然后,进行回流焊来安装(参照图1)。然后,将密封剂(底层填料:省略图示)填充到内置耐热性基板电路板10与IC芯片90之间,在80度下固化15分钟,接着,在150度固化2小时。下
实施例2
图8表示实施例2的内置耐热性基板电路板的结构。该内置耐热性基板电路板10内置有耐热性基板30。耐热性基板30具有基材20,基材20设有通孔导体36,在通孔导体36的两端形成有通孔焊盘38。在耐热性基板30的IC芯片一侧的面(上表面)配置有由导通孔导体48和绝缘层40构成的积层布线层。在背面没有再布线层。在导通孔导体48的阻焊层70的开口70a中设有焊锡凸块78U。通过该焊锡凸块78U连接IC芯片90A、IC芯片90B的电极92,从而来安装IC芯片(MPU)90A、IC芯片(存储器)90B。
内置耐热性基板电路板10的厚度是0.1~1.0mm。芯基板20的厚度是0.05~0.5mm。
基材(芯基板)20的热膨胀系数是3.0~10ppm,通过夹设基材20,可以减小内置耐热性基板电路板10的热膨胀系数。减小由于IC芯片90A、90B与树脂制内置耐热性基板电路板10之间的热膨胀系数之差而引起的应力。其结果,减小了施加于IC芯片与树脂制封装层之间的焊锡凸块的应力。此外,不会将应力传递到IC芯片的布线层的树脂。因此,IC芯片的布线层树脂不会发生龟裂、断线。
实施例3
参照图9说明实施例3的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,在芯基板的两面设置了再布线层。而在实施例3中,在芯基板上不设置再布线层。在实施例3的结构中,也可以利用芯基板20减薄内置耐热性基板电路板,并使所安装的IC芯片(Chip set)90A、IC芯片(GPLI)90B与内置耐热性基板电路板10的热膨胀系数接近,来防止由于热收缩引起的断线。
实施例4
参照图10说明实施例4的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,在芯基板20的两面设置了再布线层。而在实施例4中,在芯基板20的与IC芯片(存储器)90A、IC芯片(逻辑电路)90B相反一侧的表面(下表面)设置积层布线层。实施例4的结构也能得到与实施例1大致相同的效果。
实施例5
参照图11说明实施例5的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,在芯基板20的两面设置了再布线层。而在实施例5中,在芯基板20的IC芯片一侧表面(上表面)和与IC芯片相反一侧的表面(下表面)这两表面设置积层布线层。实施例5的结构虽然没有在耐热性基板上再布线,但也可以减小内置耐热性基板电路板的热膨胀率。
实施例6
参照图12说明实施例6的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,耐热性基板30收容在内置耐热性基板电路板10的层间绝缘层50内。而在实施例6中,将耐热性基板30配置于表面,使内置耐热性基板电路板的表面的层间树脂绝缘层50与耐热性基板30的IC芯片一侧表面无台阶而大致平坦。此外,在上表面不设置阻焊层。
实施例7
参照图13说明实施例7的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,耐热性基板30收容在内置耐热性基板电路板10的层间绝缘层50内。而在实施例7中,使耐热性基板30表面从内置耐热性基板电路板的表面的层间树脂绝缘层50突出。此外,在上表面不设置阻焊层。
实施例8
参照图14说明实施例8的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,在耐热性基板30下表面侧设置了内置耐热性基板电路板的积层层50、150。而在实施例8中,在耐热性基板30的IC芯片侧的面上也形成了内置耐热性基板电路板的积层层150。
实施例9
参照图15说明实施例9的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,在耐热性基板30的基材20的表面形成了通孔焊盘38和导体电路39。而在实施例9中,仅在耐热性基板30的基材20的IC芯片侧的面上设置通孔焊盘38和导体电路39。
实施例10
参照图16说明实施例10的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,在芯基板20的两面形成了通孔焊盘38和导体电路39。而在实施例10中,仅在耐热性基板30的基材20的与IC芯片相反一侧的面上设置了通孔焊盘38和导体电路39。
实施例11
参照图17说明实施例11的内置耐热性基板电路板的结构。
在参照图1的上述实施例1中,在芯基板20的两面形成了通孔焊盘38和导体电路39。而在实施例11中,在基材20上不设置导体电路。
在实施例2~4、6~11中,安装用焊盘148P的间距与通孔导体36的间距、连接用焊盘148D的间距相同,但不限定于此形态。如参照图1所述的实施例1那样,优选是安装用焊盘148P的间距、通孔导体36的间距、连接用焊盘148D的间距依次扩大。此外,在实施例2~实施例11中,安装了多个电子部件,但也可以在电路板一侧安装MPU、另一侧安装存储器,在芯基板20上的表面两布线层(表面积层层)设置用于二者获取信号的布线。作为其他电子部件有芯片组、逻辑电路、图形等。
Claims (6)
1.一种内置耐热性基板电路板,该电路板由耐热性基板和用于内置该耐热性基板的内置用电路板构成,其特征在于,
上述耐热性基板由芯基板、通孔导体和积层布线层构成,该通孔导体将该芯基板的表面和背面导通,该积层布线层形成于芯基板上,交替层叠层间树脂绝缘层和导体层而成,并用导通孔导体连接各导体层之间,所述通孔导体的间距是30~200μm,
其中,上述耐热性基板在形成于芯基板背面的积层布线层的表面还具有用于与内置用电路板电连接的连接用焊盘,该连接用焊盘通过电镀与内置用电路板相连接。
2.根据权利要求1所述的内置耐热性基板电路板,其特征在于,上述耐热性基板在形成于芯基板表面的积层布线层的表面还具有用于与电子部件的电极相连接的安装用焊盘,上述安装用焊盘的间距小于上述芯基板的通孔导体的间距。
3.根据权利要求1所述的内置耐热性基板电路板,其特征在于,上述连接用焊盘的间距大于上述芯基板的通孔导体的间距。
4.根据权利要求1所述的内置耐热性基板电路板,其特征在于,上述积层布线层由形成于芯基板表面上的表面积层布线层和形成于芯基板背面上的背面积层布线层构成,
上述耐热性基板还具有安装用焊盘和连接用焊盘,该安装用焊盘形成于上述表面积层布线层表面,与电子部件的电极相连接;该连接用焊盘形成于上述背面积层布线层表面,将电子部件的电极和内置用电路板电连接,
上述安装用焊盘间距、上述通孔导体间距和上述连接用焊盘间距按该安装用焊盘间距、该通孔导体间距和该连接用焊盘间距的顺序依次变大。
5.根据权利要求2所述的内置耐热性基板电路板,其特征在于,在形成于芯基板表面的积层布线层上设置了阻焊层。
6.根据权利要求1~5中任一项所述的内置耐热性基板电路板,其特征在于,上述耐热性基板和上述内置用电路板的表面为同一平面。
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Also Published As
Publication number | Publication date |
---|---|
US8541691B2 (en) | 2013-09-24 |
EP2015623A4 (en) | 2009-12-16 |
CN101395978A (zh) | 2009-03-25 |
US8507806B2 (en) | 2013-08-13 |
TWI347154B (zh) | 2011-08-11 |
US20090260857A1 (en) | 2009-10-22 |
US20090084594A1 (en) | 2009-04-02 |
US7462784B2 (en) | 2008-12-09 |
JPWO2007129545A1 (ja) | 2009-09-17 |
US20110063806A1 (en) | 2011-03-17 |
CN101395978B (zh) | 2013-02-06 |
CN102497723A (zh) | 2012-06-13 |
US7994432B2 (en) | 2011-08-09 |
US20090255716A1 (en) | 2009-10-15 |
KR101026655B1 (ko) | 2011-04-04 |
KR20080087085A (ko) | 2008-09-30 |
WO2007129545A1 (ja) | 2007-11-15 |
US8008583B2 (en) | 2011-08-30 |
EP2015623A1 (en) | 2009-01-14 |
US20070256858A1 (en) | 2007-11-08 |
TW200810630A (en) | 2008-02-16 |
TWI358973B (zh) | 2012-02-21 |
TW201121376A (en) | 2011-06-16 |
EP2015623B1 (en) | 2012-03-28 |
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