TWI358973B - - Google Patents
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- Publication number
- TWI358973B TWI358973B TW099139185A TW99139185A TWI358973B TW I358973 B TWI358973 B TW I358973B TW 099139185 A TW099139185 A TW 099139185A TW 99139185 A TW99139185 A TW 99139185A TW I358973 B TWI358973 B TW I358973B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- heat
- layer
- resistant substrate
- conductor
- Prior art date
Links
- 239000000758 substrate Substances 0.000 claims description 232
- 239000010410 layer Substances 0.000 claims description 107
- 239000004020 conductor Substances 0.000 claims description 106
- 239000011347 resin Substances 0.000 claims description 32
- 229920005989 resin Polymers 0.000 claims description 32
- 229910000679 solder Inorganic materials 0.000 claims description 29
- 239000011229 interlayer Substances 0.000 claims description 21
- 238000007747 plating Methods 0.000 claims description 16
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 239000002344 surface layer Substances 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 22
- 239000010949 copper Substances 0.000 description 15
- 229910052802 copper Inorganic materials 0.000 description 13
- 239000010408 film Substances 0.000 description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 11
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 10
- 239000000243 solution Substances 0.000 description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 7
- 238000009713 electroplating Methods 0.000 description 7
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 229910052718 tin Inorganic materials 0.000 description 6
- 239000003054 catalyst Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 238000007772 electroless plating Methods 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- KWSLGOVYXMQPPX-UHFFFAOYSA-N 5-[3-(trifluoromethyl)phenyl]-2h-tetrazole Chemical compound FC(F)(F)C1=CC=CC(C2=NNN=N2)=C1 KWSLGOVYXMQPPX-UHFFFAOYSA-N 0.000 description 2
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonia chloride Chemical compound [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 2
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000002788 crimping Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 229910052707 ruthenium Inorganic materials 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000001509 sodium citrate Substances 0.000 description 2
- NLJMYIDDQXHKNR-UHFFFAOYSA-K sodium citrate Chemical compound O.O.[Na+].[Na+].[Na+].[O-]C(=O)CC(O)(CC([O-])=O)C([O-])=O NLJMYIDDQXHKNR-UHFFFAOYSA-K 0.000 description 2
- 229910001379 sodium hypophosphite Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- TXUICONDJPYNPY-UHFFFAOYSA-N (1,10,13-trimethyl-3-oxo-4,5,6,7,8,9,11,12,14,15,16,17-dodecahydrocyclopenta[a]phenanthren-17-yl) heptanoate Chemical compound C1CC2CC(=O)C=C(C)C2(C)C2C1C1CCC(OC(=O)CCCCCC)C1(C)CC2 TXUICONDJPYNPY-UHFFFAOYSA-N 0.000 description 1
- 241000251468 Actinopterygii Species 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- QAOWNCQODCNURD-UHFFFAOYSA-L Sulfate Chemical compound [O-]S([O-])(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-L 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910021626 Tin(II) chloride Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 235000019270 ammonium chloride Nutrition 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 229910052878 cordierite Inorganic materials 0.000 description 1
- JSKIRARMQDRGJZ-UHFFFAOYSA-N dimagnesium dioxido-bis[(1-oxido-3-oxo-2,4,6,8,9-pentaoxa-1,3-disila-5,7-dialuminabicyclo[3.3.1]nonan-7-yl)oxy]silane Chemical compound [Mg++].[Mg++].[O-][Si]([O-])(O[Al]1O[Al]2O[Si](=O)O[Si]([O-])(O1)O2)O[Al]1O[Al]2O[Si](=O)O[Si]([O-])(O1)O2 JSKIRARMQDRGJZ-UHFFFAOYSA-N 0.000 description 1
- 238000004945 emulsification Methods 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 229910052500 inorganic mineral Inorganic materials 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000011707 mineral Substances 0.000 description 1
- 238000006386 neutralization reaction Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920002401 polyacrylamide Polymers 0.000 description 1
- NNFCIKHAZHQZJG-UHFFFAOYSA-N potassium cyanide Chemical compound [K+].N#[C-] NNFCIKHAZHQZJG-UHFFFAOYSA-N 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910000029 sodium carbonate Inorganic materials 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 239000001119 stannous chloride Substances 0.000 description 1
- 235000011150 stannous chloride Nutrition 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 229910021653 sulphate ion Inorganic materials 0.000 description 1
- 239000000454 talc Substances 0.000 description 1
- 229910052623 talc Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- -1 |bar Chemical compound 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
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Description
1358973 六、發明說明: 【發明所屬之技術領域】 本發明係關於内藏耐熱性基板 配線板,特別是關於適於搭載丨c晶 基板内藏電路配線板。 【先前技術】
本特開2002 344142號,揭示有—種多層印刷配線 板’其係作為構裝之多層印刷配線板,於具有穿孔 導體之樹月曰的核〜基板上交互積層層間樹脂絕緣層與導 體層,將導體層間以導通孔導體連接者。 日本特開2001 -1 02479號,揭示一種中介層,其係電 性連接ic晶片與封裝基板者。於圖2之中介層本體2〇係 矽,於貫通矽的導通導體27連接IC晶片的電極,於與ic 相反側之矽基板上形成配線層。
之耐熱性基板内藏電路 片之封裝基板之耐熱性 [專利文獻1]日本特開2002-344142號 [專利文獻2]日本特開2001-102479號 【發明内容】 [發明所欲解決的課題] 隨著IC晶片的細微化,高積體化,形成於封裝基板的 最上層之連接墊數增大,由於連接墊數的增大進行連接塾 的細微間距化。隨著該連接墊之細微間距化,封裝基板之 配線間距亦急速地在細微化。但是,以現在的樹脂製封裝 1358973 難以追隨I c晶片的細微間距化。 基板之配線形成技術 另-方面’若於上述封裝基板與ic晶片之間介在中介 層、,則會增加藉由軟焊迴焊連接之連接墊。藉由軟焊迴焊 之連接,相較於藉由電鍍等之電荷移動之連接可靠性低, 隨著連接墊數的增大,會發生降低可靠性之課題。 j發明之目的之卜係提供可實現細微化之对熱性基 板内藏電路配線板。其他的目的,係藉由將電子零件(例如 1C晶片)的配線層藉由採入耐熱性基板以提冑電子零件的 良率’或減低電子零件的製造成本。別的目的,係使耐數 性基板内藏電路配線板全體的熱膨脹係數小。再者,提高 配線板,特別是耐熱性基板内藏電路配線板之可靠性。又, 提高内藏之耐熱性基板與内藏耐熱性基板之内藏用配線基 板間的電性連接可靠性,或防止兩者間的剝離於内藏用配 線基板的絕緣層或導電層發生龜裂。 [用以解決課題的手段] 發明者們,朝向實現上述目的銳意研究之結果,想到 一種耐熱性基板内藏配線板,其係包含耐熱性基板與内藏 該耐熱性基板之内藏用配線基板者,導通核心基板上形成 有導通核心基板的表面與背面之穿孔導體,層間樹脂絕緣 層與導體層交互積層,形成各導體層間以導通孔導體連接 之增層配線層所構成之耐熱性基板内藏電路配線板。 由於藉由使用如矽基板之半導體用基板所構成之核心 基板’可於平坦性優良的Si基板表面形成增層配線層故 13^8973 可形成較在具有凹凸之樹脂基板上細的配線或厚度精度優 良的導體包路’可實現電路配線板之細微間距化。又藉 由在鏡面處理之表面形成增層配線層配線的離散變小, °使阻抗的離散小。再者,冑由在核心基板上形成增層配 線層’可圖謀高密度化,可小型 <匕,可藉由減少層數而薄 板化又藉由於核心基板表面或增層配線層上,或者, 於增層配線層内形成L(電感)、c(電容)、R(電阻)' RM( DC DC轉換器)等的被動元件’可圖謀電源強化,去除 雜訊。再者,亦可藉由將1C側之再配線層之一部分形成於 耐熱性基板側,改善IC良率或製造成本。 又’藉由在電路配線板内藏耐熱性基板,可對耐熱性 基板之連接用連接墊,藉由電鍍等取得連接,可提升可靠 性。又’由於與日本特開2〇〇1_1〇2479號之中介層不同, 故軟焊凸塊的連接點減少,基板受到迴焊的次數減少。 為在熱膨脹係數小的核心基板形成再配線層,較沒有 形成再配線層時,耐熱性基板對耐熱性基板内藏電路配線 板之佔有率會變大。結果,相較於沒有再配線層者可使耐 熱性基板内藏電路配線板之熱膨脹係數小(耐熱性基板内 藏電路配線板之熱膨脹係數成樹脂基板與電子零件之間的 熱膨脹係數)。熱膨脹係數變小,則由於電子零件與耐熱性 基板内藏電路配線板間、或與耐熱基板内藏電路配線板與 财熱性基板内藏電路配線板連接之母板間的剪斷力變小, 故不容易發生連接電子零件與耐熱性基板内藏電路配線板 1358973 或耐熱性基板内藏電路配線板間與母板間之連接構件 (例如軟焊)之破壞。又’由於在核心基板形成再配線層, 故形成於核心基板之穿礼導體間的間距變寬。結果,不容 易在低膨脹細樹之核心基板發生龜裂。由於核心基板與形 成於核心基板之穿孔導體之熱膨脹係數相異,故在穿孔導 體周邊核心基板會因穿孔導體變形。穿孔導體間距越小, 牙孔導體間的核心基板的變形量會變大。又,藉由設置再 配線層,可橫跨核心基板全體形成穿孔導體。因此,由於 在核心基板内的熱膨脹係數或揚氏係數變大致均勻,故可 使核心基板之反曲變小,可防止核心基板之龜裂或耐熱性 基板與内藏用配線基板間的剝離。為於核心基板全體大致 均勻地配設穿孔導體,於核心基板的表面上最好僅形成增 層層(表面再配線層)。 又,不使用日本特開2002_34414號所述由玻璃環氧布 構成之核心基板(厚度〇. 8毫米程度)’而藉由於矽基板等 核心基板(厚纟〇.3毫米程度)上,設增層配線I,可使電 路配線板的厚度變薄(相對於日本特開2〇〇2_34414號之多 層印刷配線板之厚度為i毫米可使之為〇 2~〇·5毫米程 度)’可降低阻抗提高電氣特性。再者,藉由於具備層間樹 脂絕緣層之内藏用S己線基板’内藏由低膨脹係數之基板構 成之核心基板,可使耐熱性基板内藏電路配線板之熱膨張 係數接近的熱膨祕數,可防止耐熱性基板與耐熱 性基板内藏電路配線板間之接合構件(例 > 軟焊)因熱收縮 差引起斷線。 構成耐熱I·生基板之核心基板之材料以s i為佳,惟並 無特別限定。可舉例如,百麗玻璃、氧化錯、氮化链、氮 化石夕、碳化石夕、氧化銘、耐火土、堇青石、塊滑石、錢撤 欖石等的陶瓷基板。 其中,由Si基板可最容易且廉價地入手,而以成本的 觀點較佳。 作為使用於IC等電子零件與電路配線板(封裝基板) 門的接σ部之軟焊材料,雖並無特別限定,可舉例如,
Pb Sn/Ag、Sn、Sn/Cu、Sn/Sb、Sn/In/Ag、Sn/Bi、Sn/In、 銅糊料、銀糊料、導電性樹脂等。 核基板的貫通孔(穿孔),亦可以導電性物質充填, ^貫通孔内壁形成電鍵導體(穿孔導體),於其未充填部充 ^ ^ 电改物貝之構造亦可。充填於貫通孔的導電 質,並無特別限定,例如以銅、金 '銀、鎳等單一的 或兩種以上的金屬充填,較以導電性糊料佳。此係, 暢’ 1目較於?電性糊料電阻低’故對ic的電源供給變順 3發熱I低。作為其他理由,由於貫通孔内有以金屬 完全充填,赴可一 令鱼屬 , J猎由金屬的塑性變形,吸收應力。於穿孔 , '充真。卩充填樹脂時,低彈性的樹脂為佳。因為可 以吸收應力。 匈 【實施方式 7 1358973 [實施例1 ] 1 ·樹脂製封裝基板 圖1,係表示構成樹脂製封裝基板之實施例丨之耐熱 &基板内藏電路@&線板之構成。於該耐熱性基板内藏電路 配線板10内藏有耐熱性基板3〇。耐熱性基板3〇,具備基 材(核心基板)2〇。於基材20設有穿孔導體36,於穿孔導 體36的兩端形成有穿孔連接墊38。又,於核心基板2〇之 兩面形成有導體電路39。於基材20之兩面,配置有由導 通孔導體48、導體電路49及絕緣層4〇與導通孔導體148、 導體電路149及絕緣層14Q所構成之再配線層(增層配線 層)。於耐熱性基板内藏電路配線板1〇之表背形成有防焊 層7°於防焊層70形成有露出導通孔導體148或導體電 路149之。卩分之開口 70a。導通孔導體148或導體電路 149的露出相當於構裝用連接墊。構裝用連接墊 148Ρ上D又有軟焊凸塊78U。經由該軟焊凸塊,連接 1C晶片90之電極92,搭載Ic基片9〇。 另一方面,於耐熱性基板3〇之1〇晶片相反側之面(下 面)係配°又有.層間樹脂絕緣層5 0,其係、形成有導通孔 導體6〇 *導體電路58 ;及層間樹脂絕緣層1 50,其係形成 有導L導租1 60及導體電路1 58。於該層間樹脂絕緣層 150之上層形成有防焊I 70,經由該防焊層70之開口部 7〇a於導通孔導體形成軟焊凸塊78D。 在此構裝用連接塾148P,係形成在導通孔導體148正 上方成由導通孔導體148延伸之導體電路149上(導通孔導 體148正上方以外)。構裝用連接墊148P係以格子狀或柵 格狀,構裝用連接墊148P間的間距可為30〜150微米間距, 〜構裝用連接塾14 8 P間的絕緣性,而f熱性基板3 〇之 可罪度或電子零件之配線層取入印刷配線板,則以50〜1〇〇 微米為佳。構裝部的構裝用連接塾148p,係、將其間距以增 層層擴張’經由核心基板2。上的導體電路(包含閉塞穿: 鲁導體36之導體電路,參照圖1之中心的穿孔導體36上的 導體電路38)與穿孔導體36導通。在此,於穿孔導體% 間的間距’可為較構裝用連接墊148P的間距大之3〇〜2。〇 微米自核'u基板2G之絕緣可靠性,耐熱循環性或耐龜裂 性以75] 50微米為佳。於核心基板2〇的背面上形成增層 曰(背面再配線層)’於其最背面,形成有為與内藏耐熱性 基板30之内藏用配線基板取得電性接點的連接用連接墊 148D。連接用連接塾U8D之間距可為較穿孔導體%之間 =大之5〇〜250微米。連接用連接墊聰,形成於導通孔 導體148正上方或由導通孔導體148延伸之導體電路⑷ 上。於連接用連接塾148D上形成内藏用配線基板之導通孔 丹考,於圖卜亦可不形成表面再配線層,以基材2〇 表面上之穿孔連接墊38或導體電路39作為構裝用連接墊 。此時’亦可將全構裝用連接墊148p作成穿孔導體 上方之穿孔連接塾38,亦可將位於外週的構裝用連接 9 1358973 塾H8P當作連接穿孔導體36之導體電路39之_部分(來 照圖1之兩端與穿孔導體%連接之導體電路39),亦可將 位於中心部之構裝用連接塾148p作為穿孔導體%正上方 的穿孔塾38的一部分。 又,於圖1,亦可不形成背面再配線層,以基材20之 背面上的導體電路39或穿孔墊38作為連接用連接塾 雇。此時,亦可將全連接用連接墊麗作成穿孔導體 36正上方之穿孔連接塾38 ’亦可以核心基板之外週之 連接用連接塾148D當作連接穿孔導體%之導體電路⑼之 -部分(參照圖1之兩端與穿孔導體36冑接之導體電路 39),亦可將位於中心部之連接用連料h8d作為穿孔導 體36正上方的穿孔塾38的-部分。由可將形成於核心基 板20之穿孔導體36之間距擴張之點或提升耐熱性基板 之絕緣性、耐龜裂性、耐熱循環性等之點,耐熱性基板3〇, 由基材20與表面再配線層(表面增層層)構成為佳。 2.耐熱性基板之製作 參照圖2〜圖4說明關於實施们之_熱性基板之製造 步驟。 (1) 準備由矽構成之厚度0·5毫米之基材(核心基 板)2〇(圖 2(A))。 將基材20研磨調整厚度為〇·3毫米(圖2(Β))。 (2) 進行UV雷射照射,穿設貫通基材2 〇之穿孔導體形 成用開口 22(圖2(C))。在此,使用了 υν雷射,亦可代替 10 1358973 此’使用噴砂、RIE形成開口。 (3)以lootrc施以埶氣化虚理# Λ、 2rD^七 …、乳化處理形成絕緣被模24(圖 2⑻)。亦有代替熱氧化處理’進行CVD之情形。 =藉由藏鍍形成N1/Cu的薄膜26(圖;⑻)。 替激鍍使用無電解電鍍。 ⑸將薄膜26作為電鍍導線,以如下電鍍液與條件’
::電解電鍵銅處理’於開口 22内形成電解電鐘銅28作 為導通孔導體36,並且於基材20之矣 ^ 00, %丞材之表面亦形成電解電鍍 銅 28(圖 3(A))。 [電解電鍍液] 硫酸2. 24莫耳/公升 硫酸鋼0 · 2 6莫耳/公升 添加劑19.5毫升/公升(ATOTECH JAPAN公司製, COPPERACID GL) [電解電鍍條件] 電流密度6. 5安培/平方公寸 時間30分
溫度22±2°C (6) 對形成於基材20表面之電解電鍍銅μ,加以CMP 研磨(圖3(B))。 (7) 對於電解電鍍銅28施加圖案化,形成穿孔連接塾 38及導體電路39(圖3(C))。 (8 )於基材2 〇之兩面設置絕緣層(例如,聚亞醯胺或味 1358973 之素公司之ABF)4Ο,以雷射穿設開口 4〇a (圖3 (D))。 (9) 於絕緣層40之表面,藉由濺鍍形成Ni/Cu之薄膜 44,於薄膜之上設置特定圖案之抗電鍍劑42(圖。亦 可代替濺鍍使用無電解電鍍。 (10) 藉由形成電解電鍍銅44形成導通孔導體48與導 胆電路4 9 (圖4 (A))。之後,將抗電鍍劑4 2剝離,將抗電 鍍劑下的薄膜44藉由光钱刻去除(圖4(b))。 再者,藉由形成絕緣層14〇(圖4(c)),設置導通孔導 體U8與導體電路149,形成耐熱性基板30 (圖4(D))。 鲁 以下,參照圖5〜圖7說明耐熱性基板内藏電路配線板 之製造步驟。 (1) 準備安裝耐熱性基板之支持板31(圖5(a)),於支 持板31安裝上述耐熱性基板3〇(圖5(B))。 (2) 於支持板31之下面,黏貼丨片或複數片層間樹脂 絕緣層用樹脂膜(味之素公司製:商品名;ABF一45SH),以 壓力0. 45百萬帕斯卡,溫度8〇它,壓接時間1〇秒的條件鲁 暫時壓接後’進-步,藉由以下方法使用真空層壓袭置黏 貼形成内藏耐熱性基板3〇之層間樹脂絕緣層5〇(圖 5(C))。即,將層間樹脂絕緣層用樹脂膜以真空度、 壓力0. 47百萬帕斯卡,溫度85。〇,壓接時間6〇秒的條件 本壓接於基板上,之後,以17CTC熱硬化40分鐘。 (3) 其次,以波長ι〇·4微米的c〇2氣體雷射光束徑 4· 0毫米,高帽模式,脈衝寬3〜3〇微秒,掩模的貫通孔徑, 12 1358973 1· 0〜5· 0毫米,1〜3發的條件於層間樹脂絕緣層5〇穿設導 通孔用開口 50a(圖5(D))。之後,於包含6〇公克/公升的 過錳酸之80°C之溶液浸潰1 〇分鐘,藉由去除存在於層間 樹脂絕緣層之表面之粒子,使包含填孔用開口 5〇a之内壁 之層間樹脂絕緣層50之表面粗化(無圖示)。由開口 5〇a露 出之部分成為連接用連接塾148D。 (4) 其次,將結束上述處理之基板,浸潰於中和溶液 φ (SHIPLEY公司製)再水洗之。再者,於粗面化處理(粗化深 度3微米)之該基板表面,藉由付予鈀催化劑,使催化劑核 附著於層間樹脂絕緣層之表面及填孔用開口之内壁面。 即,將上述基板浸潰於包含氣化鈀(pbC12)與氯化亞錫 (SnCh)之催化劑液中,使鈀金屬析出付予催化劑。 (5) 其-人,於上村工業公司製之無電解電鍍銅水溶液 (THRU-CUP PEA)中,浸潰付與催化劑之基板,於粗面全體 形成厚度0.3〜3.0微米之無電解電鍍銅膜,得到在包含導 1通孔用開口 5〇a之内壁之層間樹脂絕緣層50之表面形成有 無電解電鍍銅膜52之基板(圖6(A))。 [無電解電鍍條件] 以34度之液溫45分鐘 • (6)於形成有無電解電鍍銅膜52之基板黏貼市售的感 光性乾式膜’載製掩膜,卩11〇毫焦爾/平方公分曝光,以 〇. 8%碳酸鈉水溶液顯影處理,設置厚度25微米之抗電 53(圖 6(B))。 1358973 (7)接著’將基板3 0以5 0 °C的水清洗脫脂,以2 5 °c的 水水洗後,進一步以硫酸清洗,以如下條件施以電解電鍍 形成電解電鍍膜54(圖6(C))。 [電解電鍍液]
硫酸2. 24莫耳/公升 硫酸銅〇. 2 6莫耳/公升 添加劑19.5毫升/公升 平滑劑50毫克/公升 光澤劑50毫克/公升 [電解電鍍條件] 電流密度1安培/平方公寸 時間70分 /皿及 U 土 2。。 (8)再者’將抗電鑛劑53以5%_剝離去除,將言 产::下的無電解電鍍膜以硫酸與過氧化氫之混合液★
解去除’形成獨立的導體電❺58及導通孔· 60(圖 6(D))。桩基 ^ ^ _ ' 面… 於導體電路58及導通孔導體 面形成粗化面(無圖示)。 )藉由反覆上述(2)〜(8)之步驟,進一 + 層之導丨·成具琴 L導體160之層間絕緣層15 除支持板lb0(圖7(A)),藉a 31仔到多層配線板(圖7(b))。 (10)其次,於多層配線基板之 組合物7〇以2。微米之厚”你 將市售之防e 十厗度上佈,以70°C20分鐘,以 14 1358973 C 3 0分鐘的條件進行乾燥處理,使描繪有防焊劑開口部之 圖案之厚度5毫米之光罩密著於防焊劑層7〇以1〇〇〇毫焦 爾/平方公分的紫外線曝光,以DMTG溶液顯影處理,形成 直徑200微米之直徑開口 7〇a(圖7(c))。 然後,進一步’以8(rc 1小時,以l〇(rc 1小時,以 1 20 c 1小時,以1 5〇t 3小時之條件分別進行加熱處理使 防焊劑層硬化,形成具有開口 7〇a,厚度為15〜25微米之 防垾圖案層70。由開口 7〇a露出之導通孔導體148或導體 電路149之部分成為構裝用連接墊148p。 (11)其次,將形成有防焊劑層7〇之基板,浸潰於包含 氣化鎳(2· 3x10 1莫耳/公升)、次亞磷酸納(2 8χ1(ρ1莫耳/ 公升)、檸檬酸鈉(1.6ΧΗΓ1莫耳/公升)之ρΗ = 4·5之無電解 鎳電鍍液20分鐘,於開口部70a之構裝用連接墊14卯形 成厚度5微米之電鍍錄層(無圖示)。再者,將該基板以㈣ °c的條件浸潰於包含氰化金鉀(7.6χ1(Γ3莫耳/公升)、氯化 銨(1· 9Χ10 — 1莫耳/公升)、檸檬酸鈉(1· 2χ1(Γΐ莫耳/公升) 次亞磷酸鈉(1·7χ1(Τ莫耳/公升)之無電解金電鍍液\ $八' 鐘,於電鍍錄層上,形成厚度。.03微米之電鑛金層(·無: 示)。於鎳-金層以外,亦可形成錫、責金屬 、 ’ ! V金 '銀、|巴、 白金等)的單層。 (m此後,將載置基板以片之面之防焊劍層 開口 70a,印刷含有錫-鉛之軟焊糊料,進—步於另一之 面的防焊層70之開口 70a印刷含有錫—錦之遷的 抖, 15 1358973 200〜24()t迴焊形成軟烊凸塊(軟焊體),得到具有軟焊凸塊 78U、78D之耐熱性基板内藏電路配線板(圖7(d))。 3·半導體裝置之製作 說明1C晶片對圖7(D)所示之耐熱性基板内藏電路酉己 線板10(封裝基板)10之安裴。 f先,將1C晶片90,對位搭載於耐熱性基板内藏電 路配線板10。之後,進行迴焊構裝之(參照圖丨)。然後电 於耐熱性基板内藏電路配線板1〇與IC晶片9〇間充填封裝 劑(底部充填劑:無圖示),以8〇度15分鐘,接著以ΐ5〇 φ 度2小時使之硬化。 [實施例2 ] 圖8係表示實施例2之耐熱性基板内藏電路配線板之 - 構成。於該耐熱性基板内藏電路配線板1〇内藏有耐熱性基 . 板30〇耐熱性基板30具有基材2〇,於基材2〇設有穿孔導 體36,於穿孔導體36之兩端形成有穿孔連接墊38。於耐 熱性基板30之1C晶片側之面(上面),配置有導通孔導體籲 48及絕緣層40所構成之增層配線層。於背面並沒有再配 線層。於導通孔導體48之防焊劑層70之開口 7〇a,設有 軟焊凸塊78U。經由該軟焊凸塊78[J,連接Ic晶片g〇A、 1C晶片90B之電極92’搭載ic晶片(MPU)90A、1C晶片(記 憶體)90B。 耐熱性基板内藏電路配線板1〇之厚度為〇卜丨.〇毫 米。核心基板2〇之厚度為〇.〇5〜〇·5毫米。 16 1358973
八基材(核心基板)2。之熱膨脹係數為3。]。卿藉由 在基材2〇,可使耐熱性基板内藏電路配線板Π)之執膨 脹係數小。使IC晶片90A、,與樹脂製之财熱性基板内 藏電路配線板10間的熱膨脹係數之應力小。結果,可使施 加於1C晶片與樹脂製封裝間的軟焊凸塊之應力小。又,不 會將應力傳到IC晶片的配線層之樹脂。因此,不會在IC 晶片的配線層之樹脂發生龜裂、斷線。 [實施例3]
之耐熱性基板内藏電路配 參照圖9說明關於實施例 線板之構成。 於參照圖1上述之實施例i,係於核心基板之兩面設 再配線層。對此,於實施例3,並沒有在核心基板上設再 配線。以實施例3的構成’亦藉由核心基板2Q可將耐熱性 基板内藏電路配線板薄地構成’並且使搭載之ic曰片 (ChiPSet)90A、1C晶片(CPLO90B與耐熱性基板内藏電路 配線板30之熱膨脹係數接近’可防止因熱收縮之斷線。 [實施例4] 參照圖10說明關於實施例4之耐熱性基板内藏電路配 線板之構成。 於參照圖1上述之實施例1 ’係於核心基板20之兩面 設再配線層。對此’於實施例4 ’係於核心基板2 〇之J c 晶片(記憶體)90A ’ 1C晶片(邏輯)90B之反對側之表面(下 面)設有增層配線層。於實施例4的構成,亦可得與實施例 17 1358973 1大致同樣的效果。 [實施例5] 參照圖11說明關於實施例5之耐熱性基板内藏電路配 線板之構成。 於參照圖1上述之實施例 設再配線層。對此,於實施例 晶片側之表面(上面)及IC晶 1 ’係於核心基板20之兩面 5 ’係於核心基板2 0之IC 片之反對側之表面(下面)之 兩面設有增層配線層。於實施例5的構成,雖並未在耐熱 基板再配線,亦可使耐熱性基板内藏電路配線板之熱膨服 係數小。 [實施例6] 參照圖12說明關於實施例6之耐熱性基板内藏電路配 線板之構成。 於參照圖1上述之實施例1,係耐熱性基板3〇收容在 耐熱性基板内藏電路配線板1 0之層間絕緣層50内。對此, 於實施例6 ’係將耐熱性基板30配置於表面,並且使耐熱 性基板内藏電路配線板表面之層間樹脂絕緣層5 〇與耐熱 性基板3 0之表面的IC晶片側之表面沒有段差地使之大致 平坦。又,在上面並沒有設置防焊劑層。 [實施例7] 參照圖13說明關於實施例7之耐熱性基板内藏電路配 線板之構成。 於參照圖1上述之實施例1,係耐熱性基板30收容在 1358973 耐熱性基板内藏電路配線板1 〇之層間絕緣層5 0内。相對 於此’於貫施例7,耐熱性基板30之表面由耐熱性基板内 藏電路配線板之表面的層間樹脂絕緣層50突出。又,在上 面並沒有設置防焊劑層。 [實施例8 ] 參照圖14說明關於實施例8之耐熱性基板内藏電路配 線板之構成。
於參照圖1上述之實施例1 ’係於耐熱性基板3 〇之下 面側設耐熱性基板内藏電路配線板之增層層5〇、15〇。相 對於此,於實施例8,於耐熱性基板30之1C晶片側之面 上亦形成耐熱性基板内藏電路配線板之增層配線層丨5〇。 [實施例9 ] 參照圖15說明關於實施例9之耐熱性基板内藏電路配 線板之構成。
於參照圖1上述之實施例1,係於耐熱性基板3〇之基 材20之表面形成穿孔連接墊38或導體電路39。相對於此, 於實施例9,僅於耐熱性基板30之基材2〇之1(:晶片側之 面設穿孔連接墊38或導體電路39。 [實施例1 0 ] 參照圖16說明關於實施例1G之耐熱性基板内藏電路 配線板之構成。 於參照圖1上述之實施例1 ’係於坊'、 么核心基板2 0之兩面 形成穿孔連接墊38或導體電路39。如i , 19 1358973 10 ’僅於耐熱性基板3〇之基材2〇之ic 設穿孔連接墊38或導體電路39。 [實施例11 ] 晶片之相反側之面 參照圖1 7說明關於實施例 配線板之構成。 11之耐熱性基板内藏電路 於參照圖1上述之實施例卜係於核心基板20之兩面 形成穿孔連接塾38或導體電路39。相對於此,於實施例 11 ’於基材20上並沒有設導體電路。 於實施例2+6〜U,構裝用連接塾蕭之間距盘穿 孔導體36之間距與連接料接塾U8D之間距成相同1 並不限於此形態。如參照圖1上述之實施例i,依照構; 用連接墊148P之間距、穿孔導體 再衷 b之間距、連接用連接 墊148D之間距之順序變寬為佳。 钱 u,雖搭載了複數電子零件,惟二:補2〜實施例令干准亦可例如,單邊以M 另-邊以記憶體’於核心基板2Q上的表面㈣線層( :層:)設置兩者之信號來往之配線。作為其他的電;零 件,有晶片組、邏輯、繪圖等。 电于零
【圖式簡單說明】 圖1係關於本發明之實施例 配線板之剖面圖。 之耐熱性基板内藏電路 ® 2⑴至¢2⑻係關於實施例 步驟圖。 之耐熱性基板之製造 20 1358973 關於實施例 關於實施例 圖3(A)至圖3(E)係 步驟圖。 圖4(A)至圖4(D)係 步驟圖。 之耐熱性基板之製造 1之耐熱性基板之製造 圖5(A)至圖5(D)係關於實施例i之耐熱性基板内藏電 路配線板之製造步驟圖。 圖6(A)至圖6(D)係關於實施例i之耐熱性基板内藏電 路配線板之製造步驟圖。 圖7 (A)至圖7 (D)係關於實施例1之耐熱性基板内藏電 路配線板之製造步驟圖。 圖8係關於本發明之實施例2之耐熱性基板内藏電路 配線板之剖面圖。 圖9係關於本發明之實施例3之耐熱性基板内藏電路 配線板之剖面圖。 圖1 0係關於本發明之實施例4之耐熱性基板内藏電路 配線板之剖面圖。 圖11係關於本發明之實施例5之耐熱性基板内藏電路 配線板之剖面圖。 圖12係關於本發明之實施例6之耐熱性基板内藏電路 配線板之剖面圖。 圖13係關於本發明之實施例7之耐熱性基板内藏電路 配線板之剖面圖。 圖14係關於本發明之實施例8之耐熱性基板内藏電路 21 1358973 配線板之剖面圖。 圖1 5係關於本發明之實施例9之耐熱性基板内藏電路 配線板之剖面圖。 圖1 6係關於本發明之實施例丨〇之耐熱性基板内藏電 路配線板之剖面圖。 圖17係關於本發明之實施例n之耐熱性基板内藏電 路配線板之剖面圖。
主要元件符號說明】 30〜耐熱性基板; 38〜連接墊; 48〜導通孔導體; 60〜導通孔導體; 78D〜軟焊凸塊; 160〜導通孔導體 2 0 ~基材; 36〜穿孔導體; 40〜絕緣層; 50〜層間絕緣層; 78U〜軟焊凸塊; 150〜層間樹脂絕緣層;
1 〇〜耐熱性基板内藏電路配線板 22
Claims (1)
10〇年10月4日修正替換頁 1358973第__ 七、申請專利範圍: 1. 一種耐熱性基板内藏電路配線板,包含耐熱性基板 與内藏該耐熱性基板之内藏用配線基板者, 其特徵在於: 上述耐熱性基板包含: 核心基板; 牙孔導體,導通該核心基板之表面與背面者,上述穿 孔導體間的間距為30〜200微米; 增層配線層,形成於核心基板上,層間樹脂絕緣層與 導體層父互積層,各導體層間以導通孔導體連接;及 構裝用連接墊,於形成在核心基板之表面之增層配線 層之表面’與電子零件的電極連接; 上述構裝用連接墊的間距,較上述核心基板之穿孔導 體之間距狹窄。 2·如申請專利範圍第1項所述的耐熱性基板内藏電路 配線板,其中上述耐熱性基板,進一步具有: 連接用連接塾,於形成在核心基板之背面之增層配線 層之表面,與内藏用配線基板電性連接者; 上述連接用連接墊的間距,較上述核心基板之穿孔導 體之間距寬。 3·如申請專利範圍第1項所述的耐熱性基板内藏電路 配線板’ I中上述增層配線層包含··形成於核心、基板之表 面上之表面増層層;及形成於上述核心基板之背面上之背 面增層層; 23 1358973 第099139185號 100年10月4曰修正替換頁 其中上述構裝用連接墊與形成在上述表面增層層之表 面之電子零件的電極連接; 上述耐熱性基板進一步具有: 連接用連接墊’電性連接形成在上述背面增層層之表 面之電子零件的電極與内藏用配線基板者; 上述構裝用連接墊間距與上述穿孔導體間距與上述連 接用連接墊間距,以該構裝用連接墊間距、該穿孔導體間 距、該連接墊間距之順序變大。 4 ·如申睛專利範圍第1項所述的耐熱性基板内藏電路 配線板,其中於上述增層配線層上設防焊層。 5. 如申請專利範圍第丨至4項中任一項所述的耐熱性 基板内藏電路配線板,其中上述耐熱性基板與上述内藏用 配線基板之表面大致在同一平面。 6. 如申印專利範圍第1項所述的耐熱性基板内藏電路 配線板,其中上述穿孔導體是由充填貫通上述核心基板的 貫通孔的内部之電鍍所形成。 ?·如申叫專利範圍第1項所述的耐熱性基板内藏電路 配線板,其中在構成上述配線基板之導通孔導體中位於最 外侧的導通孔導體上’形成有用以與其他基板連接的連接 構件。 8·如申叫專利範圍第丨項所述的耐熱性基板内藏電路 配線板’ *中上述核心基板的熱膨脹係數是低於構成上 述配線基板之層間樹脂絕緣層的熱膨脹係數。 24
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JP4824397B2 (ja) * | 2005-12-27 | 2011-11-30 | イビデン株式会社 | 多層プリント配線板 |
US7462784B2 (en) * | 2006-05-02 | 2008-12-09 | Ibiden Co., Ltd. | Heat resistant substrate incorporated circuit wiring board |
AT9551U1 (de) * | 2006-05-16 | 2007-11-15 | Austria Tech & System Tech | Verfahren zum festlegen eines elektronischen bauteils auf einer leiterplatte sowie system bestehend aus einer leiterplatte und wenigstens einem elektronischen bauteil |
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KR20080087085A (ko) | 2008-09-30 |
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TW200810630A (en) | 2008-02-16 |
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US8507806B2 (en) | 2013-08-13 |
CN101395978A (zh) | 2009-03-25 |
CN101395978B (zh) | 2013-02-06 |
EP2015623B1 (en) | 2012-03-28 |
US20090255716A1 (en) | 2009-10-15 |
EP2015623A4 (en) | 2009-12-16 |
EP2015623A1 (en) | 2009-01-14 |
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