KR940001427A - 박막 반도체 장치와 그 제작방법 - Google Patents
박막 반도체 장치와 그 제작방법 Download PDFInfo
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- KR940001427A KR940001427A KR1019930010407A KR930010407A KR940001427A KR 940001427 A KR940001427 A KR 940001427A KR 1019930010407 A KR1019930010407 A KR 1019930010407A KR 930010407 A KR930010407 A KR 930010407A KR 940001427 A KR940001427 A KR 940001427A
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- Prior art keywords
- film
- semiconductor
- gate electrode
- forming
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- 239000010409 thin film Substances 0.000 title claims abstract description 9
- 239000004065 semiconductor Substances 0.000 title claims abstract 20
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract 6
- 238000009413 insulation Methods 0.000 claims abstract 2
- 239000010408 film Substances 0.000 claims 20
- 238000005530 etching Methods 0.000 claims 8
- 239000000463 material Substances 0.000 claims 5
- 239000012535 impurity Substances 0.000 claims 4
- 230000005669 field effect Effects 0.000 claims 2
- 239000002184 metal Substances 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 230000003068 static effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Dram (AREA)
Abstract
본 발명의 목적은 리크전류가 적은 박막형 절연게이트형 반도체장치를 제공하는 것이다. 박막형 절연게이트형 반도체장치의 황성층과 기판과의 사이에 이면게이트 전극을 설치하고, 그 이면게이트 전극을 일정한 전위로 유지하거나, 흑은 박막형 절연게이트형 반도체장치의 소스 혹은 드레인의 어느 하나 한쪽의 전위와 동일하게 하여 사용되도록 구성하는 것을 특징으로 한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명 박막 트랜지스터(TFT)의 구성 개념도,
제3도는 본 발명 TFT의 동작도.
Claims (6)
- 박막형의 활성층을 갖는 전계효과형 장치에 있어서, 활성층상에 게이트 전극이 설치되고, 또한, 활성층과 기판의 사이에는 정적인 전위에 접속된 이면게이트 전극이 설치된 것을 특징으로 하는 박막형 반도체장치.
- 박막형의 활성층을 갖는 전계효과형 장치에 있어서. 활성층상에 게이트 전극이 설치되고. 또한. 활성층과 기판의 사이에는 이면게이트 전극이 설치되며, 그 이면게이트 전극은, 상기 장치의 소스 혹은 드레인의 어느 하나 한쪽에만 전기적으로 접속된 것을 특징으로 하는 박막형 반도체장치.
- 절연성의 표면을 갖는 기상에 이면게이트 전극이 설치되고, 그 이면게이트 전극을 덮고, N형과 P형의 불순물영역을 갖는 반도체층이 설치되며, 더욱이 상기 반도체층상에는. 2개의 게이트 전극이 설치되어 상기 게이트 전극의 한쪽은, 이면게이트 전극상에는 없는 것을 특징으로 하는 박막형 반도체장치.
- 제3항에 있어서, p채널형 트랜지스터의 게이트 전극은 상기 이면전극상에는 없는 것을 특징으로 하는 박막형 반도체장치.
- 절연성의 표면을 갖는 기판상에, 제1의 도전형을 갖는 제1의 반도체피막을 선택적으로 형성하는 공정과, 상기 제1의 반도체피막상에 제1의 절연피막을 형성하는 공정과, 상기 제1의 절연피막을 덮고, 제2의 반도체피막을 형성하는 공정과, 상기 제2의 반도체피막상에 제2의 절연피막을 형성하는 공정과, 상기 제2의 절연피막상에 적어도 2개의 게이트 전극부를 형성하는 공정과. 제1의 도전형을 나타내기 위한, 불순물을 제2의 반도체피막에 상기 게이트 전극부에 대하여 자기 정합적으로 확산시키는 공정과, 상기 공정후, 아래에 제1의 반도체 피막이없는 부분에 형성된 제2의 반도체영역에 상기 게이트 전극부의 적어도 하나의 게이트 전극부에 대하여 자기정합적으로, 제1의 도전형과 역의 도전형을 나타내기 위한, 불순물을 확산시키는 공정을 갖는 것을 특징으로 하는 박막형 반도체장치의 제작방법.
- 절연성의 표면을 갖는 기판상에, 반도체 혹은 금속으로 이루어진 제1의 도전성 피막을 형성하는 공정과, 상기 제1의 도전성 피막상에 제1의 절연피막을 형성하는 공정과. 상기 제1의 절연피막상에 에칭 마스크재를 형성하는 공정과, 상기 에칭 마스크재에 구멍을 형성하는 공정과 상기 에칭 마스크재를 마스크로 하여 등방성 에칭을 행하고, 제2의 절연피막에 콘택트흘을 형성하는 공정과, 상기 에칭 마스크재를 마스크로 하여 이방성 에칭을 행하며, 제1의 반도체피막에 구멍을 형성하는 공정과, 상기 에칭 마스크재를 마스크로 하여 등방성 혹은 이방성 에칭을 행하고, 제1의 절연피막에 구멍을 형성하는 공정과, 금속 추은 반도체로 이루어진 제2의 도전성 피막을 선택적으로 형성하고, 제1의 도전성 피막 및 제1의 반도체 피막에 접속되는 전극을 형성하는 것을 특징으로 하는 박막형 반도체장치의 제작방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17488392A JP3254007B2 (ja) | 1992-06-09 | 1992-06-09 | 薄膜状半導体装置およびその作製方法 |
JP92-174883 | 1992-06-09 | ||
JP92-150316 | 1992-06-10 | ||
JP92-150334 | 1992-06-10 | ||
JP92-150315 | 1992-06-10 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940001427A true KR940001427A (ko) | 1994-01-11 |
KR960015528B1 KR960015528B1 (ko) | 1996-11-15 |
Family
ID=15986336
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930010407A KR960015528B1 (ko) | 1992-06-09 | 1993-06-09 | 박막 반도체 장치 및 그 제작 방법 |
Country Status (5)
Country | Link |
---|---|
US (4) | US5917221A (ko) |
JP (1) | JP3254007B2 (ko) |
KR (1) | KR960015528B1 (ko) |
CN (5) | CN1052576C (ko) |
TW (1) | TW219410B (ko) |
Families Citing this family (99)
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1992
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- 1993-06-02 TW TW082104398A patent/TW219410B/zh not_active IP Right Cessation
- 1993-06-09 CN CN93108414A patent/CN1052576C/zh not_active Expired - Lifetime
- 1993-06-09 KR KR1019930010407A patent/KR960015528B1/ko not_active IP Right Cessation
- 1993-06-09 CN CNB2005100740045A patent/CN100557491C/zh not_active Expired - Lifetime
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1994
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- 1999-09-29 CN CNB991205995A patent/CN1192432C/zh not_active Expired - Lifetime
- 1999-09-29 CN CNB991205960A patent/CN1155091C/zh not_active Expired - Lifetime
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Also Published As
Publication number | Publication date |
---|---|
JP3254007B2 (ja) | 2002-02-04 |
CN1155091C (zh) | 2004-06-23 |
CN1255750A (zh) | 2000-06-07 |
US20030122194A1 (en) | 2003-07-03 |
US20020027249A1 (en) | 2002-03-07 |
CN1081789A (zh) | 1994-02-09 |
US6815772B2 (en) | 2004-11-09 |
CN1254953A (zh) | 2000-05-31 |
CN100557491C (zh) | 2009-11-04 |
US6528852B2 (en) | 2003-03-04 |
US5917221A (en) | 1999-06-29 |
CN1727973A (zh) | 2006-02-01 |
CN1052576C (zh) | 2000-05-17 |
TW219410B (ko) | 1994-01-21 |
US6340830B1 (en) | 2002-01-22 |
KR960015528B1 (ko) | 1996-11-15 |
CN1211860C (zh) | 2005-07-20 |
JPH05343689A (ja) | 1993-12-24 |
CN1192432C (zh) | 2005-03-09 |
CN1313640A (zh) | 2001-09-19 |
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