KR950034767A - Mis형 반도체장치 - Google Patents

Mis형 반도체장치 Download PDF

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KR950034767A
KR950034767A KR1019950011199A KR19950011199A KR950034767A KR 950034767 A KR950034767 A KR 950034767A KR 1019950011199 A KR1019950011199 A KR 1019950011199A KR 19950011199 A KR19950011199 A KR 19950011199A KR 950034767 A KR950034767 A KR 950034767A
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impurity concentration
concentration layer
conductivity type
type
layer
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마사후미 미야모또
다쯔야 이시이
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가나이 쯔도무
가부시끼가이샤 히다찌세이사꾸쇼
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Publication of KR950034767A publication Critical patent/KR950034767A/ko

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Abstract

MIS형 반도체장치에 관한 것으로써, 저스레쉬홀드값화와 캐리어이동도의 향상을 도모하기 위해, 제1도전형의 반도체기판내에 소오스/드레인영역으로 되는 1쌍의 제2도전형의 제1의 불순물농도층, 이 제2도전형의 제1의 불순물농도층간의 반도체기판상에 절연물을 거쳐서 형성되는 게이트전극을 갖는 MIS형 반도체장치에 있어서, 소오스/드레인영역간의 채널영역표면에서 깊이방향으로 제1도전형의 제2의 불순물농도층/제2도전형의 제3의 불순물농도층/반도체기단 보다 불순물농도가 높은 제1도전형의 제4의 불순물농도층으로 이루어지는 3층구조를 갖고, 이 제3의 불순물농도층이 이 제2의 불순물농도층과 이 제4의 불순물농도층에 의해 각각 형성되는 pn접합의 확산전위에 의해 공핍화되는 두께로 설정되어 이루어진다.
이와 같은 구조를 채용하는 것에 의해, 미세화해도 서브스레쉬홀드계수를 충분히 저감해서 저스레쉬홀드값화를 가능하게 함과 동시에 게이트절연막계면에서의 전계강도를 저감해서 캐리어이동도의 향상이 도모된다.

Description

MIS형 반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 관한 MIS형 반도체장치의 제1의 실시예를 도시한 단면구조도.

Claims (8)

  1. 제1도전형의 반도체기판내에 소오스/드레인영역으로 되는 1쌍의 제2도전형의 제1의 불순물농도층 및 상기 제2도전형의 제1의 불순물농도층간의 반도체기판상에 게이트절연물을 거쳐서 형성되는 게이트전극을 갖는 MIS형 반도체장치에 있어서, 소오스/드레인영역간의 채널영역표면에 형성된 제1도전형의 제2의 불순물농도층, 상기 제1도전형의 제2의 불순물농도층의 하부에 접해서 형성된 제2도전형의 제3의 불순물농도층 및 상기 제2도전형의 제3의 불순물농도층의 하부에 접해서 형성되어 반도체기판보다 불순물 농도가 높은 제1도전형의 제4의 불순물농도층을 갖고, 상기 제2도전형의 제3의 불순물농도층이 상기 제1도전형의 제2의 불순물농도층과 상기 제1도전형의 제4불순물농도층에 의해 각각 형성되는 pn접합이 확산전위에 의해 공핍화되는 두께로 설정되어 있는 것을 특징으로 하는 MIS형 반도체장치.
  2. 제1도전형의 반도체기판내에 소오스/드레인영역으로 되는 1쌍의 제2도전형의 제1의 불순물농도층 및 상기 제2도전형의 제1의 불순물농도층간의 반도체기판상에 게이트절연물을 거쳐서 형성되는 게이트전극을 갖는 MIS형 반도체에 있어서, 상기 소오스/드레인영역간의 채널영역표면에 형성된 제2도전형의 제5의 불순물농도층, 상기 제2도전형이 제5이 불순물농도층의 하부에 접해서 형성된 제1도전형의 제2의 불순물농도층, 상기 제1도전형의 제2의 불순물농도층의 하부에 접해서 형성된 제2도전형이 제3의 불순물농도층 및 상기 제2도전형의 제3의 불순물농도층의 하부에 접해서 형성되어 반도체기판보다 불순물농도가 높은 제1도전형의 제4의 불순물 농도층을 갖고, 상기 제2도전형의 제3의 불순물농도층이 상기 제1도전형의 제2의 불순물농도층과 상기 제1도전형이 제4의 불순물농도층에 의해 각각 형성되는 pn접합의 확산전위에 의해 공핍화되는 두께로 설정되어 있는 것을 특징으로 하는 MIS형 반도체장치.
  3. 제1항에 있어서, 상기 게이트 전압이 인가되어 형성되는 반전층채널을 게이트절연물과 접하는 바로 아래의 제1돈전혀의 제2의 불순물농도층에 형성되는 표면채널인 것을 특징으로 하는 MIS형 반도체장치.
  4. 제1항에 있어서, 상기 제2도전형의 제3의 불순물농도층에 채널영역의 양끝의 적어도 한쪽에서 소정거리에 반도체기판보다 불순물농도가 좁은 제1도전형의 제6의 불순물농도층을 마련하는 것을 특징으로 하는 MIS형 반도체장치.
  5. 제1항에 있어서, 상기 제1도전형의 제4이 불순물농도층은 소오스/드레인영역 하부에 위치하지 않고 채널영역 하부에 위치하도록 마련하는 것을 특징으로 하는 MIS형 반도체장치.
  6. 제1항에 있어서, 상기 드레인영역으로 되는 제2도전형의 제1의 불순물노도층에 대해서 상기 제2도전형의 제1의 불순물농도층보다 불순물농도가 낮은 제2도전형이 고내압화층을 부가하는 것을 특징으로 하는 MIS형 반도체장치.
  7. 반도체기판에 형성한 제1도전형의 웰영역을 제1도전형의 상기 반도체기판으로써 청구항1기재의 MIS형 반도체장치를 형성하고, 제2도전형의 웰영역에는 상기 제1도전형의 웰영역에 형성한 MIS형 반도체장치의 각 불순물농도층의 제1 및 제2도전형을 각각 바꿔서 형성한 것을 특징으로 하는 상보형 반도체집적회로.
  8. 제2도전형의 반도체기판과 상기 제2도전형의 반도체기판상에 형성한 제2도전형의 에피택셜층으로 이루어지는 드레인영역 및 상기 에피택셜층상의 게이트절연막을 통과한 게이트전극에 대해서 자기정합적으로 형성된 소오스영역으로 되는 제2도전형의 제1의 불순물농도층 및 채널영역으로 되는 제1도전형의 제2의 불순물농도층을 갖는 MIS형 반도체장치에 있어서, 상기 채널영역표면에서 소정거리의 깊이에 형성되고, 또한 상기 제1도전형의 제2의 불순물농도층에 의해 형성되는 pn접합의 확산전위에 의해 공핍화되는 두께로 설정된 제2도전형의 제3의 불순물농도층을 마련한 것을 특징으로 하는 MIS형 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950011199A 1994-05-17 1995-05-09 Mis형 반도체장치 KR950034767A (ko)

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