KR960019766A - 에스오아이(soi) 기판상의 모스페트(mosfet) - Google Patents

에스오아이(soi) 기판상의 모스페트(mosfet) Download PDF

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KR960019766A
KR960019766A KR1019950041819A KR19950041819A KR960019766A KR 960019766 A KR960019766 A KR 960019766A KR 1019950041819 A KR1019950041819 A KR 1019950041819A KR 19950041819 A KR19950041819 A KR 19950041819A KR 960019766 A KR960019766 A KR 960019766A
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South Korea
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mosfet
channel
soi substrate
gate electrode
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KR1019950041819A
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KR100382394B1 (ko
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마르틴 케르버
라인하르트 만코프
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알베르트 발도르프·롤프 옴케
지멘스 악티엔게젤샤프트
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
    • H01L29/41783—Raised source or drain electrodes self aligned with the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

예컨대, 메사(9)로서 SOI기판의 바디 실리콘층 내의 MOSFET에서는 소오스 영역(2), 채널영역(1) 및 드레인 영역(3)이 존재하고, 게이트 전극(4)의 일부가 상기 채널영역(1)상에 스트립(5)으로 배치되며, 채널영역(1)의 전기 접속을 위해 그것에 전기적으로 도통되도록 접속되며 바람직하게는 측면에 배치된 많이 도핑된 채널 접속영역(8) 및 그 위에 제공된 콘택(13)이 배치된다.

Description

에스오아이(SOI) 기판상의 모스페트(MOSFET)
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 MOSFET의 평면도.

Claims (4)

  1. 절연체층상에 바디 실리콘층을 가진 SOI기판상의 MOSFET에 있어서, 도핑된 소오스 영역(2), 도핑된 드레인 영역(3) 및 그 사이에 반대 도전 형으로 도핑된 채널 영역이 바디 실리콘층에 형성되고, 상기 채널 영역(1) 위로 뻗은 직선의 스트립(5) 및 게이트 접속영역(6)으로 이루어진 게이트 전극(4)이 배치되며, 상기 스트립(5)은 유전체층(7)에 의해 상기 채널영역(1)으로부터 전기적으로 절연되고, 채널영역(1)과 전기적으로 도통되도록 연결되며 상기 소오스 영역(2) 또는 상기 드레인 영역(3)에 직접 인접하지 않는 많이 도핑된 채널 접속 영역(2)이 배치되며, 상기 소오스 영역(2), 상기 드레인 영역(3), 상기 게이트 접속영역(6) 및 상기 채널 접속 영역(8)에 각각 하나의 콘택(10,11,12,13)이 제공되는 것을 특징으로 하는 SOI 기판상의 MOSFET.
  2. 제1항에 있어서, 게이트 전극(4)이 폴리실리콘인 것을 특징으로 하는 SOI 기판상의 MOSFET.
  3. 제1항 또는 제2항에 있어서, 스트립(5)이 게이트 접속영역(5)과의 전기 접속을 위해 필요한 부분을 제외하고 채널영역(1) 위에만 배치되는 것을 특징으로 하는 SOI 기판상의 MOSFET.
  4. SOI 기판의 바디 실리콘층에 MOSFET를 위해 제공된 영역이 빙둘러 전기적으로 절연되고, 채널영역(1)을 위한 기본 도핑 및 그 표면에 얇은 유전체층(7)이 제공되는 제1단계, 게이트 전극(4)을 위한 층이 제공되어 구조화되는 제2단계, 서로 인접한 영역을 차지하지 않는 개구를 가진 마스크를 사용해서, 소오스 영역(2), 드레인 영역(3) 및 게이트 전극(4)에 대한 그리고 채널 접속 영역(8)에 대한 도핑재료가 주입되는 제3단계, 상기 도핑재료가 활성화되고 콘택이 제조되는 제4단계를 포함하는 것을 특징으로 하는 제1항 내지 3항 중 어느 한 항에 따른 MOSFET의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950041819A 1994-11-24 1995-11-17 Soi기판상의mosfet KR100382394B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEP4441901.5 1994-11-24
DE4441901A DE4441901C2 (de) 1994-11-24 1994-11-24 MOSFET auf SOI-Substrat und Verfahren zu dessen Herstellung

Publications (2)

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KR960019766A true KR960019766A (ko) 1996-06-17
KR100382394B1 KR100382394B1 (ko) 2003-07-18

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US (1) US5623155A (ko)
EP (1) EP0716453B1 (ko)
JP (1) JPH08213638A (ko)
KR (1) KR100382394B1 (ko)
DE (2) DE4441901C2 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100444095B1 (ko) * 2000-10-18 2004-08-11 인터내셔널 비지네스 머신즈 코포레이션 전계 효과 트랜지스터 형성 방법 및 2중 게이트 전계 효과 트랜지스터 형성 방법

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JP4032443B2 (ja) * 1996-10-09 2008-01-16 セイコーエプソン株式会社 薄膜トランジスタ、回路、アクティブマトリクス基板、液晶表示装置
JP4278202B2 (ja) 1998-03-27 2009-06-10 株式会社ルネサステクノロジ 半導体装置の設計方法、半導体装置及び記録媒体
GB2347485A (en) * 1999-03-05 2000-09-06 Breed Automotive Tech Pretensioner
US6521959B2 (en) 1999-10-25 2003-02-18 Samsung Electronics Co., Ltd. SOI semiconductor integrated circuit for eliminating floating body effects in SOI MOSFETs and method of fabricating the same
KR100343288B1 (ko) * 1999-10-25 2002-07-15 윤종용 에스오아이 모스 트랜지스터의 플로팅 바디 효과를제거하기 위한 에스오아이 반도체 집적회로 및 그 제조방법
US6368903B1 (en) 2000-03-17 2002-04-09 International Business Machines Corporation SOI low capacitance body contact
US6563131B1 (en) 2000-06-02 2003-05-13 International Business Machines Corporation Method and structure of a dual/wrap-around gate field effect transistor
KR100393218B1 (ko) * 2001-03-12 2003-07-31 삼성전자주식회사 절연막 위의 실리콘 구조를 갖는 반도체 소자 및 그제조방법
DE10137217A1 (de) * 2001-07-30 2003-02-27 Infineon Technologies Ag Steg-Feldeffekttransistor und Verfahren zum Herstellen eines Steg-Feldeffekttransistors
US6958516B2 (en) * 2004-01-08 2005-10-25 International Business Machines Corporation Discriminative SOI with oxide holes underneath DC source/drain

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NL8701251A (nl) * 1987-05-26 1988-12-16 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
JP2507567B2 (ja) * 1988-11-25 1996-06-12 三菱電機株式会社 絶縁体基板上の半導体層に形成されたｍｏｓ型電界効果トランジスタ
JP2717739B2 (ja) * 1991-03-01 1998-02-25 三菱電機株式会社 半導体装置およびその製造方法
USH1435H (en) * 1991-10-21 1995-05-02 Cherne Richard D SOI CMOS device having body extension for providing sidewall channel stop and bodytie
US5293052A (en) * 1992-03-23 1994-03-08 Harris Corporation SOT CMOS device having differentially doped body extension for providing improved backside leakage channel stop

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100444095B1 (ko) * 2000-10-18 2004-08-11 인터내셔널 비지네스 머신즈 코포레이션 전계 효과 트랜지스터 형성 방법 및 2중 게이트 전계 효과 트랜지스터 형성 방법

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Publication number Publication date
DE4441901A1 (de) 1996-05-30
US5623155A (en) 1997-04-22
EP0716453B1 (de) 1998-02-25
KR100382394B1 (ko) 2003-07-18
EP0716453A1 (de) 1996-06-12
JPH08213638A (ja) 1996-08-20
DE4441901C2 (de) 1998-07-02
DE59501494D1 (de) 1998-04-02

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