KR960032725A - 낮은 도통저항을 갖는 수직 절연 게이트 전계효과 트랜지스터 장치 및 그 형성방법 - Google Patents

낮은 도통저항을 갖는 수직 절연 게이트 전계효과 트랜지스터 장치 및 그 형성방법 Download PDF

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KR960032725A
KR960032725A KR1019960001848A KR19960001848A KR960032725A KR 960032725 A KR960032725 A KR 960032725A KR 1019960001848 A KR1019960001848 A KR 1019960001848A KR 19960001848 A KR19960001848 A KR 19960001848A KR 960032725 A KR960032725 A KR 960032725A
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forming
stripe
low conduction
conduction resistance
igeft
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KR1019960001848A
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케이. 노츠 린니타
탐 팍
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빈센트 비. 인그라시아
모토로라 인코포레이티드
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Publication of KR960032725A publication Critical patent/KR960032725A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/66719—With a step of forming an insulating sidewall spacer

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Connection Of Batteries Or Terminals (AREA)
  • Thin Film Transistor (AREA)

Abstract

수직 IGEFT 구성은 비선형 형태를 갖는 줄무늬 배열을 포함한다. 한 예에 있어서 줄무늬 배열(30)은 콘택트컷-아웃 부분(41)과 연장된 부분(42)을 갖는다. 상기 연장된 부분(42)은 콘택트 컷-아웃 부분(41)의 폭(43)보다 좁은 폭(44)을 갖는다. 줄무늬 배열(30)은 전형적인 개별 셀 구성(10)과 직선 줄무늬 구성(20)과 비교하여 채널 밀도를 증가시켜 도통저항을 감소시킨다.

Description

낮은 도통저항을 갖는 수직 절연 게이트 전계효과 트랜지스터 장치 및 그 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 줄무늬 구성을 도시한 확대된 평면도.

Claims (5)

  1. 낮은 도통저항을 갖는 수직 IGEFT 장치에 있어서, 반도체 기판(62)의 한면에 형성된 다수의 줄무늬(31)와 상기 반도체 기판이 다른면에 형성된 드레인 전극(83)을 포함하고, 상기 다수의 줄무늬는 반도체 기판 속으로 확장되고, 채널 밀도를 증가시켜 낮은 도통 저항을 제공하는 비선형 형태를 갖는 것을 특징으로 하는 낮은 도통저항을 갖는 수직 IGEFT 장치.
  2. 낮은 도통저항을 갖는 수직 IGEFT 장치에 있어서 제1면과 상기 제1면과 평행한 제2면을 갖는 반도체 기판(62)과, 상기 반도체 기판에 형성되고 상기 제1면으로부터 확장되는 다수의 줄무늬 영역으로써, 제1폭(43)을 갖는 제1부분(41)과 제2폭(44)를 갖는 제2부분(42)을 포함하고, 웰 영역(36)내의 소스영역(37)과 상기 소스영역에서 보다 상기 제1표면으로부터 더 멀리 확장되는 상기 웰 영역을포함하는 상기 다수의 줄무늬 영역(31)과, 상기 제2표면과 연결된 공통 드레인 전극(83)과, 인접한 줄무늬 영역 사이에 형성되는 절연 게이트 영역(32)을 포함하는 것을 특징으로 하는 낮은 도통저항을 갖는 수직 IGEFT 장치.
  3. 제2항에 있어서, 인접하는 줄무늬 영역은 단을 짓어 다수의 줄무늬 영역중 하나의 상기 제1부분이 다수의 줄무늬 영역중 인접하는 하나의 제2부분과 아웃하는 것을 특징으로 하는 수직 IGEFT 장치.
  4. 낮은 도통저항을 갖는 수직 IGEFT 장치의 형성방법에 있어서, 제1표면과 상기 제1표면과에 평행한 제2표면을 갖는 반도체 기판(62)을 제공하는 단계와, 상기 반도체 기판에서 상기 제1표면으로부터 확장되는 다수의 줄무늬 영역으로서, 비선형 형태를 갖고 웰 영역(36)내의 소스영역(37)을 포함하는 다수의 줄무늬 영역(31)을 형성하는 단계와, 상기 제1표면상에 절연 게이트 영역(32)를 형성하는 단계와, 상기 다수의 줄무늬 영역 각각의 소스 영역과 연결된 소스 전극(82)을 형성하는 단계와, 제2표면과 연결된 공통 드레인 전극(82)을 형성하는 단계를 포함하는 것을 특징으로 하는 낮은 도통저항을 갖는 수직 IGEFT 장치 형성방법.
  5. 제4항에 있어서, 상기 다수의 줄무늬 영역 형성 단계가 제1폭(43)을 갖는 제1부분(41)과 상기 제1폭보다 적은 제2폭(44)을 갖는 제2부분(42)을 포함하는 형태를 갖는 다수의 줄무늬 영역의 형성 단계를 포함하는 것을 특징으로 하는 낮은 도통저항을 갖는 수직 IGEFT 장치 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960001848A 1995-02-24 1996-01-29 낮은 도통저항을 갖는 수직 절연 게이트 전계효과 트랜지스터 장치 및 그 형성방법 KR960032725A (ko)

Applications Claiming Priority (2)

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US08/393,772 US5703389A (en) 1995-02-24 1995-02-24 Vertical IGFET configuration having low on-resistance and method
US393,772 1995-02-24

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US5703389A (en) 1997-12-30
IT1284275B1 (it) 1998-05-18
ITRM960084A1 (it) 1997-08-07
ITRM960084A0 (ko) 1996-02-07
JPH0955506A (ja) 1997-02-25

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