KR910019260A - 반도체장치및 그의 제조방법 - Google Patents

반도체장치및 그의 제조방법 Download PDF

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KR910019260A
KR910019260A KR1019910005401A KR910005401A KR910019260A KR 910019260 A KR910019260 A KR 910019260A KR 1019910005401 A KR1019910005401 A KR 1019910005401A KR 910005401 A KR910005401 A KR 910005401A KR 910019260 A KR910019260 A KR 910019260A
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single crystal
layer
crystal silicon
insulating layer
silicon layer
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KR950003937B1 (ko
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다께히사 야마구찌
아사히로 시미즈
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시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66606Lateral single gate silicon transistors with final source and drain contacts formation strictly before final or dummy gate formation, e.g. contact first technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
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  • Formation Of Insulating Films (AREA)
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Abstract

내용 없음

Description

반도체장치 및 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 이 발명의 제 1 의 실시예에 의한 PSD 트랜지스터의 단면구조도 제 2A∼제 2H도는 제 1 도에 표시하는 PSD트랜지스터의 제조공정단면도.

Claims (3)

  1. 단결정실리콘층과 상기 단결정실리콘층의 표면상에 화학기상성장법에 의하여 절연층과, 상기 절연층의 표면상에 형성되고 상기 단결정 실리콘층과의 사이에 소정의 전압을 인가하기 위한 전극층과를 구비한 반도체장치.
  2. 주표면을 가지는 제 1 도 전형의 단결정실리콘층과, 상기 단결정실리콘층의 주표면중에 서로 사이를 띠어서 형성된 한쌍의 제 2 도 전형의 불순물영역과, 상기 불순물 영역의 표면상에 형성된 한쌍의 도전층과 상기 한쌍의 불순물 영역의 사이에 위치하는 상기 단결정실리콘층의 표면상에 화학기상성장법에 의하여 형성된 제 1 절연층과, 상기 제 1 절열층에 형성되고 그 일부가 상기 도전층의 표면상에 제 2 절연층을 개재하여 형성된 게이트전극층과를 구비한 반도체장치.
  3. 단결정실리콘층 표면상에 형성된 절연층과 상기 절연층의 표면상에 형성된 상기 실리콘 단결정과의 사이에 소정의 전압을 인가하기 위한 전극층과를 가지는 반도체장치의 제조방법으로서 상기 단결정 실리콘층의 표면상에 화학기상성장법을 사용하여 절연층을 형성하는 공정과, 상기 절연층의 표면상에 전극층을 형성하는 공정과를 구비한 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원내용에 의하여 공개하는 것임.
KR1019910005401A 1990-04-03 1991-04-03 반도체 장치 및 그 제조방법 KR950003937B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2089503A JPH03286536A (ja) 1990-04-03 1990-04-03 半導体装置およびその製造方法
JP2-89503 1990-04-03

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KR910019260A true KR910019260A (ko) 1991-11-30
KR950003937B1 KR950003937B1 (ko) 1995-04-21

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Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05283710A (ja) * 1991-12-06 1993-10-29 Intel Corp 高電圧mosトランジスタ及びその製造方法
US5712177A (en) * 1994-08-01 1998-01-27 Motorola, Inc. Method for forming a reverse dielectric stack
KR0165398B1 (ko) * 1995-05-26 1998-12-15 윤종용 버티칼 트랜지스터의 제조방법
KR100233832B1 (ko) * 1996-12-14 1999-12-01 정선종 반도체 소자의 트랜지스터 및 그 제조방법
US5783479A (en) * 1997-06-23 1998-07-21 National Science Council Structure and method for manufacturing improved FETs having T-shaped gates
US6593617B1 (en) * 1998-02-19 2003-07-15 International Business Machines Corporation Field effect transistors with vertical gate side walls and method for making such transistors
US6720632B2 (en) * 2000-06-20 2004-04-13 Matsushita Electric Industrial Co., Ltd. Semiconductor device having diffusion layer formed using dopant of large mass number
FR2823597A1 (fr) * 2001-04-12 2002-10-18 St Microelectronics Sa Procede de fabrication d'un transistor mos a longueur de grille tres reduite, et transistor mos correspondant
US6403485B1 (en) 2001-05-02 2002-06-11 Chartered Semiconductor Manufacturing Ltd Method to form a low parasitic capacitance pseudo-SOI CMOS device
US6534405B1 (en) * 2001-10-01 2003-03-18 Taiwan Semiconductor Manufacturing Company Method of forming a MOSFET device featuring a dual salicide process
US6551883B1 (en) * 2001-12-27 2003-04-22 Silicon Integrated Systems Corp. MOS device with dual gate insulators and method of forming the same
JP2004119644A (ja) * 2002-09-26 2004-04-15 Renesas Technology Corp 半導体装置の製造方法及び半導体装置
KR100712524B1 (ko) * 2005-08-09 2007-04-30 삼성전자주식회사 확장된 게이트 표면적을 갖는 드라이브 트랜지스터를구비한 cmos 이미지 센서 및 그 제조방법
RU2677500C1 (ru) * 2018-03-07 2019-01-17 Федеральное государственное бюджетное образовательное учреждение высшего образования "Чеченский государственный университет" Способ изготовления полупроводникового прибора
RU2734094C1 (ru) * 2020-05-02 2020-10-12 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Способ изготовления полупроводникового прибора
RU2748455C1 (ru) * 2020-07-08 2021-05-25 Федеральное государственное бюджетное образовательное учреждение высшего образования "Чеченский государственный университет" Способ изготовления полупроводникового прибора
RU2752125C1 (ru) * 2020-11-20 2021-07-23 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Способ изготовления полупроводникового прибора

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3899474A (en) * 1971-07-05 1975-08-12 Inst Francais Du Petrole Process for manufacturing hydrogenated polymers from conjugated diolefins
US3899373A (en) * 1974-05-20 1975-08-12 Ibm Method for forming a field effect device
US4466172A (en) * 1979-01-08 1984-08-21 American Microsystems, Inc. Method for fabricating MOS device with self-aligned contacts
JPS5632768A (en) * 1979-08-24 1981-04-02 Mitsubishi Electric Corp Semiconductor device
US4697330A (en) * 1983-02-23 1987-10-06 Texas Instruments Incorporated Floating gate memory process with improved dielectric
JPS6116573A (ja) * 1984-07-03 1986-01-24 Matsushita Electronics Corp Mis型半導体装置の製造方法
US4843023A (en) * 1985-09-25 1989-06-27 Hewlett-Packard Company Process for forming lightly-doped-drain (LDD) without extra masking steps
US4771012A (en) * 1986-06-13 1988-09-13 Matsushita Electric Industrial Co., Ltd. Method of making symmetrically controlled implanted regions using rotational angle of the substrate
US4791074A (en) * 1986-08-29 1988-12-13 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor apparatus
US4758530A (en) * 1986-12-08 1988-07-19 Delco Electronics Corporation Doubly-self-aligned hole-within-a-hole structure in semiconductor fabrication involving a double LOCOS process aligned with sidewall spacers
JPS63181468A (ja) * 1987-01-23 1988-07-26 Fujitsu Ltd Mis型電界効果トランジスタ
JPS63316476A (ja) * 1987-06-18 1988-12-23 Seiko Instr & Electronics Ltd 半導体装置およびその製造方法
JPS64765A (en) * 1987-06-23 1989-01-05 Seiko Epson Corp Semiconductor device
US4803173A (en) * 1987-06-29 1989-02-07 North American Philips Corporation, Signetics Division Method of fabrication of semiconductor device having a planar configuration
JPH0196969A (ja) * 1987-10-08 1989-04-14 Nec Corp 太陽電池保護装置
US4855247A (en) * 1988-01-19 1989-08-08 Standard Microsystems Corporation Process for fabricating self-aligned silicide lightly doped drain MOS devices
US5021851A (en) * 1988-05-03 1991-06-04 Texas Instruments Incorporated NMOS source/drain doping with both P and As
US5175118A (en) * 1988-09-20 1992-12-29 Mitsubishi Denki Kabushiki Kaisha Multiple layer electrode structure for semiconductor device and method of manufacturing thereof
JP2508818B2 (ja) * 1988-10-03 1996-06-19 三菱電機株式会社 半導体装置の製造方法
US4992388A (en) * 1989-12-10 1991-02-12 Motorola, Inc. Short channel IGFET process

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KR950003937B1 (ko) 1995-04-21
US5275960A (en) 1994-01-04
JPH03286536A (ja) 1991-12-17
US5134452A (en) 1992-07-28

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