KR890003036A - 반도체장치 - Google Patents

반도체장치 Download PDF

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Publication number
KR890003036A
KR890003036A KR1019880009744A KR880009744A KR890003036A KR 890003036 A KR890003036 A KR 890003036A KR 1019880009744 A KR1019880009744 A KR 1019880009744A KR 880009744 A KR880009744 A KR 880009744A KR 890003036 A KR890003036 A KR 890003036A
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KR
South Korea
Prior art keywords
layer
semiconductor device
film
insulating film
silicon oxide
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Application number
KR1019880009744A
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English (en)
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KR910007377B1 (ko
Inventor
요이치 오시마
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Publication of KR890003036A publication Critical patent/KR890003036A/ko
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Publication of KR910007377B1 publication Critical patent/KR910007377B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885—Hot carrier injection from the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/46—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with an inter-gate dielectric layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)

Abstract

내용없음

Description

반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도(A) 내지 제 1 도(E)는 본 발명의 1실시예에 관한 반도체장치의 제조공정을 도시해 놓은 단면도, 제 2도는 제 1도에 도시된 상기 반도체장치를 제 1도와 직교하는 방향에서 바라본 단면도, 제 3도(A)내지 제 3도(E)는 상기 반도체장치의 다른 제조공정을 도시해 놓은 도면

Claims (3)

  1. 소자분리된 반도체기판 표면에 각각 분리되어 형성된 소오스 및 드레인영역 (21a, 21b)과, 이 소오스 및 드레인영역 사이에 챈널영역위에 게이트 절연막(23)을 통해서 형성됨과 더불어 부유게이트전극으로 사용되게되는 제 1 도전층(24), 이 제 1 도전층위에 형성됨과 더불어 실리콘옥시나이트라이드막(25)과 실리콘산화막(26)의 2층 구조로 이루어진 2 층 절연막 및, 이 2층 절연막막에 형성되어 제어게이트전극으로 사용되게 되는 제 2 도전층(27)이 구비되어 구성된 것을 특징으로 하는 2층구조로 이루어진 것을 특징으로 하는 반도체장치
  2. 제 1 항에 있어서, 상기 2층절연막이 실리콘옥시나이트라이드막(25)을 하층으로 하고, 실리콘산화막(26)을 상층으로 하는 2층구조로 이루어진 것을 특징으로 하는 반도체장치
  3. 제 1 항에 있어서, 상기 2층절연막이 실리콘산화막(26)을 하층으로 하고, 실리콘옥시나이트라이드막(25)을 상층으로 하는 2층구조로 이루어진 것을 특징으로 하는 반도체장치
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임
KR1019880009744A 1987-07-31 1988-07-30 반도체장치 KR910007377B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62-191548 1987-07-31
JP62191548A JP2664685B2 (ja) 1987-07-31 1987-07-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR890003036A true KR890003036A (ko) 1989-04-12
KR910007377B1 KR910007377B1 (ko) 1991-09-25

Family

ID=16276506

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880009744A KR910007377B1 (ko) 1987-07-31 1988-07-30 반도체장치

Country Status (5)

Country Link
US (2) US5063431A (ko)
EP (1) EP0305741B1 (ko)
JP (1) JP2664685B2 (ko)
KR (1) KR910007377B1 (ko)
DE (1) DE3888603T2 (ko)

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Also Published As

Publication number Publication date
DE3888603T2 (de) 1994-08-04
EP0305741A2 (en) 1989-03-08
US5034798A (en) 1991-07-23
JP2664685B2 (ja) 1997-10-15
US5063431A (en) 1991-11-05
JPS6436077A (en) 1989-02-07
DE3888603D1 (de) 1994-04-28
EP0305741B1 (en) 1994-03-23
KR910007377B1 (ko) 1991-09-25
EP0305741A3 (en) 1990-05-16

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