KR890003037A - 자외선소거형 불휘발성 반도체장치 - Google Patents
자외선소거형 불휘발성 반도체장치 Download PDFInfo
- Publication number
- KR890003037A KR890003037A KR1019880009746A KR880009746A KR890003037A KR 890003037 A KR890003037 A KR 890003037A KR 1019880009746 A KR1019880009746 A KR 1019880009746A KR 880009746 A KR880009746 A KR 880009746A KR 890003037 A KR890003037 A KR 890003037A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor device
- nonvolatile semiconductor
- silicon oxide
- oxide layer
- layer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 4
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
내용없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1도는 본 발명에 따른 자외선소거형 반도체장치에 사용되는 메모리셀의 구조를 나타낸 단면도, 제 2도는 상기 메모리셀의 소거시간에 대한 소거특성을 나타낸 도면, 제 3도는 상기 메모리셀의 절연층의 두께에 대한 소거특성을 나타낸 도면
Claims (4)
- 부유게이트(13)와, 게이트절연층(17)을 매개하여 상기 부유게이트(13)위에 설치된 제어게이트(18)을 구비하고, 상기 게이트절연층(17)이 제 1 산화실리콘층 (14)과 이 제 1 산화실리콘층(14)위에 설치된 질화실리콘층(15)및 이 질화실리콘층 (15)위에 설치된 제 2 산화실리콘층(16)의 두께가 30Å이하로 설정되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치
- 제 1 항에 있어서, 상기 제 2 산화실리콘층(16)의 두께가 20Å이하로 설정되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치
- 제 1 항에 있어서, 상기 제 1 산화실리콘층(14) 및 상기 질화실리콘층(15) 각각의 두께가 100Å에서 200Å까지의 범위내에 설정되어 있을 때에 상기 제 2 산화실리콘층(16)의 두께가 10Å이상으로 설정되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치
- 제 1 항에 있어서, 상기 제 2 산화실리콘층(16)이 그 아랫부분의 질화실리콘층(15)의 표면을 산화시킴으로써 얻어지는 열산화층으로 구성되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-190863 | 1987-07-30 | ||
JP62190863A JP2633571B2 (ja) | 1987-07-30 | 1987-07-30 | 紫外線消去型不揮発性半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890003037A true KR890003037A (ko) | 1989-04-12 |
KR910007378B1 KR910007378B1 (ko) | 1991-09-25 |
Family
ID=16265021
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019880009746A KR910007378B1 (ko) | 1987-07-30 | 1988-07-30 | 자외선소거형 불휘발성 반도체장치 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4943836A (ko) |
EP (1) | EP0301460A3 (ko) |
JP (1) | JP2633571B2 (ko) |
KR (1) | KR910007378B1 (ko) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5104819A (en) * | 1989-08-07 | 1992-04-14 | Intel Corporation | Fabrication of interpoly dielctric for EPROM-related technologies |
KR920006736B1 (ko) * | 1989-11-08 | 1992-08-17 | 삼성전자 주식회사 | 반도체장치 및 그 제조방법 |
US5266509A (en) * | 1990-05-11 | 1993-11-30 | North American Philips Corporation | Fabrication method for a floating-gate field-effect transistor structure |
EP0456319B1 (en) * | 1990-05-11 | 1996-03-13 | Koninklijke Philips Electronics N.V. | Floating gate field effect transistor structure and method for manufacturing the same |
JP2602575B2 (ja) * | 1990-07-06 | 1997-04-23 | シャープ株式会社 | 不揮発性半導体記憶装置 |
JPH04144278A (ja) * | 1990-10-05 | 1992-05-18 | Mitsubishi Electric Corp | 半導体記憶装置およびその製造方法 |
KR100274555B1 (ko) * | 1991-06-26 | 2000-12-15 | 윌리엄 비. 켐플러 | 절연 게이트 전계 효과 트랜지스터 구조물 및 이의 제조 방법 |
US5495121A (en) * | 1991-09-30 | 1996-02-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JPH05110114A (ja) * | 1991-10-17 | 1993-04-30 | Rohm Co Ltd | 不揮発性半導体記憶素子 |
US5619052A (en) * | 1994-09-29 | 1997-04-08 | Macronix International Co., Ltd. | Interpoly dielectric structure in EEPROM device |
JPH10256400A (ja) * | 1997-03-10 | 1998-09-25 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
US6008091A (en) * | 1998-01-27 | 1999-12-28 | Lucent Technologies Inc. | Floating gate avalanche injection MOS transistors with high K dielectric control gates |
US6521496B1 (en) * | 1999-06-24 | 2003-02-18 | Lucent Technologies Inc. | Non-volatile memory semiconductor device including a graded, grown, high quality control gate oxide layer and associated methods |
US6670242B1 (en) | 1999-06-24 | 2003-12-30 | Agere Systems Inc. | Method for making an integrated circuit device including a graded, grown, high quality gate oxide layer and a nitride layer |
US6509230B1 (en) | 1999-06-24 | 2003-01-21 | Lucent Technologies Inc. | Non-volatile memory semiconductor device including a graded, grown, high quality oxide layer and associated methods |
US6551946B1 (en) | 1999-06-24 | 2003-04-22 | Agere Systems Inc. | Two-step oxidation process for oxidizing a silicon substrate wherein the first step is carried out at a temperature below the viscoelastic temperature of silicon dioxide and the second step is carried out at a temperature above the viscoelastic temperature |
US20030235957A1 (en) | 2002-06-25 | 2003-12-25 | Samir Chaudhry | Method and structure for graded gate oxides on vertical and non-planar surfaces |
US6969654B1 (en) * | 2000-06-19 | 2005-11-29 | Advanced Micro Devices, Inc. | Flash NVROM devices with UV charge immunity |
JP4281331B2 (ja) * | 2002-01-21 | 2009-06-17 | 株式会社デンソー | 不揮発性半導体記憶装置 |
US20030232507A1 (en) * | 2002-06-12 | 2003-12-18 | Macronix International Co., Ltd. | Method for fabricating a semiconductor device having an ONO film |
CN100341139C (zh) * | 2003-12-30 | 2007-10-03 | 旺宏电子股份有限公司 | 非挥发性内存元件的制造方法及金属内连线制程 |
US7160775B2 (en) * | 2004-08-06 | 2007-01-09 | Freescale Semiconductor, Inc. | Method of discharging a semiconductor device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS577162A (en) * | 1980-06-17 | 1982-01-14 | Toshiba Corp | Nonvolatile semiconductor memory and manufacture therefor |
JPS5955071A (ja) * | 1982-09-24 | 1984-03-29 | Hitachi Micro Comput Eng Ltd | 不揮発性半導体装置 |
US4577390A (en) * | 1983-02-23 | 1986-03-25 | Texas Instruments Incorporated | Fabrication of polysilicon to polysilicon capacitors with a composite dielectric layer |
JPS60134478A (ja) * | 1983-11-28 | 1985-07-17 | ローム・コーポレーション | 電気的プログラム式記憶装置を製造する方法 |
JPS61136274A (ja) * | 1984-12-07 | 1986-06-24 | Toshiba Corp | 半導体装置 |
US4665426A (en) * | 1985-02-01 | 1987-05-12 | Advanced Micro Devices, Inc. | EPROM with ultraviolet radiation transparent silicon nitride passivation layer |
-
1987
- 1987-07-30 JP JP62190863A patent/JP2633571B2/ja not_active Expired - Fee Related
-
1988
- 1988-07-25 US US07/224,026 patent/US4943836A/en not_active Expired - Lifetime
- 1988-07-25 EP EP88111965A patent/EP0301460A3/en not_active Withdrawn
- 1988-07-30 KR KR1019880009746A patent/KR910007378B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPS6435964A (en) | 1989-02-07 |
US4943836A (en) | 1990-07-24 |
KR910007378B1 (ko) | 1991-09-25 |
JP2633571B2 (ja) | 1997-07-23 |
EP0301460A3 (en) | 1990-01-10 |
EP0301460A2 (en) | 1989-02-01 |
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A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20070828 Year of fee payment: 17 |
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EXPY | Expiration of term |