KR890003037A - 자외선소거형 불휘발성 반도체장치 - Google Patents

자외선소거형 불휘발성 반도체장치 Download PDF

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Publication number
KR890003037A
KR890003037A KR1019880009746A KR880009746A KR890003037A KR 890003037 A KR890003037 A KR 890003037A KR 1019880009746 A KR1019880009746 A KR 1019880009746A KR 880009746 A KR880009746 A KR 880009746A KR 890003037 A KR890003037 A KR 890003037A
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South Korea
Prior art keywords
semiconductor device
nonvolatile semiconductor
silicon oxide
oxide layer
layer
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KR1019880009746A
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English (en)
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KR910007378B1 (ko
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세이이치 모리
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아오이 죠이치
가부시키가이샤 도시바
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Publication of KR890003037A publication Critical patent/KR890003037A/ko
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Publication of KR910007378B1 publication Critical patent/KR910007378B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7883Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용없음

Description

자외선소거형 불휘발성 반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1도는 본 발명에 따른 자외선소거형 반도체장치에 사용되는 메모리셀의 구조를 나타낸 단면도, 제 2도는 상기 메모리셀의 소거시간에 대한 소거특성을 나타낸 도면, 제 3도는 상기 메모리셀의 절연층의 두께에 대한 소거특성을 나타낸 도면

Claims (4)

  1. 부유게이트(13)와, 게이트절연층(17)을 매개하여 상기 부유게이트(13)위에 설치된 제어게이트(18)을 구비하고, 상기 게이트절연층(17)이 제 1 산화실리콘층 (14)과 이 제 1 산화실리콘층(14)위에 설치된 질화실리콘층(15)및 이 질화실리콘층 (15)위에 설치된 제 2 산화실리콘층(16)의 두께가 30Å이하로 설정되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치
  2. 제 1 항에 있어서, 상기 제 2 산화실리콘층(16)의 두께가 20Å이하로 설정되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치
  3. 제 1 항에 있어서, 상기 제 1 산화실리콘층(14) 및 상기 질화실리콘층(15) 각각의 두께가 100Å에서 200Å까지의 범위내에 설정되어 있을 때에 상기 제 2 산화실리콘층(16)의 두께가 10Å이상으로 설정되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치
  4. 제 1 항에 있어서, 상기 제 2 산화실리콘층(16)이 그 아랫부분의 질화실리콘층(15)의 표면을 산화시킴으로써 얻어지는 열산화층으로 구성되어 있는 것을 특징으로 하는 자외선 소거형 불휘발성 반도체장치
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880009746A 1987-07-30 1988-07-30 자외선소거형 불휘발성 반도체장치 KR910007378B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62-190863 1987-07-30
JP62190863A JP2633571B2 (ja) 1987-07-30 1987-07-30 紫外線消去型不揮発性半導体装置

Publications (2)

Publication Number Publication Date
KR890003037A true KR890003037A (ko) 1989-04-12
KR910007378B1 KR910007378B1 (ko) 1991-09-25

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Family Applications (1)

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KR1019880009746A KR910007378B1 (ko) 1987-07-30 1988-07-30 자외선소거형 불휘발성 반도체장치

Country Status (4)

Country Link
US (1) US4943836A (ko)
EP (1) EP0301460A3 (ko)
JP (1) JP2633571B2 (ko)
KR (1) KR910007378B1 (ko)

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US5104819A (en) * 1989-08-07 1992-04-14 Intel Corporation Fabrication of interpoly dielctric for EPROM-related technologies
KR920006736B1 (ko) * 1989-11-08 1992-08-17 삼성전자 주식회사 반도체장치 및 그 제조방법
US5266509A (en) * 1990-05-11 1993-11-30 North American Philips Corporation Fabrication method for a floating-gate field-effect transistor structure
EP0456319B1 (en) * 1990-05-11 1996-03-13 Koninklijke Philips Electronics N.V. Floating gate field effect transistor structure and method for manufacturing the same
JP2602575B2 (ja) * 1990-07-06 1997-04-23 シャープ株式会社 不揮発性半導体記憶装置
JPH04144278A (ja) * 1990-10-05 1992-05-18 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
KR100274555B1 (ko) * 1991-06-26 2000-12-15 윌리엄 비. 켐플러 절연 게이트 전계 효과 트랜지스터 구조물 및 이의 제조 방법
US5495121A (en) * 1991-09-30 1996-02-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JPH05110114A (ja) * 1991-10-17 1993-04-30 Rohm Co Ltd 不揮発性半導体記憶素子
US5619052A (en) * 1994-09-29 1997-04-08 Macronix International Co., Ltd. Interpoly dielectric structure in EEPROM device
JPH10256400A (ja) * 1997-03-10 1998-09-25 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US6008091A (en) * 1998-01-27 1999-12-28 Lucent Technologies Inc. Floating gate avalanche injection MOS transistors with high K dielectric control gates
US6521496B1 (en) * 1999-06-24 2003-02-18 Lucent Technologies Inc. Non-volatile memory semiconductor device including a graded, grown, high quality control gate oxide layer and associated methods
US6670242B1 (en) 1999-06-24 2003-12-30 Agere Systems Inc. Method for making an integrated circuit device including a graded, grown, high quality gate oxide layer and a nitride layer
US6509230B1 (en) 1999-06-24 2003-01-21 Lucent Technologies Inc. Non-volatile memory semiconductor device including a graded, grown, high quality oxide layer and associated methods
US6551946B1 (en) 1999-06-24 2003-04-22 Agere Systems Inc. Two-step oxidation process for oxidizing a silicon substrate wherein the first step is carried out at a temperature below the viscoelastic temperature of silicon dioxide and the second step is carried out at a temperature above the viscoelastic temperature
US20030235957A1 (en) 2002-06-25 2003-12-25 Samir Chaudhry Method and structure for graded gate oxides on vertical and non-planar surfaces
US6969654B1 (en) * 2000-06-19 2005-11-29 Advanced Micro Devices, Inc. Flash NVROM devices with UV charge immunity
JP4281331B2 (ja) * 2002-01-21 2009-06-17 株式会社デンソー 不揮発性半導体記憶装置
US20030232507A1 (en) * 2002-06-12 2003-12-18 Macronix International Co., Ltd. Method for fabricating a semiconductor device having an ONO film
CN100341139C (zh) * 2003-12-30 2007-10-03 旺宏电子股份有限公司 非挥发性内存元件的制造方法及金属内连线制程
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Also Published As

Publication number Publication date
JPS6435964A (en) 1989-02-07
US4943836A (en) 1990-07-24
KR910007378B1 (ko) 1991-09-25
JP2633571B2 (ja) 1997-07-23
EP0301460A3 (en) 1990-01-10
EP0301460A2 (en) 1989-02-01

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