KR890015417A - 불휘발성 반도체기억장치와 그 동작방법 및 제조방법 - Google Patents

불휘발성 반도체기억장치와 그 동작방법 및 제조방법 Download PDF

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KR890015417A
KR890015417A KR1019890004079A KR890004079A KR890015417A KR 890015417 A KR890015417 A KR 890015417A KR 1019890004079 A KR1019890004079 A KR 1019890004079A KR 890004079 A KR890004079 A KR 890004079A KR 890015417 A KR890015417 A KR 890015417A
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South Korea
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memory device
gate electrode
semiconductor memory
nonvolatile semiconductor
manufacturing
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KR1019890004079A
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KR960012056B1 (ko
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기요미 나루케
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아오이 죠이치
가부시키가이샤 도시바
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H01L21/2815Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects part or whole of the electrode is a sidewall spacer or made by a similar technique, e.g. transformation under mask, plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7831Field effect transistors with field effect produced by an insulated gate with multiple gate structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885Hot carrier injection from the channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음

Description

불휘발성 반도체기억장치와 그 동작방법 및 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명의 1실시예에 따른 불휘발성 반도체기억장치의 구조를 나타낸 단면도, 제 4 도는 제 1 도에 나타낸 본 발명의 불휘발성 반도체기억장치의 제조공정예를 나타낸 도면.

Claims (1)

  1. 반도체기판(101)과, 이 반도체기판(101)의 표면에 형성되어 있으면서 반도체기판(101)과는 역도전형인 제 1 불순물영역(102) 및 제 2 불순물영역(103), 상기 반도체기판(101)상의 두 불순물영역(102,103)사이에 제 1 게이트절연막(105), 을 매개하여 형성되어 있는 제 1 게이트전극(106), 이 제 1 게이트전극(106)상에 충간절연막(107)을 매개하여 형성되어 있는 제 2 게이트전극(108), 상기 제 1 게이트전극(106) 및 제 2 게이트전극(108)의 양쪽면에 측면절연막(109a,109b)을 매개하여 각각 형성되어 있는 제 3 게이트전극(111a,111b)을 구비하여 구성된 것을 특징으로 하는 불휘발성 반도체기억장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890004079A 1988-03-30 1989-03-30 불휘발성 반도체 기억장치와 그 동작방법 및 제조방법 KR960012056B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63077671A JPH01248670A (ja) 1988-03-30 1988-03-30 不揮発性半導体記憶装置ならびにその動作方法および製造方法
JP63-77671 1988-03-30

Publications (2)

Publication Number Publication Date
KR890015417A true KR890015417A (ko) 1989-10-30
KR960012056B1 KR960012056B1 (ko) 1996-09-11

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KR1019890004079A KR960012056B1 (ko) 1988-03-30 1989-03-30 불휘발성 반도체 기억장치와 그 동작방법 및 제조방법

Country Status (4)

Country Link
EP (1) EP0335395B1 (ko)
JP (1) JPH01248670A (ko)
KR (1) KR960012056B1 (ko)
DE (1) DE68916297T2 (ko)

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JP2597719B2 (ja) * 1989-07-31 1997-04-09 株式会社東芝 不揮発性半導体記憶装置およびその動作方法
JP2598523B2 (ja) * 1989-09-20 1997-04-09 三星電子株式會社 不揮発性の半導体記憶装置及びその製造方法
DE69131032T2 (de) * 1990-06-28 1999-10-21 Nat Semiconductor Corp Verfahren zum Herstellen einer EPROM-Zelle mit geteiltem Gate und mit Polysilizium-Abstandhaltern
US5115288A (en) * 1990-06-28 1992-05-19 National Semiconductor Corporation Split-gate EPROM cell using polysilicon spacers
US5063172A (en) * 1990-06-28 1991-11-05 National Semiconductor Corporation Manufacture of a split-gate EPROM cell using polysilicon spacers
US5108939A (en) * 1990-10-16 1992-04-28 National Semiconductor Corp. Method of making a non-volatile memory cell utilizing polycrystalline silicon spacer tunnel region
DE69219669T2 (de) * 1991-06-07 1997-11-13 Sharp Kk Nichtflüchtiger Speicher
US5268585A (en) * 1991-07-01 1993-12-07 Sharp Kabushiki Kaisha Non-volatile memory and method of manufacturing the same
TW232092B (ko) * 1991-07-01 1994-10-11 Sharp Kk
US5284784A (en) * 1991-10-02 1994-02-08 National Semiconductor Corporation Buried bit-line source-side injection flash memory cell
US5910912A (en) * 1992-10-30 1999-06-08 International Business Machines Corporation Flash EEPROM with dual-sidewall gate
US5471422A (en) * 1994-04-11 1995-11-28 Motorola, Inc. EEPROM cell with isolation transistor and methods for making and operating the same
JP2658907B2 (ja) * 1994-09-29 1997-09-30 日本電気株式会社 不揮発性半導体記憶装置およびその製造方法
US6262451B1 (en) * 1997-03-13 2001-07-17 Motorola, Inc. Electrode structure for transistors, non-volatile memories and the like
KR100448086B1 (ko) * 1997-05-23 2005-06-16 삼성전자주식회사 비휘발성메모리장치및그제조방법
JP4488565B2 (ja) * 1999-12-03 2010-06-23 富士通株式会社 半導体記憶装置の製造方法
TW527652B (en) 2002-02-06 2003-04-11 Taiwan Semiconductor Mfg Manufacturing method of selection gate for the split gate flash memory cell and its structure
US6710416B1 (en) * 2003-05-16 2004-03-23 Agere Systems Inc. Split-gate metal-oxide-semiconductor device
KR100598107B1 (ko) * 2004-09-21 2006-07-07 삼성전자주식회사 비휘발성 메모리 소자 및 그 형성 방법
KR100614644B1 (ko) 2004-12-30 2006-08-22 삼성전자주식회사 비휘발성 기억소자, 그 제조방법 및 동작 방법
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Publication number Publication date
JPH01248670A (ja) 1989-10-04
EP0335395B1 (en) 1994-06-22
DE68916297T2 (de) 1994-11-24
EP0335395A3 (en) 1990-07-25
EP0335395A2 (en) 1989-10-04
DE68916297D1 (de) 1994-07-28
KR960012056B1 (ko) 1996-09-11

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