KR900002321A - 고저항층을 가지는 반도체장치 - Google Patents

고저항층을 가지는 반도체장치 Download PDF

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Publication number
KR900002321A
KR900002321A KR1019890010235A KR890010235A KR900002321A KR 900002321 A KR900002321 A KR 900002321A KR 1019890010235 A KR1019890010235 A KR 1019890010235A KR 890010235 A KR890010235 A KR 890010235A KR 900002321 A KR900002321 A KR 900002321A
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KR
South Korea
Prior art keywords
high resistance
resistance layer
semiconductor device
semiconductor region
semiconductor
Prior art date
Application number
KR1019890010235A
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English (en)
Other versions
KR930006275B1 (ko
Inventor
준이찌 미쓰하시
신이찌 샤도우
히데끼 군쇼우
요시오 고우노
Original Assignee
시기 모리야
미쓰비시뎅끼가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 시기 모리야, 미쓰비시뎅끼가부시끼가이샤 filed Critical 시기 모리야
Publication of KR900002321A publication Critical patent/KR900002321A/ko
Application granted granted Critical
Publication of KR930006275B1 publication Critical patent/KR930006275B1/ko

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/15—Static random access memory [SRAM] devices comprising a resistor load element
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell
    • Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors

Abstract

내용 없음

Description

고저항층을 가지는 반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1E도는 이 발명에 따른 고저항층을 가지는 반도체층의 한예로서, SRAM의 하나의 메모리셀의 패턴레이아웃을 그 제조공정 순으로 표시한 부분 평면도.
제2G도는 Ⅱ-Ⅱ선에 있어서의 단면을 공정순으로 표시하는 단면도.
제3E도는 Ⅱ-Ⅱ선에 있어서의 단면을 또 하나의 제조방법의 공정순에 따라 표시하는 단면도.

Claims (1)

  1. 주표면을 가지고 제1도전형의 반도체 기판과 상기 반도체 기판의 주표면 상에 형성된 제2도전형의 반도체 영역과, 상기 반도체 영역의 위쪽에 형성된 도전체층과, 상기 도전체층과 상기 반도체 영역과의 사이에 위치하고 적어도 서로 적층된 산화막과 질화막을 포함하는 고저항층과를 구비한 고저항층을 가지는 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890010235A 1988-07-19 1989-07-19 다층저항층 구조의 반도체장치 KR930006275B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP63-179887 1988-07-19
JP88-179887 1988-07-19
JP63179887A JPH0727980B2 (ja) 1988-07-19 1988-07-19 高抵抗層を有する半導体装置

Publications (2)

Publication Number Publication Date
KR900002321A true KR900002321A (ko) 1990-02-28
KR930006275B1 KR930006275B1 (ko) 1993-07-09

Family

ID=16073634

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890010235A KR930006275B1 (ko) 1988-07-19 1989-07-19 다층저항층 구조의 반도체장치

Country Status (4)

Country Link
US (1) US5093706A (ko)
JP (1) JPH0727980B2 (ko)
KR (1) KR930006275B1 (ko)
DE (1) DE3923619A1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5461000A (en) * 1994-07-05 1995-10-24 Taiwan Semiconductor Manufacturing Company Ltd. Method of manufacturing dielectric as load resistor in 4T SRAM
US5665629A (en) * 1995-08-11 1997-09-09 International Business Machines Corporation Four transistor SRAM process
US5578854A (en) * 1995-08-11 1996-11-26 International Business Machines Corporation Vertical load resistor SRAM cell
US5683930A (en) * 1995-12-06 1997-11-04 Micron Technology Inc. SRAM cell employing substantially vertically elongated pull-up resistors and methods of making, and resistor constructions and methods of making
KR100204012B1 (ko) * 1996-05-13 1999-06-15 김영환 고저항 부하형 스태틱램 셀 및 그 제조방법
US5986922A (en) * 1997-09-30 1999-11-16 Alliance Semiconductor Method of and apparatus for increasing load resistance within an SRAM array
US6303965B1 (en) * 1999-08-20 2001-10-16 Micron Technology, Inc. Resistor constructions and methods of forming resistor constructions
EP3327756B1 (en) * 2016-11-24 2019-11-06 Melexis Technologies NV Die edge integrity monitoring system and corresponding method

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4131902A (en) * 1977-09-30 1978-12-26 Westinghouse Electric Corp. Novel bipolar transistor with a dual-dielectric tunnel emitter
JPS5640269A (en) * 1979-09-11 1981-04-16 Toshiba Corp Preparation of semiconductor device
JPS6188548A (ja) * 1984-10-08 1986-05-06 Toshiba Corp 半導体装置
JPS61134055A (ja) * 1984-12-04 1986-06-21 Sony Corp 半導体装置の製造方法
JPS6230351A (ja) * 1985-04-25 1987-02-09 Nec Corp 半導体装置の製造方法
US4641173A (en) * 1985-11-20 1987-02-03 Texas Instruments Incorporated Integrated circuit load device
US4755480A (en) * 1986-02-03 1988-07-05 Intel Corporation Method of making a silicon nitride resistor using plasma enhanced chemical vapor deposition
US4786612A (en) * 1986-02-03 1988-11-22 Intel Corporation Plasma enhanced chemical vapor deposited vertical silicon nitride resistor
GB2186116B (en) * 1986-02-03 1989-11-22 Intel Corp Plasma enhanced chemical vapor deposited vertical resistor
JPS62195179A (ja) * 1986-02-21 1987-08-27 Mitsubishi Electric Corp 電界効果トランジスタ
US4823181A (en) * 1986-05-09 1989-04-18 Actel Corporation Programmable low impedance anti-fuse element
US4888820A (en) * 1988-12-06 1989-12-19 Texas Instruments Incorporated Stacked insulating film including yttrium oxide
US4931897A (en) * 1989-08-07 1990-06-05 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor capacitive element

Also Published As

Publication number Publication date
DE3923619A1 (de) 1990-01-25
JPH0228970A (ja) 1990-01-31
KR930006275B1 (ko) 1993-07-09
DE3923619C2 (ko) 1993-04-08
JPH0727980B2 (ja) 1995-03-29
US5093706A (en) 1992-03-03

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