DE3888603D1 - Halbleiterbauelement mit Floating-Gate. - Google Patents
Halbleiterbauelement mit Floating-Gate.Info
- Publication number
- DE3888603D1 DE3888603D1 DE88112312T DE3888603T DE3888603D1 DE 3888603 D1 DE3888603 D1 DE 3888603D1 DE 88112312 T DE88112312 T DE 88112312T DE 3888603 T DE3888603 T DE 3888603T DE 3888603 D1 DE3888603 D1 DE 3888603D1
- Authority
- DE
- Germany
- Prior art keywords
- floating gate
- semiconductor component
- semiconductor
- component
- floating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
- H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
- H10B41/48—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
- H01L29/7885—Hot carrier injection from the channel
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
- H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
- H10B41/46—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with an inter-gate dielectric layer also being used as part of the peripheral transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62191548A JP2664685B2 (ja) | 1987-07-31 | 1987-07-31 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3888603D1 true DE3888603D1 (de) | 1994-04-28 |
DE3888603T2 DE3888603T2 (de) | 1994-08-04 |
Family
ID=16276506
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3888603T Expired - Fee Related DE3888603T2 (de) | 1987-07-31 | 1988-07-29 | Halbleiterbauelement mit Floating-Gate. |
Country Status (5)
Country | Link |
---|---|
US (2) | US5063431A (de) |
EP (1) | EP0305741B1 (de) |
JP (1) | JP2664685B2 (de) |
KR (1) | KR910007377B1 (de) |
DE (1) | DE3888603T2 (de) |
Families Citing this family (57)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2755781B2 (ja) * | 1990-04-23 | 1998-05-25 | 株式会社東芝 | 半導体記憶装置およびその製造方法 |
JP2685966B2 (ja) * | 1990-06-22 | 1997-12-08 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US5254867A (en) * | 1990-07-09 | 1993-10-19 | Kabushiki Kaisha Toshiba | Semiconductor devices having an improved gate |
JP2635809B2 (ja) * | 1990-09-12 | 1997-07-30 | 株式会社東芝 | 半導体装置及びその製造方法 |
KR930007527B1 (ko) * | 1990-09-22 | 1993-08-12 | 삼성전자 주식회사 | 스토리지 셀 어레이와 주변회로를 갖는 불휘발성 반도체 메모리 장치의 제조방법 및 그 구조 |
JP2679389B2 (ja) * | 1990-10-12 | 1997-11-19 | 日本電気株式会社 | 不揮発性半導体記憶セルのデータ消去方法 |
KR930009131B1 (ko) * | 1991-04-24 | 1993-09-23 | 삼성전자 주식회사 | 초고집적 반도체 메모리장치의 제조방법 |
EP0511628A3 (en) * | 1991-04-30 | 1993-09-22 | Texas Instruments Incorporated | Insulator for integrated circuits formed by high-pressure oxidation |
JP2652108B2 (ja) * | 1991-09-05 | 1997-09-10 | 三菱電機株式会社 | 電界効果トランジスタおよびその製造方法 |
JPH0575133A (ja) * | 1991-09-11 | 1993-03-26 | Rohm Co Ltd | 不揮発性記憶装置 |
US5192872A (en) * | 1991-09-13 | 1993-03-09 | Micron Technology, Inc. | Cell structure for erasable programmable read-only memories |
JP3548984B2 (ja) * | 1991-11-14 | 2004-08-04 | 富士通株式会社 | 半導体装置の製造方法 |
JPH05283710A (ja) * | 1991-12-06 | 1993-10-29 | Intel Corp | 高電圧mosトランジスタ及びその製造方法 |
US5726087A (en) * | 1992-04-30 | 1998-03-10 | Motorola, Inc. | Method of formation of semiconductor gate dielectric |
US5393683A (en) * | 1992-05-26 | 1995-02-28 | Micron Technology, Inc. | Method of making semiconductor devices having two-layer gate structure |
KR960012303B1 (ko) * | 1992-08-18 | 1996-09-18 | 삼성전자 주식회사 | 불휘발성 반도체메모리장치 및 그 제조방법 |
EP0610643B1 (de) * | 1993-02-11 | 1997-09-10 | STMicroelectronics S.r.l. | EEPROM-Zelle und peripherer MOS-Transistor |
EP0617461B1 (de) * | 1993-03-24 | 1997-09-10 | AT&T Corp. | Verfahren zur Bildung dielektrischer Oxynitridschichten bei der Herstellung integrierter Schaltungen |
US5561319A (en) * | 1993-05-14 | 1996-10-01 | Lsi Logic Corporation | Integrated circuit structure including CMOS devices protected by patterned nitride passivation and method for the fabrication thereof |
US5371028A (en) * | 1993-08-02 | 1994-12-06 | Chartered Semiconductor Manufacturing Pte Ltd. | Method for making single transistor non-volatile electrically alterable semiconductor memory device |
DE4419762A1 (de) * | 1993-10-12 | 1995-04-20 | Hewlett Packard Co | Bauelement mit aufgewachsenem und abgeschiedenem Zwei-Film-Gate-Oxid und Verfahren zu dessen Herstellung |
US5397720A (en) * | 1994-01-07 | 1995-03-14 | The Regents Of The University Of Texas System | Method of making MOS transistor having improved oxynitride dielectric |
US5432749A (en) * | 1994-04-26 | 1995-07-11 | National Semiconductor Corporation | Non-volatile memory cell having hole confinement layer for reducing band-to-band tunneling |
US5478765A (en) * | 1994-05-04 | 1995-12-26 | Regents Of The University Of Texas System | Method of making an ultra thin dielectric for electronic devices |
US6133620A (en) | 1995-05-26 | 2000-10-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and process for fabricating the same |
US5712208A (en) * | 1994-06-09 | 1998-01-27 | Motorola, Inc. | Methods of formation of semiconductor composite gate dielectric having multiple incorporated atomic dopants |
JP3600326B2 (ja) * | 1994-09-29 | 2004-12-15 | 旺宏電子股▲ふん▼有限公司 | 不揮発性半導体メモリ装置およびその製造方法 |
US5780891A (en) | 1994-12-05 | 1998-07-14 | Micron Technology, Inc. | Nonvolatile floating gate memory with improved interploy dielectric |
EP1111673A1 (de) * | 1995-05-10 | 2001-06-27 | STMicroelectronics S.r.l. | Herstellungsverfahren eines integrierten MOS-Schaltkreises mit Bestandteilen mit unterschiedlichen Dielektrika |
JP2871530B2 (ja) * | 1995-05-10 | 1999-03-17 | 日本電気株式会社 | 半導体装置の製造方法 |
US5925907A (en) * | 1995-09-29 | 1999-07-20 | Nippon Steel Corporaition | Semiconductor device including transistor with composite gate structure and transistor with single gate structure |
US6787844B2 (en) | 1995-09-29 | 2004-09-07 | Nippon Steel Corporation | Semiconductor device including transistor with composite gate structure and transistor with single gate structure, and method for manufacturing the same |
JPH10256539A (ja) * | 1997-03-10 | 1998-09-25 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US6258671B1 (en) | 1997-05-13 | 2001-07-10 | Micron Technology, Inc. | Methods of providing spacers over conductive line sidewalls, methods of forming sidewall spacers over etched line sidewalls, and methods of forming conductive lines |
US6020606A (en) * | 1998-03-20 | 2000-02-01 | United Silicon Incorporated | Structure of a memory cell |
TW449919B (en) * | 1998-12-18 | 2001-08-11 | Koninkl Philips Electronics Nv | A method of manufacturing a semiconductor device |
JP4212178B2 (ja) * | 1999-03-12 | 2009-01-21 | 株式会社東芝 | 半導体集積回路の製造方法 |
US6677640B1 (en) * | 2000-03-01 | 2004-01-13 | Micron Technology, Inc. | Memory cell with tight coupling |
TW497270B (en) | 2000-06-09 | 2002-08-01 | Sanyo Electric Co | Method for making semiconductors |
JP3686318B2 (ja) * | 2000-08-31 | 2005-08-24 | 松下電器産業株式会社 | 半導体記憶装置の製造方法 |
JP4096507B2 (ja) * | 2000-09-29 | 2008-06-04 | 富士通株式会社 | 半導体装置の製造方法 |
DE10101270A1 (de) * | 2001-01-12 | 2002-07-25 | Infineon Technologies Ag | Verfahren zur Herstellung von eingebetteten nichtflüchtigen Halbleiterspeicherzellen |
DE10221884A1 (de) | 2002-05-16 | 2003-11-27 | Infineon Technologies Ag | Verfahren zum Herstellen einer Schicht-Anordnung, Schicht-Anordnung und Speicher-Anordnung |
US20030232507A1 (en) * | 2002-06-12 | 2003-12-18 | Macronix International Co., Ltd. | Method for fabricating a semiconductor device having an ONO film |
US7067439B2 (en) | 2002-06-14 | 2006-06-27 | Applied Materials, Inc. | ALD metal oxide deposition process using direct oxidation |
US6893920B2 (en) | 2002-09-12 | 2005-05-17 | Promos Technologies, Inc. | Method for forming a protective buffer layer for high temperature oxide processing |
US7279003B2 (en) * | 2003-04-24 | 2007-10-09 | Medtronic Vascular, Inc. | Stent graft tapered spring |
US8119210B2 (en) | 2004-05-21 | 2012-02-21 | Applied Materials, Inc. | Formation of a silicon oxynitride layer on a high-k dielectric material |
US7645710B2 (en) | 2006-03-09 | 2010-01-12 | Applied Materials, Inc. | Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system |
US7837838B2 (en) | 2006-03-09 | 2010-11-23 | Applied Materials, Inc. | Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus |
US7678710B2 (en) | 2006-03-09 | 2010-03-16 | Applied Materials, Inc. | Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system |
JP4936790B2 (ja) * | 2006-05-22 | 2012-05-23 | 株式会社東芝 | 半導体装置 |
KR20080002030A (ko) * | 2006-06-30 | 2008-01-04 | 삼성전자주식회사 | 비휘발성 메모리 장치의 게이트 구조물 형성 방법 |
JP5590886B2 (ja) | 2006-09-26 | 2014-09-17 | アプライド マテリアルズ インコーポレイテッド | 欠陥パシベーションのための高kゲート積層構造に対するフッ素プラズマ処理 |
KR100835430B1 (ko) * | 2007-05-21 | 2008-06-04 | 주식회사 동부하이텍 | 반도체 소자의 듀얼 게이트 전극 형성 방법 |
US7745344B2 (en) | 2007-10-29 | 2010-06-29 | Freescale Semiconductor, Inc. | Method for integrating NVM circuitry with logic circuitry |
US8436411B2 (en) * | 2009-01-06 | 2013-05-07 | United Microelectronics Corp. | Non-volatile memory |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3992701A (en) * | 1975-04-10 | 1976-11-16 | International Business Machines Corporation | Non-volatile memory cell and array using substrate current |
JPS577162A (en) * | 1980-06-17 | 1982-01-14 | Toshiba Corp | Nonvolatile semiconductor memory and manufacture therefor |
CA1188419A (en) * | 1981-12-14 | 1985-06-04 | Yung-Chau Yen | Nonvolatile multilayer gate semiconductor memory device |
US4477825A (en) * | 1981-12-28 | 1984-10-16 | National Semiconductor Corporation | Electrically programmable and erasable memory cell |
JPS5955071A (ja) * | 1982-09-24 | 1984-03-29 | Hitachi Micro Comput Eng Ltd | 不揮発性半導体装置 |
US4601939A (en) * | 1983-09-20 | 1986-07-22 | International Business Machines Corporation | Composite insulator structure |
US4698787A (en) * | 1984-11-21 | 1987-10-06 | Exel Microelectronics, Inc. | Single transistor electrically programmable memory device and method |
JPS61136274A (ja) * | 1984-12-07 | 1986-06-24 | Toshiba Corp | 半導体装置 |
JPS61212068A (ja) * | 1985-03-16 | 1986-09-20 | Sony Corp | 半導体装置 |
US4656729A (en) * | 1985-03-25 | 1987-04-14 | International Business Machines Corp. | Dual electron injection structure and process with self-limiting oxidation barrier |
US4683554A (en) * | 1985-09-13 | 1987-07-28 | Ncr Corporation | Direct write nonvolatile memory cells |
-
1987
- 1987-07-31 JP JP62191548A patent/JP2664685B2/ja not_active Expired - Fee Related
-
1988
- 1988-07-29 US US07/226,098 patent/US5063431A/en not_active Expired - Lifetime
- 1988-07-29 EP EP88112312A patent/EP0305741B1/de not_active Expired - Lifetime
- 1988-07-29 DE DE3888603T patent/DE3888603T2/de not_active Expired - Fee Related
- 1988-07-30 KR KR1019880009744A patent/KR910007377B1/ko not_active IP Right Cessation
-
1990
- 1990-11-14 US US07/612,466 patent/US5034798A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR910007377B1 (ko) | 1991-09-25 |
KR890003036A (ko) | 1989-04-12 |
DE3888603T2 (de) | 1994-08-04 |
EP0305741B1 (de) | 1994-03-23 |
JP2664685B2 (ja) | 1997-10-15 |
JPS6436077A (en) | 1989-02-07 |
US5063431A (en) | 1991-11-05 |
US5034798A (en) | 1991-07-23 |
EP0305741A3 (en) | 1990-05-16 |
EP0305741A2 (de) | 1989-03-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |