DE3686144D1 - Nichtfluechtiger halbleiterspeicher. - Google Patents

Nichtfluechtiger halbleiterspeicher.

Info

Publication number
DE3686144D1
DE3686144D1 DE8686307291T DE3686144T DE3686144D1 DE 3686144 D1 DE3686144 D1 DE 3686144D1 DE 8686307291 T DE8686307291 T DE 8686307291T DE 3686144 T DE3686144 T DE 3686144T DE 3686144 D1 DE3686144 D1 DE 3686144D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
volatile semiconductor
volatile
memory
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686307291T
Other languages
English (en)
Other versions
DE3686144T2 (de
Inventor
Yoshio Hirai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Publication of DE3686144D1 publication Critical patent/DE3686144D1/de
Application granted granted Critical
Publication of DE3686144T2 publication Critical patent/DE3686144T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7883Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
DE8686307291T 1985-10-15 1986-09-23 Nichtfluechtiger halbleiterspeicher. Expired - Lifetime DE3686144T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60229403A JPS6288368A (ja) 1985-10-15 1985-10-15 半導体不揮発性メモリ

Publications (2)

Publication Number Publication Date
DE3686144D1 true DE3686144D1 (de) 1992-08-27
DE3686144T2 DE3686144T2 (de) 1992-12-17

Family

ID=16891661

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686307291T Expired - Lifetime DE3686144T2 (de) 1985-10-15 1986-09-23 Nichtfluechtiger halbleiterspeicher.

Country Status (4)

Country Link
US (1) US5126809A (de)
EP (1) EP0228761B1 (de)
JP (1) JPS6288368A (de)
DE (1) DE3686144T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01248670A (ja) * 1988-03-30 1989-10-04 Toshiba Corp 不揮発性半導体記憶装置ならびにその動作方法および製造方法
US5268319A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
US4989053A (en) * 1989-03-27 1991-01-29 Shelton Everett K Nonvolatile process compatible with a digital and analog double level metal MOS process
WO1990016085A1 (en) * 1989-06-21 1990-12-27 Xicor, Inc. Apparatus and method for a dual thickness dielectric floating gate memory cell
JPH0393276A (ja) * 1989-09-05 1991-04-18 Toshiba Micro Electron Kk 半導体記憶装置及びその製造方法
BE1004424A3 (nl) * 1991-01-31 1992-11-17 Imec Inter Uni Micro Electr Transistorstruktuur voor uitwisbare en programmeerbare geheugens.
US5583810A (en) * 1991-01-31 1996-12-10 Interuniversitair Micro-Elektronica Centrum Vzw Method for programming a semiconductor memory device
US6243293B1 (en) 1992-01-29 2001-06-05 Interuniversitair Micro-Elektronica Centrum Contacted cell array configuration for erasable and programmable semiconductor memories
US6009013A (en) * 1992-01-29 1999-12-28 Interuniversitair Micro-Elektronica Centrum Vzw Contactless array configuration for semiconductor memories
US5331189A (en) * 1992-06-19 1994-07-19 International Business Machines Corporation Asymmetric multilayered dielectric material and a flash EEPROM using the same
JP3404064B2 (ja) * 1993-03-09 2003-05-06 株式会社日立製作所 半導体装置及びその製造方法
KR970003845B1 (ko) * 1993-10-28 1997-03-22 금성일렉트론 주식회사 이이피롬 프래쉬 메모리 셀, 메모리 디바이스 및 그 제조방법
JP3289748B2 (ja) * 1993-11-30 2002-06-10 直 柴田 半導体装置
KR0136932B1 (ko) * 1994-07-30 1998-04-24 문정환 반도체 소자 및 그의 제조방법
US5818082A (en) * 1996-03-04 1998-10-06 Advanced Micro Devices, Inc. E2 PROM device having erase gate in oxide isolation region in shallow trench and method of manufacture thereof
US5793079A (en) * 1996-07-22 1998-08-11 Catalyst Semiconductor, Inc. Single transistor non-volatile electrically alterable semiconductor memory device
JP5503843B2 (ja) * 2007-12-27 2014-05-28 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置及びその製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4099196A (en) * 1977-06-29 1978-07-04 Intel Corporation Triple layer polysilicon cell
DE3007892C2 (de) * 1980-03-01 1982-06-09 Deutsche Itt Industries Gmbh, 7800 Freiburg Floating-Gate-Speicherzelle
EP0052982B1 (de) * 1980-11-20 1986-08-13 Kabushiki Kaisha Toshiba Halbleiterspeicheranordnung und Herstellungsverfahren
JPS57157573A (en) * 1981-03-25 1982-09-29 Fujitsu Ltd Semiconductor non-volatile memory cell

Also Published As

Publication number Publication date
US5126809A (en) 1992-06-30
EP0228761B1 (de) 1992-07-22
EP0228761A1 (de) 1987-07-15
JPS6288368A (ja) 1987-04-22
DE3686144T2 (de) 1992-12-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee