DE3687322D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number
DE3687322D1
DE3687322D1 DE8686110330T DE3687322T DE3687322D1 DE 3687322 D1 DE3687322 D1 DE 3687322D1 DE 8686110330 T DE8686110330 T DE 8686110330T DE 3687322 T DE3687322 T DE 3687322T DE 3687322 D1 DE3687322 D1 DE 3687322D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
memory arrangement
arrangement
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686110330T
Other languages
English (en)
Other versions
DE3687322T2 (de
Inventor
Kazunori Furusawa
Shinji Nabetani
Yoshiaki Kamigaki
Masaaki Terasawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi ULSI Engineering Corp
Hitachi Ltd
Original Assignee
Hitachi ULSI Engineering Corp
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP60164099A external-priority patent/JPS6226697A/ja
Priority claimed from JP18424585A external-priority patent/JPH0799633B2/ja
Application filed by Hitachi ULSI Engineering Corp, Hitachi Ltd filed Critical Hitachi ULSI Engineering Corp
Application granted granted Critical
Publication of DE3687322D1 publication Critical patent/DE3687322D1/de
Publication of DE3687322T2 publication Critical patent/DE3687322T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
DE8686110330T 1985-07-26 1986-07-24 Halbleiterspeicheranordnung. Expired - Fee Related DE3687322T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60164099A JPS6226697A (ja) 1985-07-26 1985-07-26 半導体記憶装置
JP18424585A JPH0799633B2 (ja) 1985-08-23 1985-08-23 Ｅｅｐｒｏｍ装置

Publications (2)

Publication Number Publication Date
DE3687322D1 true DE3687322D1 (de) 1993-02-04
DE3687322T2 DE3687322T2 (de) 1993-05-27

Family

ID=26489325

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686110330T Expired - Fee Related DE3687322T2 (de) 1985-07-26 1986-07-24 Halbleiterspeicheranordnung.

Country Status (6)

Country Link
US (1) US4769787A (de)
EP (1) EP0209912B1 (de)
KR (1) KR940011426B1 (de)
DE (1) DE3687322T2 (de)
HK (1) HK103695A (de)
SG (1) SG25395G (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159688A (ja) * 1984-08-31 1986-03-27 Hitachi Ltd 半導体集積回路装置
JPH081759B2 (ja) * 1987-11-24 1996-01-10 株式会社東芝 不揮発性メモリ
JPH01158777A (ja) * 1987-12-15 1989-06-21 Sony Corp フローティングゲート型不揮発性メモリ
US5253200A (en) * 1987-12-15 1993-10-12 Sony Corporation Electrically erasable and programmable read only memory using stacked-gate cell
KR930000963B1 (ko) * 1988-03-09 1993-02-11 가부시기가이샤 도오시바 불휘발성 메모리 회로장치
JPH0271499A (ja) * 1988-09-06 1990-03-12 Hitachi Ltd 半導体記憶装置
JP2573335B2 (ja) * 1988-11-09 1997-01-22 株式会社東芝 不揮発性メモリ
JPH0738274B2 (ja) * 1988-12-22 1995-04-26 株式会社東芝 不揮発性半導体メモリシステム
JPH04123471A (ja) 1990-09-14 1992-04-23 Oki Electric Ind Co Ltd 半導体記憶装置のデータ書込みおよび消去方法
DE4133490C2 (de) * 1991-10-09 1999-06-10 Texas Instruments Deutschland Verfahren zum Betreiben einer mit einer Versorgungsspannung gespeisten integrierten Halbleiterspeichervorrichtung mit zeilen- und spaltenweise angeordneten Speicherzellen
US5761127A (en) * 1991-11-20 1998-06-02 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability
EP0954102A1 (de) * 1991-12-09 1999-11-03 Fujitsu Limited Exklusiv-NOR-Gatter
JP2822791B2 (ja) * 1992-06-30 1998-11-11 日本電気株式会社 半導体装置
KR100354406B1 (ko) * 1992-11-02 2002-12-26 엔브이엑스코포레이션 플래시메모리장치,및이의제조및사용방법
US5644533A (en) * 1992-11-02 1997-07-01 Nvx Corporation Flash memory system, and methods of constructing and utilizing same
US5557569A (en) * 1993-10-12 1996-09-17 Texas Instruments Incorporated Low voltage flash EEPROM C-cell using fowler-nordheim tunneling
US5511026A (en) * 1993-12-01 1996-04-23 Advanced Micro Devices, Inc. Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories
US5789776A (en) * 1995-09-22 1998-08-04 Nvx Corporation Single poly memory cell and array
JP3223877B2 (ja) * 1998-03-27 2001-10-29 日本電気株式会社 半導体記憶装置
JP3874234B2 (ja) * 2000-04-06 2007-01-31 株式会社ルネサステクノロジ 半導体集積回路装置
US6844588B2 (en) 2001-12-19 2005-01-18 Freescale Semiconductor, Inc. Non-volatile memory
US8072834B2 (en) 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation
US7859925B1 (en) 2006-03-31 2010-12-28 Cypress Semiconductor Corporation Anti-fuse latch self-test circuit and method
US7859906B1 (en) 2007-03-30 2010-12-28 Cypress Semiconductor Corporation Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit
US8059458B2 (en) * 2007-12-31 2011-11-15 Cypress Semiconductor Corporation 3T high density nvDRAM cell
US8036032B2 (en) 2007-12-31 2011-10-11 Cypress Semiconductor Corporation 5T high density NVDRAM cell
US8064255B2 (en) * 2007-12-31 2011-11-22 Cypress Semiconductor Corporation Architecture of a nvDRAM array and its sense regime
IT1400968B1 (it) 2010-06-15 2013-07-05 St Microelectronics Srl Dispositivo di memoria non-volatile con scarica controllata
IT1400967B1 (it) * 2010-06-15 2013-07-05 St Microelectronics Srl Dispositivo di memoria non volatile con circuito di riconnessione

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55156370A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Manufacture of semiconductor device
JPS5835783A (ja) * 1981-08-24 1983-03-02 Fujitsu Ltd 半導体メモリ
JPS5955071A (ja) * 1982-09-24 1984-03-29 Hitachi Micro Comput Eng Ltd 不揮発性半導体装置

Also Published As

Publication number Publication date
KR940011426B1 (ko) 1994-12-15
DE3687322T2 (de) 1993-05-27
HK103695A (en) 1995-07-07
EP0209912A2 (de) 1987-01-28
EP0209912B1 (de) 1992-12-23
US4769787A (en) 1988-09-06
KR870001664A (ko) 1987-03-17
SG25395G (en) 1995-09-01
EP0209912A3 (en) 1989-02-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee