DE3586556D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number
DE3586556D1
DE3586556D1 DE8585401994T DE3586556T DE3586556D1 DE 3586556 D1 DE3586556 D1 DE 3586556D1 DE 8585401994 T DE8585401994 T DE 8585401994T DE 3586556 T DE3586556 T DE 3586556T DE 3586556 D1 DE3586556 D1 DE 3586556D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
memory arrangement
arrangement
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585401994T
Other languages
English (en)
Other versions
DE3586556T2 (de
Inventor
Yoshihiro Takemae
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE3586556D1 publication Critical patent/DE3586556D1/de
Application granted granted Critical
Publication of DE3586556T2 publication Critical patent/DE3586556T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Shift Register Type Memory (AREA)
DE8585401994T 1984-10-15 1985-10-15 Halbleiterspeicheranordnung. Expired - Fee Related DE3586556T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59215866A JPS6194290A (ja) 1984-10-15 1984-10-15 半導体メモリ

Publications (2)

Publication Number Publication Date
DE3586556D1 true DE3586556D1 (de) 1992-10-01
DE3586556T2 DE3586556T2 (de) 1993-01-14

Family

ID=16679564

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585401994T Expired - Fee Related DE3586556T2 (de) 1984-10-15 1985-10-15 Halbleiterspeicheranordnung.

Country Status (5)

Country Link
US (1) US4879685A (de)
EP (1) EP0178994B1 (de)
JP (1) JPS6194290A (de)
KR (1) KR860003604A (de)
DE (1) DE3586556T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5197033A (en) * 1986-07-18 1993-03-23 Hitachi, Ltd. Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
JP2569010B2 (ja) * 1986-05-21 1997-01-08 株式会社日立製作所 半導体メモリ
JPS62287497A (ja) * 1986-06-06 1987-12-14 Fujitsu Ltd 半導体記憶装置
US5245579A (en) * 1989-11-24 1993-09-14 Sharp Kabushiki Kaisha Semiconductor memory device
EP0446847B1 (de) * 1990-03-12 1998-06-17 Nec Corporation Halbleiterspeicheranordnung mit einem verbesserten Schreibmodus
JP2863012B2 (ja) * 1990-12-18 1999-03-03 三菱電機株式会社 半導体記憶装置
US5307314A (en) * 1991-07-15 1994-04-26 Micron Technology, Inc. Split read/write dynamic random access memory
JPH05113929A (ja) * 1991-10-22 1993-05-07 Mitsubishi Electric Corp マイクロコンピユータ
US5506814A (en) * 1993-05-28 1996-04-09 Micron Technology, Inc. Video random access memory device and method implementing independent two WE nibble control
US5625601A (en) * 1994-04-11 1997-04-29 Mosaid Technologies Incorporated DRAM page copy method
US5715423A (en) * 1994-04-18 1998-02-03 Intel Corporation Memory device with an internal data transfer circuit
US5544306A (en) * 1994-05-03 1996-08-06 Sun Microsystems, Inc. Flexible dram access in a frame buffer memory and system
US5440517A (en) * 1994-08-15 1995-08-08 Micron Technology, Inc. DRAMs having on-chip row copy circuits for use in testing and video imaging and method for operating same
KR100232895B1 (ko) * 1996-12-31 1999-12-01 김영환 센스앰프 인에이블 신호 발생 장치
US6023434A (en) 1998-09-02 2000-02-08 Micron Technology, Inc. Method and apparatus for multiple row activation in memory devices
EP1637833B1 (de) * 2004-09-20 2007-07-18 Weatherford/Lamb, Inc. Durchmesser Messgeräte
US20140177347A1 (en) * 2012-12-20 2014-06-26 Advanced Micro Devices, Inc. Inter-row data transfer in memory devices
US11200944B2 (en) 2017-12-21 2021-12-14 SK Hynix Inc. Semiconductor memory apparatus operating in a refresh mode and method for performing the same
KR20190075341A (ko) * 2017-12-21 2019-07-01 에스케이하이닉스 주식회사 반도체 메모리 장치

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3898632A (en) * 1974-07-15 1975-08-05 Sperry Rand Corp Semiconductor block-oriented read/write memory
US4162541A (en) * 1977-02-17 1979-07-24 Xerox Corporation Apparatus for overscribing binary data of a selected polarity into a semiconductor store
US4193127A (en) * 1979-01-02 1980-03-11 International Business Machines Corporation Simultaneous read/write cell
JPS5641574A (en) * 1979-09-07 1981-04-18 Nec Corp Memory unit
JPS6030151B2 (ja) * 1979-10-19 1985-07-15 松下電子工業株式会社 固体撮像装置
JPS5694589A (en) * 1979-12-27 1981-07-31 Nec Corp Memory device
JPS5727477A (en) * 1980-07-23 1982-02-13 Nec Corp Memory circuit
US4412313A (en) * 1981-01-19 1983-10-25 Bell Telephone Laboratories, Incorporated Random access memory system having high-speed serial data paths
JPS58121195A (ja) * 1982-01-13 1983-07-19 Nec Corp プリチヤ−ジ信号発生回路
JPS5938791A (ja) * 1982-08-30 1984-03-02 株式会社東芝 画像表示装置
JPS5960480A (ja) * 1982-09-29 1984-04-06 フアナツク株式会社 デイスプレイ装置
JPS59180871A (ja) * 1983-03-31 1984-10-15 Fujitsu Ltd 半導体メモリ装置
US4639890A (en) * 1983-12-30 1987-01-27 Texas Instruments Incorporated Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers
US4688197A (en) * 1983-12-30 1987-08-18 Texas Instruments Incorporated Control of data access to memory for improved video system
JPS60224191A (ja) * 1984-04-20 1985-11-08 Hitachi Ltd ダイナミツク型ｒａｍ

Also Published As

Publication number Publication date
JPS6194290A (ja) 1986-05-13
US4879685A (en) 1989-11-07
EP0178994A2 (de) 1986-04-23
EP0178994B1 (de) 1992-08-26
KR860003604A (ko) 1986-05-28
EP0178994A3 (en) 1988-08-24
DE3586556T2 (de) 1993-01-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee