DE3680562D1 - Halbleiterspeicheranordnung. - Google Patents
Halbleiterspeicheranordnung.Info
- Publication number
- DE3680562D1 DE3680562D1 DE8686104534T DE3680562T DE3680562D1 DE 3680562 D1 DE3680562 D1 DE 3680562D1 DE 8686104534 T DE8686104534 T DE 8686104534T DE 3680562 T DE3680562 T DE 3680562T DE 3680562 D1 DE3680562 D1 DE 3680562D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- memory arrangement
- arrangement
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60071036A JPS61239493A (ja) | 1985-04-05 | 1985-04-05 | 半導体記憶装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3680562D1 true DE3680562D1 (de) | 1991-09-05 |
Family
ID=13448893
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686104534T Expired - Fee Related DE3680562D1 (de) | 1985-04-05 | 1986-04-03 | Halbleiterspeicheranordnung. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4740926A (de) |
EP (1) | EP0197505B1 (de) |
JP (1) | JPS61239493A (de) |
KR (1) | KR910009441B1 (de) |
DE (1) | DE3680562D1 (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS629590A (ja) * | 1985-07-08 | 1987-01-17 | Nec Corp | 増幅回路 |
US5197033A (en) | 1986-07-18 | 1993-03-23 | Hitachi, Ltd. | Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions |
JPS63146293A (ja) * | 1986-12-09 | 1988-06-18 | Toshiba Corp | 半導体記憶装置 |
JPH07107797B2 (ja) * | 1987-02-10 | 1995-11-15 | 三菱電機株式会社 | ダイナミツクランダムアクセスメモリ |
JPH01119984A (ja) * | 1987-10-31 | 1989-05-12 | Toshiba Corp | ダイナミック型半導体メモリ |
US5007022A (en) * | 1987-12-21 | 1991-04-09 | Texas Instruments Incorporated | Two-port two-transistor DRAM |
US4845675A (en) * | 1988-01-22 | 1989-07-04 | Texas Instruments Incorporated | High-speed data latch with zero data hold time |
US4926383A (en) * | 1988-02-02 | 1990-05-15 | National Semiconductor Corporation | BiCMOS write-recovery circuit |
US4975879A (en) * | 1989-07-17 | 1990-12-04 | Advanced Micro Devices, Inc. | Biasing scheme for FIFO memories |
JP2825291B2 (ja) * | 1989-11-13 | 1998-11-18 | 株式会社東芝 | 半導体記憶装置 |
GB9007791D0 (en) | 1990-04-06 | 1990-06-06 | Foss Richard C | High voltage boosted wordline supply charge pump and regulator for dram |
US5214602A (en) * | 1990-04-06 | 1993-05-25 | Mosaid Inc. | Dynamic memory word line driver scheme |
US5751643A (en) * | 1990-04-06 | 1998-05-12 | Mosaid Technologies Incorporated | Dynamic memory word line driver |
GB9007790D0 (en) | 1990-04-06 | 1990-06-06 | Lines Valerie L | Dynamic memory wordline driver scheme |
KR950008672B1 (ko) * | 1990-06-04 | 1995-08-04 | 니뽄 덴끼 가부시끼가이샤 | 입/출력 라인사이에서 전위차를 억제하기 위한 클램핑 회로를 구비한 반도체 메모리 장치 |
KR920022301A (ko) * | 1991-05-28 | 1992-12-19 | 김광호 | 반도체 기억장치 |
US5304874A (en) * | 1991-05-31 | 1994-04-19 | Thunderbird Technologies, Inc. | Differential latching inverter and random access memory using same |
US5305269A (en) * | 1991-05-31 | 1994-04-19 | Thunderbird Technologies, Inc. | Differential latching inverter and random access memory using same |
JPH06162776A (ja) * | 1992-11-18 | 1994-06-10 | Nec Corp | 半導体メモリ回路 |
KR100869341B1 (ko) * | 2007-04-02 | 2008-11-19 | 주식회사 하이닉스반도체 | 반도체 메모리 소자와 그의 구동 방법 |
JP6781301B1 (ja) * | 2019-06-17 | 2020-11-04 | ウィンボンド エレクトロニクス コーポレーション | 半導体記憶装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3949385A (en) * | 1974-12-23 | 1976-04-06 | Ibm Corporation | D.C. Stable semiconductor memory cell |
DE2657561B1 (de) * | 1976-12-18 | 1978-04-13 | Ibm Deutschland | Nachlade-Referenzschaltungsanordnung fuer einen Halbleiterspeicher |
DE2712735B1 (de) * | 1977-03-23 | 1978-09-14 | Ibm Deutschland | Lese-/Schreibzugriffschaltung zu Speicherzellen eines Speichers und Verfahren zu ihrem Betrieb |
US4162416A (en) * | 1978-01-16 | 1979-07-24 | Bell Telephone Laboratories, Incorporated | Dynamic sense-refresh detector amplifier |
US4247917A (en) * | 1979-08-27 | 1981-01-27 | Intel Corporation | MOS Random-access memory |
US4370737A (en) * | 1980-02-11 | 1983-01-25 | Fairchild Camera And Instrument Corporation | Sense amplifier and sensing methods |
JPS59132492A (ja) * | 1982-12-22 | 1984-07-30 | Fujitsu Ltd | 半導体記憶装置 |
JPS6180593A (ja) * | 1984-09-26 | 1986-04-24 | Hitachi Ltd | ダイナミツク型ram |
-
1985
- 1985-04-05 JP JP60071036A patent/JPS61239493A/ja active Granted
-
1986
- 1986-03-24 US US06/843,356 patent/US4740926A/en not_active Expired - Lifetime
- 1986-03-27 KR KR1019860002305A patent/KR910009441B1/ko not_active IP Right Cessation
- 1986-04-03 EP EP86104534A patent/EP0197505B1/de not_active Expired - Lifetime
- 1986-04-03 DE DE8686104534T patent/DE3680562D1/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR860008559A (ko) | 1986-11-17 |
EP0197505A3 (en) | 1988-07-27 |
JPS61239493A (ja) | 1986-10-24 |
KR910009441B1 (ko) | 1991-11-16 |
JPH0518198B2 (de) | 1993-03-11 |
EP0197505A2 (de) | 1986-10-15 |
US4740926A (en) | 1988-04-26 |
EP0197505B1 (de) | 1991-07-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |