KR970054334A - 박막트랜지스터 및 그의 제조방법 - Google Patents

박막트랜지스터 및 그의 제조방법 Download PDF

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KR970054334A
KR970054334A KR1019950056315A KR19950056315A KR970054334A KR 970054334 A KR970054334 A KR 970054334A KR 1019950056315 A KR1019950056315 A KR 1019950056315A KR 19950056315 A KR19950056315 A KR 19950056315A KR 970054334 A KR970054334 A KR 970054334A
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gate electrode
layer
thin film
film transistor
active layer
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KR1019950056315A
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KR100205442B1 (ko
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양해창
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문정환
Lg 반도체 주식회사
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Priority to US08/634,037 priority patent/US5637884A/en
Priority to JP8294653A priority patent/JPH09186341A/ja
Priority to US08/808,166 priority patent/US5811324A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 박막트랜지스터 및 그의 제조방법에 관한 것으로, 구체적으로는 온 커렌트(On Current)를 증가시켜서 온/오프 커렌트비와 값을 향상시키도록 한 듀얼채널 구조의 박막트랜지스터 및 그의 제조방법에 관한 것이다.
이를 위한 본 발명의 박막트랜지스터는 기판상에 형성된 제1활성층, 제1활성층의 중앙부와 기판상에 형성되고 양측면, 상부면, 그리고 상기 제1활성층의 중앙부와 접하는 하부면을 가지는 게이트 전극, 제1활성층과 전기적으로 연결되고 게이트 전극의 양측면 및 상부면에 형성된 제2활성층, 게이트 전극의 양측면의 제1 및 제2활성층에 형성된 불순물 영역을 포함하는 것을 특징으로 하고, 본 발명의 박막트랜지스터의 제조방법은 기판상에 패턴화된 임의층을 형성하는 공정, 상기 임의층과 교차되도록 상기 기판 및 임의층상에 게이트 전극을 형성하는 공정, 상기 임의층을 제거하는 공정, 상기 임의층이 제거된 부분을 포함한 상기 게이트 전극의 표면에 게이트 절연막을 형성하는 공정, 상기 게이트 전극과 교차되도록 기판 및 임의층이 제거된 게이트 전극의 하부, 그리고 게이트 전극의 상부에 활성층을 형성하는 공정, 상기 게이트 전극 양측의 활성층에 불순물 영역을 형성하는 공정으로 이루어진다.

Description

박막트랜지스터 및 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도 (a) 및 제2도 (b)는 본원 발명의 박막트랜지스터의 단면도 및 사시도.

Claims (14)

  1. 기판상에 형성된 제1활성층, 제1활성층의 중앙부와 기판상에 형성되고 양측면, 상부면, 그리고 상기 제1활성층의 중앙부와 접하는 하부면을 가지는 게이트 전극, 제1활성층과 전기적으로 연결되고 게이트 전극의 양측면 및 상부면에 형성된 제2활성층, 게이트 전극의 양측면의 제1 및 제2활성층에 형성된 불순물 영역을 포함하는 박막트랜지스터.
  2. 제1항에 있어서, 제1 및 제2활성층은 보다 다결정 실리콘을 포함하는 것을 특징으로 하는 박막 트랜지스터.
  3. 제2항에 있어서, 다결정 실리콘은 P형임을 특징으로 하는 박막트랜지스터.
  4. 제1항에 있어서, 게이트 전극의 하부면에 대응되는 제1활성층에 형성되는 제1채널영역과 게이트 전극의 상부면에 대응되는 제2활성층에 형성되는 제2채널영역을 더 포함하는 것을 특징으로 하는 박막트랜지스터.
  5. 제1항에 있어서, 게이트 전극의 일측면의 제1 및 제2활성층에 형성되고 게이트 전극과 불순물 영역 사이에 위치하는 오프셋 영역을 더 포함하는 것을 특징으로 하는 박막트랜지스터.
  6. 제1항에 있어서, 상기 게이트 전극은 다결정 실리콘을 포함함을 특징으로 하는 박막트랜지스터.
  7. 기판상에 패턴화된 임의층을 형성하는 공정, 상기 임의층과 교차되도록 상기 기판 및 임의층상에 게이트 전극을 형성하는 공정, 상기 임의층을 제거하는 공정, 상기 임의층이 제거된 부분을 포함한 상기 게이트 전극의 표면에 게이트 절연막을 형성하는 공정, 상기 게이트 전극과 교차되도록 기판 및 임의층이 제거된 게이트 전극의 하부, 그리고 게이트 전극의 상부에 활성층을 형성하는 공정, 상기 게이트 전극 양측의 활성층에 불순물 영역을 형성하는 공정을 포함함을 특징으로 하는 박막트랜지스터의 제조방법.
  8. 제7항에 있어서, 상기 임의층과 상기 게이트 전극은 식각비가 상이함을 특징으로 하는 박막트랜지스터의 제조방법.
  9. 제7항에 있어서, 상기 게이트 전극은 다결정 실리콘층으로 형성됨을 특징으로 하는 박막트랜지스터의 제조방법.
  10. 제7항에 있어서, 상기 활성층은 보디 다결정 실리콘층으로 형성됨을 특징으로 하는 박막트랜지스터의 제조방법.
  11. 제10항에 있어서, 상기 보디 다결정 실리콘은 P형임을 특징으로 하는박막트랜지스터의 제조방법.
  12. 제7항에 있어서, 상기 임의층은 질화막으로 형성됨을 특징으로 하는 박막트랜지스터의 제조방법.
  13. 제7항에 있어서, 상기 게이트 전극 양측의 활성층에 불순물 영역을 형성하는 공정은 경사이온 주입을 포함함을 특징으로 하는 박막트랜지스터의 제조방법.
  14. 제7항에 있어서, 상기 게이트 전극 일측의 불순물 영역은 게이트 전극과 오버－랩되고 다른 일측의 불순물 영역은 상기 게이트 전극과 오프－셋 되도록 형성함을 특징으로 하는 박막 트랜지스터의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950056315A 1995-12-26 1995-12-26 박막트랜지스터 및 그의 제조방법 KR100205442B1 (ko)

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Application Number Priority Date Filing Date Title
KR1019950056315A KR100205442B1 (ko) 1995-12-26 1995-12-26 박막트랜지스터 및 그의 제조방법
US08/634,037 US5637884A (en) 1995-12-26 1996-04-17 Thin film transistor having increased on current
JP8294653A JPH09186341A (ja) 1995-12-26 1996-10-17 薄膜トランジスタ及びその製造方法
US08/808,166 US5811324A (en) 1995-12-26 1997-02-28 Method for manufacturing thin film transistor

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Application Number Priority Date Filing Date Title
KR1019950056315A KR100205442B1 (ko) 1995-12-26 1995-12-26 박막트랜지스터 및 그의 제조방법

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KR100205442B1 KR100205442B1 (ko) 1999-07-01

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US5637884A (en) 1997-06-10
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