KR20010089702A - 다층프린트배선판 및 다층프린트배선판의 제조 방법 - Google Patents
다층프린트배선판 및 다층프린트배선판의 제조 방법 Download PDFInfo
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- KR20010089702A KR20010089702A KR1020017008133A KR20017008133A KR20010089702A KR 20010089702 A KR20010089702 A KR 20010089702A KR 1020017008133 A KR1020017008133 A KR 1020017008133A KR 20017008133 A KR20017008133 A KR 20017008133A KR 20010089702 A KR20010089702 A KR 20010089702A
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0209—Inorganic, non-metallic particles
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
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Abstract
Description
Claims (25)
- 층간수지절연층과 도체층이 교호 적층되어, 각 도체층 간이 바이어홀로서 접속된 빌드업층이, 코어기판의 양면에 형성되어 되는 다층프린트배선판에 있어서,상기 코어기판 및 상기 코어기판의 양면에 형성된 층간수지절연층을 관통하도록 스루홀을 형성하고,상기 스루홀의 직상에 외부접속단자로 접속되는 바이어홀을 형성한 것을 특징으로 하는 다층프린트배선판.
- 제 1 항에 있어서, 상기 스루홀이, 내부에 충전제가 충전되 상기 충전제의 스루홀에서의 노출면을 덮는 도체층이 형성되고,상기 스루홀의 직상의 바이어홀이, 상기 스루홀의 상기 도체층 상에 형성되어 있는 것을 특징으로 하는 다층프린트배선판.
- (a) 코어기판의 양면에 하층층간수지절연층을 형성하는 공정,(b) 상기 코어기판 및 상기 하층층간수지절연층을 관통하는 스루홀을 형성하는 공정,(c) 상기 하층층간수지절연층 상에 상층층간수지절연층을 형성하는 공정,(d) 상기 상층층간수지절연층에 바이어홀을 형성하는 공정에 있어서, 상기 스루홀의 일부의 직상에 외부접속단자로 접속되는 바이어홀을 형성하는 공정;
- (a) 코어기판의 양면에 하층층간수지절연층을 형성하는 공정,(b) 상기 코어기판 및 상기 하층층간수지절연층을 관통하는 스루홀을 형성하는 공정,(c) 상기 스루홀에 충전제를 충전하는 공정,(d) 상기 스루홀에서 넘친 충전제를 연마하여 평탄하게 하는 공정,(e) 상기 충전제의 상기 스루홀로부터의 노출면을 덮는 도체층을 형성하는 공정,(f) 상기 하층층간수지절연층 상에 상층층간수지절연층을 형성하는 공정,(g) 상기 상층층간수지절연층에 바이어홀을 형성하는 공정에 있어, 상기 스루홀의 일부의 직상에 외부접속단자로 접속되는 바이어홀을 형성하는 공정;을 적어도 구비하는 것을 특징으로 하는 다층프린트배선판의 제조 방법
- 코어기판의 양면에 층간절연층을 형성하고, 상기 기판을 관통하는 스루홀이 실시되어, 수지충전재가 충전되며, 또 층간절연층과 도체회로가 적층되어 있는 다층프린트배선에 있어서,상기 수지충전재에는, 에폭시수지, 경화제, 무기입자가 10 ~ 50 % 배합되어있는 것을 특징으로 하는 다층프린트배선판.
- 코어기판의 양면에 층간절연층을 형성하고, 상기 기판을 관통하는 스루홀이실시되어, 수지충전재가 충전되며, 커버 도금이 시행되어지고, 또 층간절연층과 도체회로가 적층되어 있는 다층프린트배선판에 있어서,상기 수지충전재에는, 에폭시수지, 경화제, 무기입자가 10 ~ 50 % 배합되어있는 것을 특징으로 하는 다층프린트배선판.
- 제 6 항 또는 7 항에 있어서, 상기 무기입자는, 알루미늄 화합물, 칼륨 화합물, 칼륨 화합물, 마그네슘 화합물, 규소 화합물의 어느 한 종류 이상이 배합되어있는 것을 특징으로 하는 다층프린트배선판.
- 제 6 항 또는 7 항에 있어서, 상기 무기입자는, 구형, 원형, 타원형, 파쇄형, 다각형의 어느 것인 것을 특징으로 하는 다층프린트배선판.
- 제 6 항 내지 제 8 항 기재의 어느 한 항에 있어서, 상기 스루홀의 도체층에는 조화층이 시행되어져 있는 것을 특징으로 하는 프린트 배선판.
- 코어기판의 양면에 층간절연층이 형성된 프린트배선판에 있어서,(a) 표면을 관통하는 스루홀 형성 공정-(b) 에폭시수지, 무기입자가 10 ~ 50 % 배합되어 있는 수지충전제의 충전 공정-(c) 건조 공정, 연마 공정-(d) 경화 공정-(e) 커버도금 공정-;을 경유하여 층간절연층을 형성시키는 것을 특징으로 하는 다층프린트배선판의 제조 방법.
- 제 10 항에 있어서, 상기 (c)의 연마 공정에는, 버프 공정을 적어도 1 회 혹은 복수회 행하는 것을 특징으로 하는 프린트배선판의 제조 방법.
- 제 10 항 또는 11 항에 있어서, 상기 (a)의 공정에 있어서, 조화층을 형성하는 공정을 행하는 것을 특징으로 하는 프린트배선판의 제조 방법.
- 층간수지절연층과 도체층이 교호 적층되어, 각 도체층 간이 바이어홀로서 접속된 빌드업층이, 코어기판의 양면에 형성되어 되는 다층프린트배선판에 있어서,상기 코어기판 및 해 코어기판의 양면에 형성된 하층층간수지절연층을 관통하도록 수지충전재를 충전하여 되는 스루홀을 형성하고,상기 하층층간수지절연층에 상기의 수지충전재를 충전하여 되는 바이어홀을 형성한 것을 특징으로 하는 다층프린트배선판.
- 제 13 항에 있어서, 상기 하층층간수지절연층의 바이어홀에 충전된 수지충전제의 노출면을 덮는 도체층을 형성하고,상기 도체층을 개재하여 바이어홀의 직상에 바이어홀을 형성한 것을 특징으로 하는 다층프린트배선판.
- (a) 코어기판의 양면에 하층층간수지절연층을 형성하는 공정,(b) 상기 코어기판 및 상기 하층층간수지절연층에 스루홀이 되는 관통공을 형성하는 공정,(c) 상기 하층층간수지절연층에 바이어홀이 되는 개구를 형성하는 공정,(d) 상기 관통공 및 상기의 개구에 도전막을 형성하여, 스루홀 및 바이어홀로 하는 공정,(e) 상기의 스루홀 및 바이어홀 내에 수지충전재를 충전하는 공정,(f) 상기의 스루홀 및 바이어홀에서 넘친 수지충전제를 연마하여 평탄하게 하는 공정,(g) 상기의 수지충전제의 상기 스루홀 및 바이어홀으로부터의 노출면을 덮는 도체층을 형성하는 공정;을 적어도 구비하는 것을 특징으로 하는 다층프린트배선판의 제조 방법:.
- (a) 코어기판의 양면에 하층층간수지절연층을 형성하는 공정,(b) 상기 코어기판 및 상기의 하층층간수지절연층에 스루홀이 되는 관통공을 형성하는 공정,(c) 상기 하층층간수지절연층에 바이어홀이 되는 개구를 형성하는 공정,(d) 상기 관통공 및 상기의 개구에 도전막을 형성하고, 스루홀 및 바이어홀로 하는 공정,(e) 상기 스루홀 및 바이어홀내에 수지충전재를 충전하는 공정,(f) 상기 스루홀 및 바이어홀에서 넘친 수지충전제를 연마하여 평탄하게 하는 공정,(g) 상기 수지충전제의 상기 스루홀 및 바이어홀으로부터의 노출면을 덮는 도체층을 형성하는 공정.(h) 상기 하층층간수지절연층 상에 상층층간수지절연층을 형성하는 공정,(i) 상기 상층층간수지절연층에 바이어홀을 형성하는 공정으로서, 상기 바이어홀의 일부의 직상에 바이어홀을 형성하는 공정;을 적어도 구비하는 것을 특징으로 하는 다층프린트배선판의 제조 방법:
- (a) 코어기판의 양면에 하층층간수지절연층을 형성하는 공정,(b) 상기 코어기판 및 상기 하층층간수지절연층에 스루홀이 되는 관통공를 형성하는 공정,(c) 상기 하층층간수지절연층에 바이어홀이 되는 개구를 형성하는 공정,(d) 산 또는 산화제로 상기 관통공의 데스미어 처리를 행함과 동시에, 하층층간수지절연층 표면의 조화 처리를 행하는 공정,(e) 상기 관통공 및 상기의 개구에 도전막을 형성하고 , 스루홀 및 바이어홀로 하는 공정;을 적어도 구비하는 것을 특징으로 하는 다층프린트배선판의 제조 방법:
- 제 17 항에 있어서, 상기 코어기판이 글래스에폭시수지, FR 4, FR 5, BT 수지의 어느 하나로 되고,상기 하층층간수지절연층이, 에폭시수지, 페놀수지, 폴리이미드수지, 폴리페닐렌수지, 폴리오레핀수지, 불소수지 중에서 적어도 하나를 함유하여 되고,상기 산화제가, 크롬산, 또는 과망간산염의 어느 하나를 함유하는 것을 특징으로 하는 다층프린트배선판의 제조 방법.
- 제 17 항에 있어서, 상기 산은, 유산, 염산, 초산, 인산, 포름산 중에서 선택되어지는 한 종류 이상을 함유시키고 있는 것을 특징으로 하는 다층프린트배선판의 제조 방법.
- 제 17 항에 있어서, 상기 산화제는, 크롬산, 과망간염산의 어느 하나를 함유하는 것을 특징으로 하는 다층프린트배선판의 제조 방법.
- (a) 코어기판에 스루홀을 형성하는 공정:(b) 상기 스루홀에, 조화면을 형성하는 공정:(c) 상기 스루홀의 랜드의 표면을 연마하여 평탄하게 하는 공정:(d) 상기 스루홀 내에, 수지충전재를 충전하여 수지층을 형성하는 공정;을 적어도 구비하는 것을 특징으로 하는 다층프린트배선판의 제조 방법:.
- 제 21 항에 있어서, 상기 조화층은, 산화동층인 것을 특징으로 하는 다층프린트배선판의 제조 방법.
- 제 21 항에 있어서, 상기 조화층은, 에칭에 의하여 형성되어 있는 것을 특징으로 하는 다층프린트배선판의 제조 방법.
- 제 21 항에 있어서, 상기 조화층은, 동-니켈-인으로 된 침상합금층인 것을 특징으로 하는 다층프린트배선판의 제조 방법.
- 제 21 항 내지 제 24 항의 어느 한 항에 있어서, 상기 수지충전재는, 에폭시수지와 유기필러의 혼합물, 에폭시수지와 무기필러의 혼합물 및 에폭시수지와 무기 파이버의 혼합물의 중에서 선택되어지는 어느 하나인 것을 특징으로 하는 다층프린트배선판의 제조 방법.
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JP30330799A JP2001127436A (ja) | 1999-10-26 | 1999-10-26 | 多層プリント配線板の製造方法 |
JP???11-303306 | 1999-10-26 | ||
JP???11-303305 | 1999-10-26 | ||
JP???11-303307 | 1999-10-26 | ||
JP30330599A JP4832621B2 (ja) | 1999-10-26 | 1999-10-26 | 多層プリント配線板 |
JP30330699A JP2001127435A (ja) | 1999-10-26 | 1999-10-26 | 多層プリント配線板及び多層プリント配線板の製造方法 |
JP2000029988A JP2001223466A (ja) | 2000-02-08 | 2000-02-08 | プリント配線板の製造方法 |
JP??2000-029988 | 2000-02-08 |
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- 2000-10-10 EP EP00964763A patent/EP1162867B1/en not_active Expired - Lifetime
- 2000-10-10 WO PCT/JP2000/007037 patent/WO2001031984A1/ja active IP Right Grant
- 2000-10-10 KR KR1020017008133A patent/KR100833723B1/ko active IP Right Grant
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KR100833723B1 (ko) | 2008-05-29 |
CN1652662A (zh) | 2005-08-10 |
EP1672970A3 (en) | 2007-08-01 |
MY129285A (en) | 2007-03-30 |
US20080283282A1 (en) | 2008-11-20 |
US20060191708A1 (en) | 2006-08-31 |
US20050189136A1 (en) | 2005-09-01 |
TWI252723B (en) | 2006-04-01 |
EP1672970A2 (en) | 2006-06-21 |
WO2001031984A1 (fr) | 2001-05-03 |
DE60027141D1 (de) | 2006-05-18 |
DE60027141T2 (de) | 2006-12-28 |
EP1162867A1 (en) | 2001-12-12 |
US20120067633A1 (en) | 2012-03-22 |
US6930258B1 (en) | 2005-08-16 |
MY148600A (en) | 2013-05-15 |
EP1672970B1 (en) | 2011-06-08 |
EP1162867B1 (en) | 2006-04-05 |
US7999194B2 (en) | 2011-08-16 |
EP1162867A4 (en) | 2004-03-24 |
US7178234B2 (en) | 2007-02-20 |
US8822839B2 (en) | 2014-09-02 |
US8106310B2 (en) | 2012-01-31 |
CN100521868C (zh) | 2009-07-29 |
CN1327710A (zh) | 2001-12-19 |
US7795542B2 (en) | 2010-09-14 |
US20100006328A1 (en) | 2010-01-14 |
CN1199536C (zh) | 2005-04-27 |
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