KR19990088593A - 유전율이낮은수소화된옥시탄화규소막의제조방법 - Google Patents

유전율이낮은수소화된옥시탄화규소막의제조방법 Download PDF

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KR19990088593A
KR19990088593A KR1019990019173A KR19990019173A KR19990088593A KR 19990088593 A KR19990088593 A KR 19990088593A KR 1019990019173 A KR1019990019173 A KR 1019990019173A KR 19990019173 A KR19990019173 A KR 19990019173A KR 19990088593 A KR19990088593 A KR 19990088593A
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dielectric constant
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로보다마크존
사이퍼리제프리앨런
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맥켈러 로버트 루이스
다우 코닝 코포레이션
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Abstract

본 발명은 유전율이 낮은 수소화된 옥시탄화규소(H:SiOC) 막을 제조하는 방법이다. 본 발명의 방법은 플라즈마 증강되거나 오존 보조된 화학적 증착을 사용하여 메틸 함유 실란을 조절된 산소 환경하에 반응시켜 막을 제조함을 포함한다. 생성된 막은 반도체 장치를 제조하는 데 유용하며 유전율이 3.6 이하이다.

Description

유전율이 낮은 수소화된 옥시탄화규소 막의 제조방법{Method for producing hydrogenated silicon oxycarbide films having low dielectric constant}
규소 함유 물질로부터 반도체 장치 위에 SiO2, SiNC 또는 SiC 박막을 제조하기 위한 화학적 증착법(CVD)의 용도는 당해 분야에서 익히 공지되어 있다. 화학적 증착 공정은 통상적으로 기체상 규소 함유 물질과 반응성 기체를 반도체 기판을 함유하는 반응실로 도입시킴을 포함한다. 에너지 공급원(예: 열 또는 플라즈마)은 규소 함유 물질과 반응성 기체와의 반응을 유도하여 SiO2, SiNC 또는 SiC 박막을 반도체 장치 위에 증착시킨다. 플라즈마 증강 화학적 증착법(PECVD)은 통상적으로 낮은 온도(500℃ 미만)에서 수행되므로, PEVCD는 유전성 및 표면안정화 막(passivation film)을 반도체 장치 위에 제조하기 위한 적합한 수단이 된다.
이산화규소(SiO2), 비결정성 SiNC 및 탄화규소(SiC) 막을 화학적 증착으로 제조하기 위한 메틸 함유 실란의 용도는 당해 분야에서 공지되어 있다. 예를 들면, 미국 특허 제5,465,680호에는, 결정성 SiC 막을 제조하는 방법이 공지되어 있다. 이 방법은 기판을 600℃ 내지 1,000℃로 가열하고, 이어서 표준 화학적 증착 공정으로 기판을 트리메틸실란에 노출시킴을 포함한다. 유럽 특허원 제0 774 533호에는, 유기 규소 물질과 산소 공급원을 포함하는 반응성 기체 혼합물의 CVD로부터 SiO2피막을 제조하는 방법이 공지되어 있다. 유럽 특허원 제0 771 886호에는, 유기 규소 물질과 질소 공급원을 포함하는 반응성 기체 혼합물의 CVD로부터 SiNC 피막을 제조하는 방법이 공지되어 있다.
반도체 장치 구조물이 점점 더 소형화됨에 따라, 막의 보전성 뿐만 아니라 유전율이 중요해진다. 공지된 CVD 공정으로 제조한 막은 유전율이 높다(즉, 3.8 이상). 따라서, 유전율이 낮은 막을 생성시키는 공정과 물질이 요구되고 있다. 로우-케이 플로우필R(Low-k FlowfillR)로서 공지되어 있는 신규한 증착 공정은 유전율이 3.0 미만인 막을 제조한다. 이러한 방법은 메틸실란과 과산화수소 사이의 화학적 증착 반응을 사용하여 메틸 도핑된 산화규소 막을 제조한다[참조: S. McClatchie, K. Beekmann, A. Kiermasz, Low Dielectric Constant Oxide Films Deposited Using CVD Techniques, 1988 DUMIC Conference Proceedings, 2/98, p. 311-318]. 그러나, 이러한 공정은 비표준 CVD 시스템과 안정도가 보다 낮은 산소 공급원(과산화수소)의 사용을 필요로 하며 반도체 장치에서 바람직하지 않을 수 있는 부산물로서 물을 발생시킨다.
본 발명의 목적은 수소화된 옥시탄화규소의 유전율이 낮은 박막을 화학적 증착법으로 제조하는 방법을 제공하는 것이다.
본 발명은 유전율이 낮은 수소화된 옥시탄화규소(H:SiOC)의 박막을 기판, 바람직하게는 반도체 장치 위에 제조하는 방법에 관한 것이다. 이러한 방법은 메틸 함유 실란과 산소 공급 기체를 포함하는 반응 혼합물의 플라즈마 증강되거나 오존 증강된 화학적 증착법을 포함한다. 반응/증착 공정 도중에 사용되는 산소의 양을 조절함으로써 수소, 규소, 탄소 및 산소를 포함하는 막을 제조한다. 이러한 막은 통상적으로 유전율이 3.6 이하이며 중간층 유전체로서 특히 적합하다.
본 발명은 수소화된 옥시탄화규소 막을 기판, 바람직하게는 반도체 기판 위에 제조하는 방법에 관한 것이다. 막을 제조하는 방법은 알킬실란과 산소 공급 기체를 포함하는 반응성 기체 혼합물의 화학적 증착 반응을 포함하는데, 반응 도중에 존재하는 산소의 양이 조절된다. "반도체 기판"은, 촛점면 배열, 광전자 장치, 광전지, 광학 장치, 트랜지스터형 장치, 3-D 장치, 규소상 절연 장치 및 초격자 장치를 포함하는 반도체 성분을 제조하는 데 사용하고자 하는 규소계 장치와 비화갈륨계 장치를 포함하는 것으로 여겨진다. 반도체 기판은 임의의 금속 배선의 적용 이전에, 배선 또는 집적 회로의 하나 이상의 층을 갖는 웨이퍼 단계에서 집적 회로를 포함하는 것이 바람직하다.
본 발명에서 제조한 수소화된 옥시탄화규소 막은 화학식 SiWOxCyHz의 화합물(여기서, w는 10 내지 33원자%, 바람직하게는 18 내지 20원자%의 값을 가지고, x는 1 내지 66원자%, 바람직하게는 18 내지 21원자%의 값을 가지며, y는 1 내지 66원자%, 바람직하게는 31 내지 38원자%의 값을 가지고, z는 0.1 내지 60원자%, 바람직하게는 25 내지 32원자%의 값을 가지며, w+x+y+z는 100원자%이다)로 나타낸다.
수소화된 옥시탄화규소 막은 메틸 함유 실란과 산소 공급 기체를 포함하는 반응성 기체 혼합물로부터 제조된다. 본 발명에서 유용한 메틸 함유 실란은 메틸실란(CH3SiH3), 디메틸실란((CH3)2SiH2), 트리메틸실란((CH3)3SiH) 및 테트라메틸실란 ((CH3)4Si), 바람직하게는 트리메틸실란을 포함한다.
조절된 양의 산소는 증착실 속에 존재한다. 산소는 사용된 산소 공급 기체의 형태로 조절하거나 사용된 산소 공급 기체의 양으로 조절할 수 있다. 너무나 많은 산소가 증착실 속에 존재하는 경우, 화학량론이 SiO2에 근접한 산화규소 막이 제조되며 유전율은 목적하는 값 이상일 것이다. 산소 공급 기체의 예는 공기, 오존, 산소, 아산화질소 및 산화질소, 바람직하게는 아산화질소이다. 산소 공급 기체의 양은 통상적으로 메틸 함유 실란 1용적부당 산소 공급 기체 5용적부 미만, 보다 바람직하게는 메틸 함유 실란 1용적부당 산소 공급 기체 0.1 내지 4.5용적부이다. 당해 분야의 숙련가는 산소 공급 기체의 형태와 증착 조건을 기준으로 하여, 산소 공급 기체의 양을 용이하게 결정할 수 있을 것이다.
기타 물질이 반응성 기체 혼합물 속에 존재할 수 있다. 예를 들면, 캐리어 가스(예: 헬륨 또는 아르곤), 도판트(예: 포스핀 또는 디보란), 할로겐(예: 불소), 또는 막에 대해 추가의 바람직한 특성을 제공하는 임의의 기타 물질이 존재할 수 있다.
반응성 기체 혼합물은 기판, 바람직하게는 반도체 기판을 함유하는 증착실로 도입되는데, 메틸 함유 실란과 산소 공급 기체와의 반응이 수행되어, 수소, 규소, 탄소 및 산소를 포함하고 유전율이 3.6 이하인 막이 기판 위에 증착된다. 기판 온도가 500℃ 미만인 임의의 화학적 증착법(CVD)을 사용할 수 있다. 온도가 500℃ 이상인 경우에는, 통상적으로 반도체 기판, 특히 알루미늄 배선을 갖는 반도체 기판에 대해 적합하지 않다. 플라즈마 증강된 화학적 증착법(RECVD)이 바람직한데, 이는 사용할 수 있는 낮은 온도와 산업에서의 이의 광범위한 용도 때문이다. 또한, 오존 증강된 CVD를 사용할 수 있다.
PECVD에 있어서, 기체 혼합물은 이를 플라즈마 장(plasma field)을 통하여 통과시킴으로써 반응한다. 이러한 공정에서 사용되는 플라즈마는 각종 공급원(예: 전기 방전, 고주파 또는 마이크로파 범위의 전자기장, 레이저 또는 입자 빔)으로부터 유도된 에너지를 포함한다. 플라즈마 증착 공정에 있어서, 적당한 전력 밀도(0.1 내지 5watts/cm2)에서 고주파(10kHz 내지 102MHz) 또는 마이크로파(1.0 내지 10GHz) 에너지의 사용이 통상적으로 바람직하다. 그러나, 특정 주파수, 전력 및 압력은 통상적으로 장치에 따라서 맞추어진다. 바람직하게는, 막은 PECVD를 사용하여 20 내지 1,000W의 전력, 1 내지 10,000mTorr의 압력(0.0133 내지 1132.2Pa) 및 25 내지 100℃의 온도에서 제조된다. 종종, 고밀도 플라즈마라고 하는 한정된 저압(1 내지 5mTorr) 마이크로파 주파수 플라즈마는 CVD 성장 도중에 다양한 표면 불안정화를 평탄화시키는 공정에서 RF 주파수 여기와 함께 조합될 수 있다. 이러한 공정은 중간층 유전체의 형성에서 유용하다.
본 발명에서 제조한 필름은 두께가 다양할 수 있다. 두께가 0.01 내지 10㎛인 막을 본 발명의 방법으로 제조할 수 있다. 막의 두께는 0.5 내지 3.0㎛가 바람직하다.
본 발명의 방법의 한 가지 이점은 산소 공급 기체로서 아산화질소를 사용하는 경우, 막 조성과 특성이 반응성 기체 혼합물 중의 아산화질소의 양이 상당히 변하는 경우라고 할지라도, 여전히 필수적으로 동일하다는 점이다(N2O 대 메틸 함유 실란 1.2:1 내지 4.5:1용적부).
본 발명의 방법의 기타의 이점은 연속 성장 공정이 연결되어 CVD 공정 도중에 산소 공급 기체를 적당한 시기에서 증가시키거나 삭제함으로써, 예를 들면, SiO2/H:SiOC/SiO2또는 SiC:H/H:SiOC/SiC:H의 다층 구조를 형성시키는 능력이다. 반응성 기체 흐름을 중단시키고, 산소 공급 기체의 양을 조절한 다음, 반응성 기체 흐름을 다시 시작함으로써 불연속 층이 형성되어 다음 층을 제조하는 것이 바람직하다.
제조한 막은 낮은 유전율로 인하여, 반도체 집적 회로 제조업(예: 게이트 유전체, 예비금속 및 중간금속 유전체 및 표면안정화 피막)에 있어서 중간층 유전율로서 특히 적합하다. 제조한 막의 유전율은 3.6 이하, 바람직하게는 3.2 이하, 보다 바람직하게는 3.0 이하이다.
실시예
당해 분야의 숙련가가 본 명세서에서 습득한 발명을 이해하고 인정할 수 있도록 다음 예를 제시한다.
실시예 1 내지 실시예 8과 비교실시예 1 및 비교실시예 2에 있어서, 금속 절연체 반도체(실시예 4 내지 실시예 8)와 금속 절연체 금속 캐퍼시터(실시예 1 내지 실시예 3, 비교실시예 1 및 비교실시예 2)를 사용하여 유전체 특성을 측정한다.
금속 게이트 증착(상부 전극) 직후 그리고 350 내지 400℃의 온도 범위에서 N2속에서 하나 이상의 어니일링 사이클 후에 측정을 실시한다. 캐퍼시터 기하학과 막 두께로부터 상대성 유전율(K)을 계산한다. 흐름 속도는 sccm(표준 ㎤/min.)으로서 표에 기재되어 있다.
실시예 1 내지 실시예 8
트리메틸실란(3MS)과 아산화질소를 포함하는 반응성 기체 혼합물(기체 유량에 대해서는 표 1과 표 2를 참조)을 Al 0.5㎛로 피복시킨 열 산화된 (SiO20.1㎛) 실리콘 웨이퍼 또는 아무런 처리를 하지 않은 실리콘 웨이퍼(bare silicon wafer)를 기판으로서 사용하는 전기용량적으로 커플된 평행판 PECVD 시스템 속으로 도입한다. 350W의 전력, 2,700mTorr의 압력(359.69Pa) 및 250℃의 온도에서 PECVD 시스템을 작동시킨다. 캐리어 가스로서 헬륨을 사용한다. 실시예 1 내지 실시예 8에 대하여 생기는 유전율, 성장 속도 및 막 응력(압축성)은 표 1과 표 2에 기재되어 있다. 실시예 4 내지 실시예 8에서 제조한 막의 조성과 밀도는 표 3에 기재되어 있다. 표 2로부터 알 수 있는 바와 같이, 아산화질소의 양이 상당히 변하는 경우라고 할지라도, 생성된 막은 필수적으로 조성과 특성이 동일하다.
실시예번호 3MS(sccm) He(sccm) N2O(sccm) K(MIM) K(400℃ 금속 어니일링 후) 성장 속도(Å/min) 응력(MPa)
1 100 380 120 3.6 3.6 535 61C
2 100 260 240 3.4 3.1 내지 3.4 1531 28C
3 100 140 360 3.2 2.8 내지 3.0 3615 53C
*C는 압축 응력이다.
실시예번호 3MS(sccm) He(sccm) N2O(sccm) K(MIS) K(금속 어니일링*후) 성장 속도(Å/min)
4 100 380 120 3.2 3.1 624
5 100 260 240 3.1 3.0 2076
6 100 140 360 3.1 3.1 4830
7 100 100 400 3.0 2.9 5510
8 100 50 450 3.1 3.0 6076
*3회 사이클, 각각 200-350-200℃, 200-400-200℃, 200-400-200℃에서 1시간 동안 침지시킨다.
실시예번호 두께(㎛) Si원자% H원자% C원자% O원자% 밀도g/㎤
4 0.62 0.20 0.25 0.37 0.18 1.46
5 0.83 0.18 0.29 0.35 0.18 1.34
6 0.97 0.2 0.3 0.31 0.19 1.36
7 1.10 0.18 0.29 0.33 0.20 1.36
8 1.22 0.18 0.27 0.34 0.21 1.36
비교실시예 1과 비교실시예 2
실시예 1 내지 실시예 8에 대한 과정과 동일한 과정을 사용하여, 플라즈마 증강 화학적 증착에서 트리메틸실란과 산소를 포함하는 반응성 기체 혼합물을 사용한다. 결과는 표 4에 기재되어 있다. 생성된 막은 필수적으로 SiO2막인데, 이는 반응성 기체 혼합물 속에서 사용되는 산소의 양이 많기 때문이다.
실시예번호 3MS(sccm) He(sccm) N2O(sccm) K(MIM) K(400℃ 금속 어니일링 후) 성장 속도(Å/min) 응력*(MPa)
C1 100 440 60 4.6 - 1456 60T
C2 100 380 120 5.8 - 2481 71T
*T는 인장 응력이다.
비교실시예 3
이 실시예는 유럽 특허원 제0 774 533호의 실시예 3이다. 트리메틸실란(TMS) 6 sccm과 아산화질소 523sccm을 포함하는 반응성 기체 혼합물을 기판으로서 실리콘 웨이퍼를 사용하는 전기용량적으로 커플된 평행판 PECVD 시스템 속으로 도입한다. 50W의 전력, 1,000mTorr의 압력 및 300℃의 온도에서 PECVD 시스템을 작동시킨다. 캐리어 가스로서 헬륨(500sccm)을 사용한다. 다량의 아산화질소(N2O)를 사용하였으므로, 생성된 막은 SiO2막이다.
본 발명에 따라, 반도체 장치를 제조하는 데 유용하며 유전율이 3.6 이하인 수소화된 옥시탄화규소(H:SiOC) 막을 제조할 수 있다.

Claims (6)

  1. 메틸 함유 실란과 산소 공급 기체를 포함하는 반응성 기체 혼합물을 기판 함유 화학 증착실로 도입시키고, 메틸 함유 실란을 25 내지 500℃의 온도에서 산소 공급 기체와 반응시킴을 포함하는 수소화된 옥시탄화규소 막의 제조방법에 있어서,
    반응 도중에 존재하는 산소의 양을 조절하여, 수소, 규소, 탄소 및 산소를 포함하며 유전율이 3.6 이하인 막을 기판 위에 제공함을 특징으로 하는 방법.
  2. 제1항에 있어서, 산소 공급 기체의 양이 메틸 함유 실란 1용적부당 산소 공급 기체 5용적부 미만인 방법.
  3. 제1항 또는 제2항에 있어서, 반응이 반응성 기체 혼합물을 플라즈마에 노출시킴으로써 수행되는 방법.
  4. 제1항 내지 제3항 중의 어느 한 항에 있어서, 반응성 기체 혼합물이 캐리어 가스를 추가로 포함하는 방법.
  5. 제1항 내지 제4항 중의 어느 한 항에 있어서, 수소화된 옥시탄화규소 막의 두께가 0.01 내지 10㎛인 방법.
  6. 제1항 내지 제5항 중의 어느 한 항에 있어서, 메틸 함유 실란과 산소 공급 기체가 반응하는 동안에 산소 공급 기체의 양이 증가되거나 감소되어, SiO2, H:SiOC 및 SiC:H로 이루어진 그룹으로부터 선택된 연속 층을 함유하는 막이 제조되는 방법.
KR10-1999-0019173A 1998-05-29 1999-05-27 유전율이 낮은 수소화된 옥시탄화규소 막의 제조방법 KR100453612B1 (ko)

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