KR100864777B1 - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

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Publication number
KR100864777B1
KR100864777B1 KR1020070048736A KR20070048736A KR100864777B1 KR 100864777 B1 KR100864777 B1 KR 100864777B1 KR 1020070048736 A KR1020070048736 A KR 1020070048736A KR 20070048736 A KR20070048736 A KR 20070048736A KR 100864777 B1 KR100864777 B1 KR 100864777B1
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semiconductor substrate
layer
via hole
insulating film
semiconductor device
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Expired - Fee Related
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Korean (ko)
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KR20070112059A (ko
Inventor
아끼라 스즈끼
가쯔유끼 세끼
고우지로 가메야마
다까히로 오이까와
Original Assignee
산요덴키가부시키가이샤
산요 한도타이 세이조우 가부시키가이샤
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Assigned to 산요 한도타이 세이조우 가부시키가이샤 reassignment 산요 한도타이 세이조우 가부시키가이샤 권리지분의 전부이전등록 Assignors: 산요 한도타이 엔지니어링 가부시키가이샤
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H10P50/244—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials comprising alternated and repeated etching and passivation steps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/922—Bond pads being integral with underlying chip-level interconnections

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
KR1020070048736A 2006-05-19 2007-05-18 반도체 장치의 제조 방법 Expired - Fee Related KR100864777B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006139693A JP4812512B2 (ja) 2006-05-19 2006-05-19 半導体装置の製造方法
JPJP-P-2006-00139693 2006-05-19

Publications (2)

Publication Number Publication Date
KR20070112059A KR20070112059A (ko) 2007-11-22
KR100864777B1 true KR100864777B1 (ko) 2008-10-22

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Country Status (6)

Country Link
US (1) US8669183B2 (https=)
EP (1) EP1858063A3 (https=)
JP (1) JP4812512B2 (https=)
KR (1) KR100864777B1 (https=)
CN (1) CN101075554B (https=)
TW (1) TWI365508B (https=)

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US8669183B2 (en) 2014-03-11
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US20070281474A1 (en) 2007-12-06
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