JP4812512B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4812512B2 JP4812512B2 JP2006139693A JP2006139693A JP4812512B2 JP 4812512 B2 JP4812512 B2 JP 4812512B2 JP 2006139693 A JP2006139693 A JP 2006139693A JP 2006139693 A JP2006139693 A JP 2006139693A JP 4812512 B2 JP4812512 B2 JP 4812512B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
- H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02372—Disposition of the redistribution layers connecting to a via connection in the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Description
更に、本発明の半導体装置の製造方法は、前記半導体基板の開口部の底部において前記パッド電極を露出させるために前記第1の絶縁膜を除去する工程を有し、前記第1の絶縁膜を除去する工程と、前記半導体基板の開口部の内壁を平坦化する工程を同一工程で行うことを特徴とする。
5 半導体基板 6 第1の絶縁膜 7 パッド電極
8 パッシベーション膜 9 接着層 10 支持体 11 マスク層
12 ビアホール 13 スキャロップ形状 14 第2の絶縁膜
15 バリア層 16 シード層 17 貫通電極 18 配線層
19 レジスト層 20 保護層 21 導電端子 30 絶縁膜
100 半導体基板 101 ビアホール 102 スキャロップ形状
103 絶縁膜 104 バリア層 105 シード層
106 貫通電極 107 先鋭部 108 異常成長部
Claims (7)
- 半導体基板をプラズマエッチングするプラズマエッチング工程と、
前記プラズマエッチング工程により形成された溝の内壁に保護膜を堆積させるプラズマデポジション工程と、
前記プラズマエッチング工程と前記プラズマデポジション工程とを交互に繰り返すことで前記半導体基板に開口部を形成する工程と、
前記半導体基板の開口部の内壁を等方性プラズマエッチングして平坦化する工程とを有することを特徴とする半導体装置の製造方法。 - 前記半導体基板の開口部の内壁上に絶縁膜を形成する工程と、
前記絶縁膜上に貫通電極を形成する工程を有することを特徴とする請求項1に記載の半導体装置の製造方法。 - その一方の主面に第1の絶縁膜を介してパッド電極が形成された半導体基板を準備し、
前記半導体基板の他方の主面上であって、前記パッド電極に対応する位置に開口部を有するマスク層を形成する工程と、
前記マスク層をマスクとして用いて前記半導体基板をプラズマエッチングするプラズマエッチング工程と、
前記プラズマエッチングにより形成された溝の内壁に保護膜を堆積させるプラズマデポジション工程と、
前記プラズマエッチング工程と前記プラズマデポジション工程とを交互に繰り返すことで前記半導体基板に前記第1の絶縁膜に至る開口部を形成する工程と、
前記半導体基板の開口部の内壁を等方性プラズマエッチングして平坦化する工程とを有することを特徴とする半導体装置の製造方法。 - 前記マスク層を除去する工程と、
前記半導体基板の開口部の底部において前記パッド電極を露出させるために前記第1の絶縁膜を除去する工程とを有し、前記マスク層がシリコン酸化膜若しくはシリコン窒化膜からなるとき、前記マスク層を除去する工程と、前記第1の絶縁膜を除去する工程と、前記半導体基板の開口部の内壁を平坦化する工程とを、同一装置を用いて同時に行うことを特徴とする請求項3に記載の半導体装置の製造方法。 - 前記半導体基板の開口部の底部において前記パッド電極を露出させるために前記第1の絶縁膜を除去する工程を有し、
前記第1の絶縁膜を除去する工程と、前記半導体基板の開口部の内壁を平坦化する工程とを、同一装置を用いて同時に行うことを特徴とする請求項3に記載の半導体装置の製造方法。 - 前記半導体基板の開口部内に前記パッド電極と電気的に接続された貫通電極を形成する工程を有することを特徴とする請求項3乃至請求項5のいずれかに記載の半導体装置の製造方法。
- 前記半導体基板の開口部の内壁を平坦化する工程で用いるエッチングガスが少なくともCF 4 ガスを含むことを特徴とする請求項1乃至請求項6のいずれかに記載の半導体装置の製造方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006139693A JP4812512B2 (ja) | 2006-05-19 | 2006-05-19 | 半導体装置の製造方法 |
TW096116589A TWI365508B (en) | 2006-05-19 | 2007-05-10 | Manufacturing method of semiconductor device |
US11/802,107 US8669183B2 (en) | 2006-05-19 | 2007-05-18 | Manufacturing method of semiconductor device |
KR1020070048736A KR100864777B1 (ko) | 2006-05-19 | 2007-05-18 | 반도체 장치의 제조 방법 |
EP07010073A EP1858063A3 (en) | 2006-05-19 | 2007-05-21 | Manufacturing method of semiconductor device |
CN200710104155XA CN101075554B (zh) | 2006-05-19 | 2007-05-21 | 半导体装置的制造方法 |
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JP2006139693A JP4812512B2 (ja) | 2006-05-19 | 2006-05-19 | 半導体装置の製造方法 |
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JP2007311584A JP2007311584A (ja) | 2007-11-29 |
JP2007311584A5 JP2007311584A5 (ja) | 2009-06-25 |
JP4812512B2 true JP4812512B2 (ja) | 2011-11-09 |
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US (1) | US8669183B2 (ja) |
EP (1) | EP1858063A3 (ja) |
JP (1) | JP4812512B2 (ja) |
KR (1) | KR100864777B1 (ja) |
CN (1) | CN101075554B (ja) |
TW (1) | TWI365508B (ja) |
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EP1858063A2 (en) | 2007-11-21 |
US20070281474A1 (en) | 2007-12-06 |
US8669183B2 (en) | 2014-03-11 |
EP1858063A3 (en) | 2010-04-28 |
TW200802713A (en) | 2008-01-01 |
CN101075554A (zh) | 2007-11-21 |
KR20070112059A (ko) | 2007-11-22 |
KR100864777B1 (ko) | 2008-10-22 |
JP2007311584A (ja) | 2007-11-29 |
CN101075554B (zh) | 2010-06-16 |
TWI365508B (en) | 2012-06-01 |
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