KR100544266B1 - 반도체집적회로의설계방법및반도체집적회로 - Google Patents

반도체집적회로의설계방법및반도체집적회로 Download PDF

Info

Publication number
KR100544266B1
KR100544266B1 KR1019980032981A KR19980032981A KR100544266B1 KR 100544266 B1 KR100544266 B1 KR 100544266B1 KR 1019980032981 A KR1019980032981 A KR 1019980032981A KR 19980032981 A KR19980032981 A KR 19980032981A KR 100544266 B1 KR100544266 B1 KR 100544266B1
Authority
KR
South Korea
Prior art keywords
well region
power supply
voltage
supply line
substrate potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019980032981A
Other languages
English (en)
Korean (ko)
Other versions
KR19990023597A (ko
Inventor
류지 시바타
시게루 시마다
Original Assignee
가부시끼가이샤 히다치 세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 히다치 세이사꾸쇼 filed Critical 가부시끼가이샤 히다치 세이사꾸쇼
Publication of KR19990023597A publication Critical patent/KR19990023597A/ko
Application granted granted Critical
Publication of KR100544266B1 publication Critical patent/KR100544266B1/ko
Assigned to 르네사스 일렉트로닉스 가부시키가이샤 reassignment 르네사스 일렉트로닉스 가부시키가이샤 권리의 전부이전등록 Assignors: 가부시키가이샤 히타치세이사쿠쇼
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1019980032981A 1997-08-21 1998-08-14 반도체집적회로의설계방법및반도체집적회로 Expired - Fee Related KR100544266B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP97-224560 1997-08-21
JP22456097 1997-08-21
JP97-338337 1997-12-09
JP33833797A JP4014708B2 (ja) 1997-08-21 1997-12-09 半導体集積回路装置の設計方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020050080016A Division KR100614557B1 (ko) 1997-08-21 2005-08-30 반도체 집적회로장치

Publications (2)

Publication Number Publication Date
KR19990023597A KR19990023597A (ko) 1999-03-25
KR100544266B1 true KR100544266B1 (ko) 2007-03-02

Family

ID=26526125

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1019980032981A Expired - Fee Related KR100544266B1 (ko) 1997-08-21 1998-08-14 반도체집적회로의설계방법및반도체집적회로
KR1020050080016A Expired - Fee Related KR100614557B1 (ko) 1997-08-21 2005-08-30 반도체 집적회로장치

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020050080016A Expired - Fee Related KR100614557B1 (ko) 1997-08-21 2005-08-30 반도체 집적회로장치

Country Status (4)

Country Link
US (6) US6340825B1 (https=)
JP (1) JP4014708B2 (https=)
KR (2) KR100544266B1 (https=)
TW (1) TW463361B (https=)

Families Citing this family (130)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4014708B2 (ja) * 1997-08-21 2007-11-28 株式会社ルネサステクノロジ 半導体集積回路装置の設計方法
TW442945B (en) * 1998-11-20 2001-06-23 Sony Computer Entertainment Inc Integrated circuit chip, integrated circuit device, printed circuit board and electronic machine
JP2000211993A (ja) * 1999-01-22 2000-08-02 Mitsubishi Electric Corp 半導体ウェハの製造方法、半導体製造装置、および、半導体装置
JP4565700B2 (ja) 1999-05-12 2010-10-20 ルネサスエレクトロニクス株式会社 半導体装置
JP3349989B2 (ja) * 1999-06-18 2002-11-25 エヌイーシーマイクロシステム株式会社 半導体集積回路装置及びそのレイアウト方法及び装置
JP3231741B2 (ja) * 1999-06-28 2001-11-26 エヌイーシーマイクロシステム株式会社 スタンダードセル、スタンダードセル列、スタンダードセルの配置配線装置および配置配線方法
US6388332B1 (en) * 1999-08-10 2002-05-14 Philips Electronics North America Corporation Integrated circuit power and ground routing
JP2001168198A (ja) * 1999-12-09 2001-06-22 Sony Corp メモリ混載半導体集積回路およびその設計方法
JP3372918B2 (ja) 1999-12-21 2003-02-04 日本電気株式会社 設計支援システム及びセル配置方法
JP3530450B2 (ja) * 2000-02-18 2004-05-24 Ｎｅｃエレクトロニクス株式会社 マクロ回路の配線方法、マクロ回路配線装置、及びマクロ回路
JP4521088B2 (ja) * 2000-03-27 2010-08-11 株式会社東芝 半導体装置
JP3609003B2 (ja) * 2000-05-02 2005-01-12 シャープ株式会社 Ｃｍｏｓ半導体集積回路
US6425115B1 (en) * 2000-05-09 2002-07-23 Ess Technology, Inc. Area efficient delay circuits
US6791555B1 (en) 2000-06-23 2004-09-14 Micron Technology, Inc. Apparatus and method for distributed memory control in a graphics processing system
KR100390905B1 (ko) * 2001-05-10 2003-07-12 주식회사 하이닉스반도체 반도체 메모리 소자의 센스앰프 레이아웃 구조
JP4177568B2 (ja) * 2001-07-10 2008-11-05 株式会社東芝 半導体デバイス
US6823499B1 (en) * 2001-09-18 2004-11-23 Lsi Logic Corporation Method for designing application specific integrated circuit structure
US20030101312A1 (en) * 2001-11-26 2003-05-29 Doan Trung T. Machine state storage apparatus and method
DE10159699A1 (de) * 2001-12-05 2003-06-26 Infineon Technologies Ag Verfahren zur Herstellung einer integrierten Halbleiterschaltung
KR100801831B1 (ko) * 2001-12-29 2008-02-11 주식회사 하이닉스반도체 다이나믹 랜덤 액세스 메모리 소자
US6782514B2 (en) * 2002-01-24 2004-08-24 Zenasis Technologies, Inc. Context-sensitive constraint driven uniquification and characterization of standard cells
US7007247B1 (en) * 2002-05-24 2006-02-28 Cadence Design Systems, Inc. Method and mechanism for RTL power optimization
US7133972B2 (en) 2002-06-07 2006-11-07 Micron Technology, Inc. Memory hub with internal cache and/or memory access prediction
US7200024B2 (en) 2002-08-02 2007-04-03 Micron Technology, Inc. System and method for optically interconnecting memory devices
US7117316B2 (en) 2002-08-05 2006-10-03 Micron Technology, Inc. Memory hub and access method having internal row caching
US7254331B2 (en) 2002-08-09 2007-08-07 Micron Technology, Inc. System and method for multiple bit optical data transmission in memory systems
US7149874B2 (en) 2002-08-16 2006-12-12 Micron Technology, Inc. Memory hub bypass circuit and method
US7836252B2 (en) 2002-08-29 2010-11-16 Micron Technology, Inc. System and method for optimizing interconnections of memory devices in a multichip module
US6820181B2 (en) 2002-08-29 2004-11-16 Micron Technology, Inc. Method and system for controlling memory accesses to memory modules having a memory hub architecture
US7102907B2 (en) 2002-09-09 2006-09-05 Micron Technology, Inc. Wavelength division multiplexed memory module, memory system and method
JP2004152975A (ja) * 2002-10-30 2004-05-27 Renesas Technology Corp 半導体装置の製造方法および半導体装置
JP4418153B2 (ja) * 2002-12-27 2010-02-17 株式会社ルネサステクノロジ 半導体装置
US7451413B1 (en) 2003-01-03 2008-11-11 Marvell International Ltd. Methods of minimizing leakage current by analyzing post layout information and associated threshold voltage and leakage current
JP2004241529A (ja) * 2003-02-05 2004-08-26 Matsushita Electric Ind Co Ltd 半導体回路装置及びその回路シミュレーション方法
US6927429B2 (en) * 2003-02-14 2005-08-09 Freescale Semiconductor, Inc. Integrated circuit well bias circuity
JP2003309178A (ja) * 2003-04-11 2003-10-31 Matsushita Electric Ind Co Ltd 半導体装置のレイアウト構造およびレイアウト設計方法
US6950997B2 (en) * 2003-04-28 2005-09-27 International Business Machines Corporation Method and system for low noise integrated circuit design
US7069522B1 (en) * 2003-06-02 2006-06-27 Virage Logic Corporation Various methods and apparatuses to preserve a logic state for a volatile latch circuit
US7219324B1 (en) * 2003-06-02 2007-05-15 Virage Logic Corporation Various methods and apparatuses to route multiple power rails to a cell
US7245145B2 (en) 2003-06-11 2007-07-17 Micron Technology, Inc. Memory module and method having improved signal routing topology
US7120727B2 (en) 2003-06-19 2006-10-10 Micron Technology, Inc. Reconfigurable memory module and method
US7260685B2 (en) 2003-06-20 2007-08-21 Micron Technology, Inc. Memory hub and access method having internal prefetch buffers
US7107415B2 (en) 2003-06-20 2006-09-12 Micron Technology, Inc. Posted write buffers and methods of posting write requests in memory modules
US7428644B2 (en) 2003-06-20 2008-09-23 Micron Technology, Inc. System and method for selective memory module power management
US7389364B2 (en) 2003-07-22 2008-06-17 Micron Technology, Inc. Apparatus and method for direct memory access in a hub-based memory system
US7210059B2 (en) 2003-08-19 2007-04-24 Micron Technology, Inc. System and method for on-board diagnostics of memory modules
US7133991B2 (en) 2003-08-20 2006-11-07 Micron Technology, Inc. Method and system for capturing and bypassing memory transactions in a hub-based memory system
JP4318511B2 (ja) * 2003-08-26 2009-08-26 三洋電機株式会社 昇圧回路
US20050050237A1 (en) * 2003-08-28 2005-03-03 Jeddeloh Joseph M. Memory module and method having on-board data search capabilities and processor-based system using such memory modules
US7136958B2 (en) 2003-08-28 2006-11-14 Micron Technology, Inc. Multiple processor system and method including multiple memory hub modules
US7310752B2 (en) 2003-09-12 2007-12-18 Micron Technology, Inc. System and method for on-board timing margin testing of memory modules
US7194593B2 (en) 2003-09-18 2007-03-20 Micron Technology, Inc. Memory hub with integrated non-volatile memory
US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7234070B2 (en) 2003-10-27 2007-06-19 Micron Technology, Inc. System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding
JP3990339B2 (ja) * 2003-10-30 2007-10-10 株式会社東芝 回路自動設計装置、回路自動設計方法及び回路自動設計プログラム
US7216196B2 (en) * 2003-12-29 2007-05-08 Micron Technology, Inc. Memory hub and method for memory system performance monitoring
US7330992B2 (en) 2003-12-29 2008-02-12 Micron Technology, Inc. System and method for read synchronization of memory modules
US7216310B2 (en) * 2004-01-07 2007-05-08 Texas Instruments Incorporated Design method and system for optimum performance in integrated circuits that use power management
US7188219B2 (en) 2004-01-30 2007-03-06 Micron Technology, Inc. Buffer control system and method for a memory system having outstanding read and write request buffers
US7181584B2 (en) 2004-02-05 2007-02-20 Micron Technology, Inc. Dynamic command and/or address mirroring system and method for memory modules
US7788451B2 (en) 2004-02-05 2010-08-31 Micron Technology, Inc. Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system
US7412574B2 (en) * 2004-02-05 2008-08-12 Micron Technology, Inc. System and method for arbitration of memory responses in a hub-based memory system
US7366864B2 (en) 2004-03-08 2008-04-29 Micron Technology, Inc. Memory hub architecture having programmable lane widths
US7257683B2 (en) 2004-03-24 2007-08-14 Micron Technology, Inc. Memory arbitration system and method having an arbitration packet protocol
US7120723B2 (en) 2004-03-25 2006-10-10 Micron Technology, Inc. System and method for memory hub-based expansion bus
US7213082B2 (en) 2004-03-29 2007-05-01 Micron Technology, Inc. Memory hub and method for providing memory sequencing hints
US7447240B2 (en) 2004-03-29 2008-11-04 Micron Technology, Inc. Method and system for synchronizing communications links in a hub-based memory system
US6980042B2 (en) 2004-04-05 2005-12-27 Micron Technology, Inc. Delay line synchronizer apparatus and method
US7590797B2 (en) 2004-04-08 2009-09-15 Micron Technology, Inc. System and method for optimizing interconnections of components in a multichip memory module
US7162567B2 (en) 2004-05-14 2007-01-09 Micron Technology, Inc. Memory hub and method for memory sequencing
US7222213B2 (en) 2004-05-17 2007-05-22 Micron Technology, Inc. System and method for communicating the synchronization status of memory modules during initialization of the memory modules
US7363419B2 (en) 2004-05-28 2008-04-22 Micron Technology, Inc. Method and system for terminating write commands in a hub-based memory system
US7310748B2 (en) 2004-06-04 2007-12-18 Micron Technology, Inc. Memory hub tester interface and method for use thereof
US7519788B2 (en) 2004-06-04 2009-04-14 Micron Technology, Inc. System and method for an asynchronous data buffer having buffer write and read pointers
US7392331B2 (en) 2004-08-31 2008-06-24 Micron Technology, Inc. System and method for transmitting data packets in a computer system having a memory hub architecture
US7721238B2 (en) 2004-09-22 2010-05-18 Digi International Inc. Method and apparatus for configurable printed circuit board circuit layout pattern
JP2006164132A (ja) * 2004-12-10 2006-06-22 Matsushita Electric Ind Co Ltd 半導体集積回路のネットリスト作成方法およびレイアウト設計方法
US7802223B1 (en) * 2004-12-20 2010-09-21 Robert Paul Masleid Method and system for configurable contacts for implementing different bias designs of an integrated circuit device
JP2006286792A (ja) * 2005-03-31 2006-10-19 Fujitsu Ltd レイアウト検証方法、レイアウト検証装置、及びレイアウト設計装置
JP2006302953A (ja) * 2005-04-15 2006-11-02 Nec Electronics Corp 半導体集積回路装置の製造方法
CN1893085A (zh) * 2005-07-07 2007-01-10 松下电器产业株式会社 半导体装置及其制造方法
JP2007027314A (ja) * 2005-07-14 2007-02-01 Nec Electronics Corp 半導体集積回路装置
JP2007103607A (ja) * 2005-10-03 2007-04-19 Matsushita Electric Ind Co Ltd スタンダードセル、半導体集積回路、半導体集積回路の設計方法、半導体集積回路の設計装置、及びスタンダードセルライブラリ
JP4890838B2 (ja) 2005-11-17 2012-03-07 ルネサスエレクトロニクス株式会社 半導体集積回路のレイアウト設計方法、及びレイアウト設計ツール
JP2007157944A (ja) * 2005-12-02 2007-06-21 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JP2007165670A (ja) * 2005-12-15 2007-06-28 Matsushita Electric Ind Co Ltd 半導体回路装置およびその設計方法
JP5260837B2 (ja) * 2006-03-24 2013-08-14 富士通セミコンダクター株式会社 半導体集積回路の設計方法及び半導体集積回路の設計装置
JP2007281934A (ja) * 2006-04-07 2007-10-25 Nec Electronics Corp 半導体リレー
US7902654B2 (en) 2006-05-10 2011-03-08 Qualcomm Incorporated System and method of silicon switched power delivery using a package
US7606057B2 (en) * 2006-05-31 2009-10-20 Arm Limited Metal line layout in a memory cell
US7530854B2 (en) * 2006-06-15 2009-05-12 Ortronics, Inc. Low noise multiport connector
JP4927463B2 (ja) * 2006-07-10 2012-05-09 パナソニック株式会社 半導体集積回路
US7288001B1 (en) 2006-09-20 2007-10-30 Ortronics, Inc. Electrically isolated shielded multiport connector assembly
JP5034403B2 (ja) * 2006-09-21 2012-09-26 富士通セミコンダクター株式会社 半導体集積回路装置
US20080135827A1 (en) * 2006-09-25 2008-06-12 Stmicroelectronics Crolles 2 Sas MIM transistor
JP2008118098A (ja) 2006-10-11 2008-05-22 Matsushita Electric Ind Co Ltd 半導体集積回路の動作解析方法
JP2008103587A (ja) * 2006-10-20 2008-05-01 Matsushita Electric Ind Co Ltd 半導体集積回路の設計方法、半導体集積回路装置、並びに、電子装置
US7989849B2 (en) * 2006-11-15 2011-08-02 Synopsys, Inc. Apparatuses and methods for efficient power rail structures for cell libraries
US7692954B2 (en) * 2007-03-12 2010-04-06 International Business Machines Corporation Apparatus and method for integrating nonvolatile memory capability within SRAM devices
US20080229269A1 (en) * 2007-03-12 2008-09-18 International Business Machines Corporation Design structure for integrating nonvolatile memory capability within sram devices
JP5122212B2 (ja) * 2007-08-02 2013-01-16 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置
US8183628B2 (en) 2007-10-29 2012-05-22 Unisantis Electronics Singapore Pte Ltd. Semiconductor structure and method of fabricating the semiconductor structure
JP4907563B2 (ja) 2008-01-16 2012-03-28 パナソニック株式会社 半導体記憶装置
US8598650B2 (en) 2008-01-29 2013-12-03 Unisantis Electronics Singapore Pte Ltd. Semiconductor device and production method therefor
JP5317343B2 (ja) 2009-04-28 2013-10-16 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置及びその製造方法
JP5357476B2 (ja) 2008-09-11 2013-12-04 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP5356970B2 (ja) 2009-10-01 2013-12-04 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置
EP2330624A1 (en) * 2009-12-01 2011-06-08 Nxp B.V. Well structure for body biasing, manufacturing and design method
JP4912513B2 (ja) * 2010-03-08 2012-04-11 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 固体撮像装置
US8487357B2 (en) 2010-03-12 2013-07-16 Unisantis Electronics Singapore Pte Ltd. Solid state imaging device having high sensitivity and high pixel density
JP5581795B2 (ja) * 2010-05-07 2014-09-03 ルネサスエレクトロニクス株式会社 スタンダードセル、スタンダードセルを備えた半導体装置、およびスタンダードセルの配置配線方法
JP5066590B2 (ja) 2010-06-09 2012-11-07 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置とその製造方法
JP5087655B2 (ja) 2010-06-15 2012-12-05 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置及びその製造方法
JP5603768B2 (ja) 2010-12-28 2014-10-08 株式会社東芝 半導体集積回路の配線方法、半導体回路配線装置および半導体集積回路
JP2012216590A (ja) * 2011-03-31 2012-11-08 Elpida Memory Inc 半導体装置
JP5554303B2 (ja) * 2011-09-08 2014-07-23 株式会社東芝 半導体集積回路および半導体集積回路の設計方法
US8564034B2 (en) 2011-09-08 2013-10-22 Unisantis Electronics Singapore Pte. Ltd. Solid-state imaging device
US8669601B2 (en) 2011-09-15 2014-03-11 Unisantis Electronics Singapore Pte. Ltd. Method for producing semiconductor device and semiconductor device having pillar-shaped semiconductor
US8772175B2 (en) 2011-12-19 2014-07-08 Unisantis Electronics Singapore Pte. Ltd. Method for manufacturing semiconductor device and semiconductor device
US8916478B2 (en) 2011-12-19 2014-12-23 Unisantis Electronics Singapore Pte. Ltd. Method for manufacturing semiconductor device and semiconductor device
US8748938B2 (en) 2012-02-20 2014-06-10 Unisantis Electronics Singapore Pte. Ltd. Solid-state imaging device
US8772870B2 (en) 2012-10-31 2014-07-08 Freescale Semiconductor, Inc. LDMOS device with minority carrier shunt region
US10204203B2 (en) * 2012-12-31 2019-02-12 Synopsys, Inc. Pattern-based power-and-ground (PG) routing and via creation
JP2015060991A (ja) * 2013-09-19 2015-03-30 パナソニックＩｐマネジメント株式会社 半導体装置及びそれを用いた半導体リレー
US9264040B2 (en) * 2013-12-19 2016-02-16 Freescale Semiconductor, Inc. Low leakage CMOS cell with low voltage swing
US9520398B1 (en) * 2015-06-25 2016-12-13 Broadcom Corporation Including low and high-voltage CMOS devices in CMOS process
JP6864568B2 (ja) 2017-06-27 2021-04-28 ルネサスエレクトロニクス株式会社 半導体装置
US10410934B2 (en) * 2017-12-07 2019-09-10 Micron Technology, Inc. Apparatuses having an interconnect extending from an upper conductive structure, through a hole in another conductive structure, and to an underlying structure
US11487643B1 (en) * 2018-11-12 2022-11-01 Xilinx, Inc. Debugging for integrated scripting applications
KR102899560B1 (ko) * 2020-10-06 2025-12-15 삼성전자주식회사 반도체 장치

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55135837A (en) 1979-04-12 1980-10-23 Fujitsu Ltd Manufacture of photomask
JPS55156370A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Manufacture of semiconductor device
GB8314180D0 (en) 1983-05-23 1983-06-29 Sandoz Products Ltd Organic compounds
JPS6085200A (ja) 1983-10-17 1985-05-14 株式会社竹中工務店 トンネルに於ける漏水氷結防止方法
JPS60130138A (ja) 1983-12-16 1985-07-11 Toshiba Corp 半導体集積回路装置
DE3777938D1 (de) 1986-09-30 1992-05-07 Siemens Ag Integrierte schaltung in komplementaerer schaltungstechnik mit einem substratvorspannungs-generator.
US5254880A (en) * 1988-05-25 1993-10-19 Hitachi, Ltd. Large scale integrated circuit having low internal operating voltage
JP2654449B2 (ja) * 1988-06-09 1997-09-17 株式会社日立製作所 半導体集積回路装置及びその製造方法
US5239197A (en) * 1990-01-29 1993-08-24 Matsushita Electronics Corporation Non-volatile memory device and transistor circuits on the same chip
JP3074003B2 (ja) * 1990-08-21 2000-08-07 株式会社日立製作所 半導体集積回路装置
KR940009357B1 (ko) * 1991-04-09 1994-10-07 삼성전자주식회사 반도체 장치 및 그 제조방법
JP3184265B2 (ja) 1991-10-17 2001-07-09 株式会社日立製作所 半導体集積回路装置およびその制御方法
US5211911A (en) 1992-03-09 1993-05-18 Epri High vanadium austenitic heat resistant alloy
US5461338A (en) * 1992-04-17 1995-10-24 Nec Corporation Semiconductor integrated circuit incorporated with substrate bias control circuit
JPH0621443A (ja) 1992-04-17 1994-01-28 Nec Corp 半導体集積回路
KR940003026A (ko) 1992-07-13 1994-02-19 김광호 트리플웰을 이용한 반도체장치
JP3433808B2 (ja) * 1992-08-05 2003-08-04 株式会社日立製作所 半導体集積回路装置
JPH06120439A (ja) 1992-10-06 1994-04-28 Nec Corp 半導体装置
JP3059599B2 (ja) 1992-10-19 2000-07-04 富士通株式会社 半導体集積回路の製造方法
JPH06140607A (ja) * 1992-10-28 1994-05-20 Mitsubishi Electric Corp 半導体集積回路
US5536955A (en) * 1993-03-29 1996-07-16 Toppan Electronics (Usa) Inc. Electronic devices for use in generating integrated circuit structures and method therefor
JPH077081A (ja) 1993-03-29 1995-01-10 Akhtar Ali 集積回路構造の生成のためのデバイスおよび方法
JP3157649B2 (ja) 1993-05-25 2001-04-16 日本電信電話株式会社 論理回路
KR0169157B1 (ko) * 1993-11-29 1999-02-01 기다오까 다까시 반도체 회로 및 mos-dram
JPH07235608A (ja) 1994-02-24 1995-09-05 Hitachi Ltd 半導体集積回路装置
JPH08171183A (ja) 1994-12-15 1996-07-02 Konica Corp ハロゲン化銀写真感光材料用現像キット液
JP2912174B2 (ja) * 1994-12-27 1999-06-28 日本電気株式会社 ライブラリ群及びそれを用いた半導体集積回路
JP3180612B2 (ja) * 1995-03-27 2001-06-25 ヤマハ株式会社 半導体集積回路
US5619420A (en) * 1995-05-04 1997-04-08 Lsi Logic Corporation Semiconductor cell having a variable transistor width
US5898595A (en) * 1995-05-26 1999-04-27 Lsi Logic Corporation Automated generation of megacells in an integrated circuit design system
JPH0951078A (ja) * 1995-05-29 1997-02-18 Mitsubishi Electric Corp 半導体記憶装置および半導体装置
JPH0936246A (ja) 1995-07-18 1997-02-07 Nec Corp 半導体装置
JPH0981625A (ja) 1995-09-20 1997-03-28 Fujitsu Ltd シンボリックレイアウトシステム
TW328641B (en) 1995-12-04 1998-03-21 Hitachi Ltd Semiconductor integrated circuit device and process for producing the same
DE69517693T2 (de) * 1995-12-29 2001-03-01 Stmicroelectronics S.R.L., Agrate Brianza Standardzellenbibliothek für den Entwurf von integrierten Schaltungen
JPH1070243A (ja) * 1996-05-30 1998-03-10 Toshiba Corp 半導体集積回路装置およびその検査方法およびその検査装置
US5854461A (en) * 1996-11-01 1998-12-29 Sorenson; Jared T. Welding shield
JP4056107B2 (ja) * 1997-06-20 2008-03-05 エルピーダメモリ株式会社 半導体集積回路
JP4014708B2 (ja) * 1997-08-21 2007-11-28 株式会社ルネサステクノロジ 半導体集積回路装置の設計方法

Also Published As

Publication number Publication date
US20090218626A1 (en) 2009-09-03
KR19990023597A (ko) 1999-03-25
US20020043667A1 (en) 2002-04-18
US6340825B1 (en) 2002-01-22
TW463361B (en) 2001-11-11
KR20050103453A (ko) 2005-10-31
US7642601B2 (en) 2010-01-05
US20030208725A1 (en) 2003-11-06
US7541647B2 (en) 2009-06-02
US20050281119A1 (en) 2005-12-22
KR100614557B1 (ko) 2006-08-22
JPH11126827A (ja) 1999-05-11
US6611943B2 (en) 2003-08-26
JP4014708B2 (ja) 2007-11-28
US6462978B2 (en) 2002-10-08
US20020024064A1 (en) 2002-02-28
US6912697B2 (en) 2005-06-28

Similar Documents

Publication Publication Date Title
KR100544266B1 (ko) 반도체집적회로의설계방법및반도체집적회로
US7514766B2 (en) Semiconductor device
US6359472B2 (en) Semiconductor integrated circuit and its fabrication method
US7129741B2 (en) Semiconductor integrated circuit device, storage medium on which cell library is stored and designing method for semiconductor integrated circuit
JP2004022877A (ja) 複数電源用スタンダードセル、自動配置配線用スタンダードセルライブラリ、電源配線方法及び半導体集積装置
KR20040032755A (ko) 반도체 집적 회로 장치
US7906800B2 (en) Semiconductor integrated circuit
JP4993318B2 (ja) 半導体集積回路装置
JP2005175505A (ja) 半導体集積回路装置
KR100269494B1 (ko) Soi·cmos 기술을 이용한 소형 반도체 장치
JPH1168045A (ja) 半導体集積回路装置
CN1988157A (zh) 门阵列
US20050097496A1 (en) High-speed and low-power logical unit
KR20020042507A (ko) 반도체장치, 그 제조방법 및 기억매체
JP4647143B2 (ja) 半導体集積回路
US7185307B2 (en) Method of fabricating and integrated circuit through utilizing metal layers to program randomly positioned basic units
JP2006196790A (ja) 半導体集積回路
JPS6272143A (ja) 半導体集積回路のパタ−ン形成方法
JPWO1997032399A1 (ja) 半導体集積回路装置
JPH04306876A (ja) ゲートアレイ集積回路

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

A107 Divisional application of patent
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0107 Divisional application

St.27 status event code: A-0-1-A10-A18-div-PA0107

St.27 status event code: A-0-1-A10-A16-div-PA0107

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20111216

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

FPAY Annual fee payment

Payment date: 20121227

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20140112

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20140112

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000