JP5700762B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP5700762B2 JP5700762B2 JP2010167343A JP2010167343A JP5700762B2 JP 5700762 B2 JP5700762 B2 JP 5700762B2 JP 2010167343 A JP2010167343 A JP 2010167343A JP 2010167343 A JP2010167343 A JP 2010167343A JP 5700762 B2 JP5700762 B2 JP 5700762B2
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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Description
本実施の形態では、半導体装置及び半導体装置の作製方法の一形態を図1、図2、図3、及び図4を用いて説明する。
本実施の形態では、実施の形態1に示した薄膜トランジスタを用いて、同一基板上に画素部と駆動回路を形成し、アクティブマトリクス型の液晶表示装置を作製する一例を示す。
また、本実施の形態では、薄膜トランジスタと同一基板上に設けられる端子部の構成の一例を示す。なお、実施の形態2ではソース配線の端子部の一例を示したが、本実施の形態では実施の形態2とは異なる構成のソース配線の端子部と、ゲート配線の端子部を図示する。なお、図4において、図3(A)または図3(B)と同じ箇所には同じ符号を用いて説明する。
ここでは、第1の基板と第2の基板の間に液晶層を封入する液晶表示装置において、第2の基板に設けられた対向電極と電気的に接続するための共通接続部を第1の基板上に形成する例を示す。なお、第1の基板にはスイッチング素子として薄膜トランジスタが形成されており、共通接続部の作製工程を画素部のスイッチング素子の作製工程と共通化させることで工程を複雑にすることなく形成する。
実施の形態1または実施の形態2ではゲート絶縁層が単層の例を示したが、本実施の形態では、積層の例を示す。なお、図6において、図3(A)または図3(B)と同じ箇所には同じ符号を用いて説明する。
本実施の形態では、薄膜トランジスタの作製工程の一部が実施の形態1と異なる例を図7及び図8に示す。図7及び図8は、図1及び図2と工程が一部異なる点以外は同じであるため、同じ箇所には同じ符号を用い、同じ箇所の詳細な説明は省略する。
本実施の形態では、保持容量の構成について、実施の形態2と異なる例を図9(A)及び図9(B)に示す。図9(A)は、図3(A)と保持容量の構成が異なる点以外は同じであるため、同じ箇所には同じ符号を用い、同じ箇所の詳細な説明は省略する。なお、図9(A)では画素部の薄膜トランジスタ220と保持容量の断面構造を示す。
本実施の形態では、同一基板上に少なくとも駆動回路の一部と、画素部に配置する薄膜トランジスタを作製する例について以下に説明する。
薄膜トランジスタを作製し、該薄膜トランジスタを画素部、さらには駆動回路に用いて表示機能を有する半導体装置(表示装置ともいう)を作製することができる。また、薄膜トランジスタを駆動回路の一部または全体を、画素部と同じ基板上に一体形成し、システムオンパネルを形成することができる。
半導体装置として発光表示装置の例を示す。表示装置の有する表示素子としては、ここではエレクトロルミネッセンスを利用する発光素子を用いて示す。エレクトロルミネッセンスを利用する発光素子は、発光材料が有機化合物であるか、無機化合物であるかによって区別され、一般的に、前者は有機EL素子、後者は無機EL素子と呼ばれている。
本明細書に開示する半導体装置は、電子ペーパーとして適用することができる。電子ペーパーは、情報を表示するものであればあらゆる分野の電子機器に用いることが可能である。例えば、電子ペーパーを用いて、電子書籍(電子ブック)、ポスター、電車などの乗り物の車内広告、クレジットカード等の各種カードにおける表示等に適用することができる。電子機器の一例を図20に示す。
本明細書に開示する半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機などが挙げられる。
本実施の形態では、半導体装置の一形態として、実施の形態1、2、5、6で示す薄膜トランジスタを有する表示装置の例を図24乃至図35を用いて説明する。本実施の形態は、表示素子として液晶素子を用いた液晶表示装置の例を図24乃至図35を用いて説明する。図24乃至図35の液晶表示装置に用いられるTFT628、629は、実施の形態1、2、5、6で示す薄膜トランジスタを適用することができ、実施の形態1、2、5、6で示す工程で同様に作製できる電気特性及び信頼性の高い薄膜トランジスタである。TFT628はチャネル保護層608を、TFT629はチャネル保護層611をそれぞれ有し、半導体膜をチャネル形成領域とする逆スタガ薄膜トランジスタである。
本実施の形態では、液晶表示パネルのサイズが10インチを超え、60インチ、さらには120インチとする場合には透光性を有する配線の配線抵抗が問題となる恐れがあるため、ゲート配線の一部を金属配線として配線抵抗を低減する例を示す。
11 配線
12 配線
13 配線
14 配線
15 配線
21 入力端子
22 入力端子
23 入力端子
24 入力端子
25 入力端子
26 出力端子
27 出力端子
28 薄膜トランジスタ
31 トランジスタ
32 トランジスタ
33 トランジスタ
34 トランジスタ
35 トランジスタ
36 トランジスタ
37 トランジスタ
38 トランジスタ
39 トランジスタ
40 トランジスタ
41 トランジスタ
42 トランジスタ
43 トランジスタ
51 電源線
52 電源線
53 電源線
61 期間
62 期間
200 基板
202 ゲート絶縁層
203 保護絶縁層
204 平坦化絶縁層
205 共通電位線
206 共通電極層
207 酸化物半導体層
208 酸化物絶縁層
209 共通電位線
210 補助配線
220 薄膜トランジスタ
221 端子
222 端子
223 接続電極層
225 透明導電層
226 電極層
227 画素電極層
228 補助電極層
229 補助電極層
230 容量配線層
231 容量電極
236 金属配線層
237 金属配線層
238 ゲート配線層
241 金属配線層
242 金属配線層
243 金属配線層
244 金属配線層
250 容量配線層
251 酸化物半導体層
252 酸化物半導体層
254 ソース配線
255 端子電極
256 ソース配線
257 端子電極
260 薄膜トランジスタ
261 ゲート電極層
263 チャネル形成領域
265a ソース電極層
265b ドレイン電極層
267 導電層
268 補助電極層
269 補助配線
270 薄膜トランジスタ
271 ゲート電極層
273 チャネル形成領域
277 導電層
280 薄膜トランジスタ
281 ゲート電極層
283 チャネル形成領域
289 薄膜トランジスタ
290 薄膜トランジスタ
293 チャネル形成領域
400 基板
402 ゲート絶縁層
403 保護絶縁層
404 平坦化絶縁層
420 薄膜トランジスタ
422 酸化物半導体層
423 チャネル形成領域
427 画素電極層
428 金属層
429 酸化物半導体層
441 コンタクトホール
442 酸化物半導体層
443 酸化物半導体層
448 薄膜トランジスタ
581 薄膜トランジスタ
583 絶縁膜
585 絶縁層
587 電極層
588 電極層
589 球形粒子
594 キャビティ
595 充填材
600 基板
601 対向基板
602 ゲート配線
603 ゲート配線
604 容量配線
605 容量配線
606 ゲート絶縁膜
607 画素電極
608 チャネル保護層
609 共通電位線
611 チャネル保護層
615 容量電極
616 配線
617 容量配線
618 配線
619 配線
620 絶縁膜
622 絶縁膜
623 コンタクトホール
624 画素電極
625 スリット
626 画素電極
627 コンタクトホール
628 TFT
629 TFT
630 保持容量部
631 保持容量部
632 遮光膜
633 コンタクトホール
636 着色膜
637 平坦化膜
640 対向電極
641 スリット
644 突起
646 配向膜
648 配向膜
650 液晶層
651 液晶素子
652 液晶素子
690 容量配線
2600 TFT基板
2601 対向基板
2602 シール材
2603 画素部
2604 表示素子
2605 着色層
2606 偏光板
2607 偏光板
2608 配線回路部
2609 フレキシブル配線基板
2610 冷陰極管
2611 反射板
2612 回路基板
2613 拡散板
264a 高抵抗ソース領域
264b 高抵抗ドレイン領域
264c 領域
264d 領域
265a ソース電極層
265a ドレイン電極層
265b ドレイン電極層
266a 酸化物絶縁層
266b 酸化物絶縁層
268a 補助電極層
2700 電子書籍
2701 筐体
2703 筐体
2705 表示部
2707 表示部
2711 軸部
2721 電源
2723 操作キー
2725 スピーカ
274a 高抵抗ソース領域
274b 高抵抗ドレイン領域
274c 領域
274d 領域
274e 領域
274f 領域
275a ソース電極層
275b ドレイン電極層
276a 酸化物絶縁層
276b 酸化物絶縁層
282a ゲート絶縁層
282b ゲート絶縁層
282c ゲート絶縁層
284a 高抵抗ソース領域
284b 高抵抗ドレイン領域
285a ソース電極層
285b ドレイン電極層
286a 酸化物絶縁層
286b 酸化物絶縁層
292a ゲート絶縁層
292b ゲート絶縁層
294a 高抵抗ソース領域
294b 高抵抗ドレイン領域
294c 領域
294d 領域
294e 領域
294f 領域
294g 領域
294h 領域
295a ソース電極層
295b ドレイン電極層
296a 酸化物絶縁層
296b 酸化物絶縁層
424a 第1の高抵抗ソース領域
424e 第2の高抵抗ソース領域
424b 第1の高抵抗ドレイン領域
424f 第2の高抵抗ドレイン領域
4001 基板
4002 画素部
4003 信号線駆動回路
4004 走査線駆動回路
4005 シール材
4006 基板
4008 液晶層
4010 薄膜トランジスタ
4011 薄膜トランジスタ
4013 液晶素子
4015 接続端子電極
4016 端子電極
4018 FPC
4019 異方性導電膜
4020 絶縁層
4021 絶縁層
4030 画素電極層
4031 対向電極層
4032 絶縁層
4040 導電層
421a ゲート電極層
421b ゲート電極層
424a 高抵抗ソース領域
424b 高抵抗ドレイン領域
424c 領域
424d 領域
425a ソース電極層
425b ドレイン電極層
426a 酸化物絶縁層
426b 酸化物絶縁層
4501 基板
4502 画素部
4505 シール材
4506 基板
4507 充填材
4509 薄膜トランジスタ
4510 薄膜トランジスタ
4511 発光素子
4512 電界発光層
4513 電極層
4515 接続端子電極
4516 端子電極
4517 電極層
4519 異方性導電膜
4520 隔壁
4540 導電層
4543 絶縁層
4544 絶縁層
5300 基板
5301 画素部
5302 走査線駆動回路
5303 走査線駆動回路
5304 信号線駆動回路
5305 タイミング制御回路
5601 シフトレジスタ
5602 スイッチング回路部
5603 薄膜トランジスタ
5604 配線
5605 配線
590a 黒色領域
590b 白色領域
6400 画素
6401 スイッチング用トランジスタ
6402 駆動用トランジスタ
6403 容量素子
6404 発光素子
6405 信号線
6406 走査線
6407 電源線
6408 共通電極
7001 TFT
7002 発光素子
7003 陰極
7004 発光層
7005 陽極
7011 駆動用TFT
7012 発光素子
7013 陰極
7014 発光層
7015 陽極
7016 遮蔽膜
7017 導電膜
7021 駆動用TFT
7022 発光素子
7023 陰極
7024 発光層
7025 陽極
7027 導電膜
9201 表示部
9202 表示ボタン
9203 操作スイッチ
9205 調節部
9206 カメラ部
9207 スピーカ
9208 マイク
9301 上部筐体
9302 下部筐体
9303 表示部
9304 キーボード
9305 外部接続ポート
9306 ポインティングデバイス
9307 表示部
9600 テレビジョン装置
9601 筐体
9603 表示部
9605 スタンド
9607 表示部
9609 操作キー
9610 リモコン操作機
9700 デジタルフォトフレーム
9701 筐体
9703 表示部
9881 筐体
9882 表示部
9883 表示部
9884 スピーカ部
9886 記録媒体挿入部
9887 接続端子
9888 センサ
9889 マイクロフォン
9890 LEDランプ
9891 筐体
9893 連結部
9900 スロットマシン
9901 筐体
9903 表示部
4041a 絶縁層
4041b 絶縁層
4042a 絶縁層
4042b 絶縁層
4503a 信号線駆動回路
4504a 走査線駆動回路
4518a FPC
4541a 絶縁層
4541b 絶縁層
4542a 絶縁層
4542b 絶縁層
Claims (1)
- 絶縁表面上にゲート電極層を形成し、
前記ゲート電極層上にゲート絶縁層を形成し、
前記ゲート絶縁層上に第1の酸化物半導体層を形成し、
前記第1の酸化物半導体層上に接して第2の酸化物半導体層を形成し、
前記第2の酸化物半導体層を形成後、窒素又は希ガスを含む雰囲気下で第1の加熱処理を行い、
前記第1の加熱処理後、前記第2の酸化物半導体層上に酸化物絶縁層を形成し、
前記酸化物絶縁層を形成後、窒素又は希ガスを含む雰囲気下で第2の加熱処理を行い、
前記第2の加熱処理後、前記酸化物絶縁層上及び前記第2の酸化物半導体層上に、ソース電極層及びドレイン電極層を形成し、
前記第2の酸化物半導体層は、前記ゲート電極層と重なる第1の領域と、前記ソース電極層と接する第2の領域と、前記ドレイン電極層と接する第3の領域と、を有し、
前記第1の領域は前記第2の領域と前記第3の領域の間に位置し、
前記酸化物絶縁層は、前記第1の領域と接する第4の領域と、前記第1の酸化物半導体層及び前記第2の酸化物半導体層の周縁を覆う第5の領域と、を有することを特徴とする半導体装置の作製方法。
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