JP4554011B2 - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法 Download PDF

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Publication number
JP4554011B2
JP4554011B2 JP22687699A JP22687699A JP4554011B2 JP 4554011 B2 JP4554011 B2 JP 4554011B2 JP 22687699 A JP22687699 A JP 22687699A JP 22687699 A JP22687699 A JP 22687699A JP 4554011 B2 JP4554011 B2 JP 4554011B2
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Japan
Prior art keywords
film
wiring
polishing
manufacturing
integrated circuit
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Expired - Lifetime
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JP22687699A
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English (en)
Japanese (ja)
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JP2001053076A5 (https=
JP2001053076A (ja
Inventor
純司 野口
直史 大橋
健一 武田
達之 齋藤
日出 山口
伸郎 大和田
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Renesas Electronics Corp
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Renesas Electronics Corp
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Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP22687699A priority Critical patent/JP4554011B2/ja
Priority to TW089114753A priority patent/TW521373B/zh
Priority to KR1020000046084A priority patent/KR100746543B1/ko
Publication of JP2001053076A publication Critical patent/JP2001053076A/ja
Priority to US10/128,264 priority patent/US20020119651A1/en
Priority to US10/128,265 priority patent/US6849535B2/en
Priority to US10/140,111 priority patent/US20020142576A1/en
Priority to US10/140,112 priority patent/US6815330B2/en
Priority to US10/140,110 priority patent/US20020127842A1/en
Priority to US10/233,421 priority patent/US6756679B2/en
Priority to US10/233,469 priority patent/US6797606B2/en
Priority to US10/233,475 priority patent/US6864169B2/en
Priority to US10/233,432 priority patent/US6797609B2/en
Priority to US10/233,430 priority patent/US6716749B2/en
Publication of JP2001053076A5 publication Critical patent/JP2001053076A5/ja
Priority to US12/018,790 priority patent/US20080138979A1/en
Application granted granted Critical
Publication of JP4554011B2 publication Critical patent/JP4554011B2/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/694Inorganic materials composed of nitrides
    • H10P14/6943Inorganic materials composed of nitrides containing silicon
    • H10P14/69433Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/011Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • HELECTRICITY
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662Laminate layers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40Chemomechanical polishing [CMP]
    • H10P52/403Chemomechanical polishing [CMP] of conductive or resistive materials
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00Cleaning of wafers, substrates or parts of devices
    • H10P70/20Cleaning during device manufacture
    • H10P70/23Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/234Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
    • HELECTRICITY
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00Cleaning of wafers, substrates or parts of devices
    • H10P70/20Cleaning during device manufacture
    • H10P70/27Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers
    • H10P70/277Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers the processing being a planarisation of conductive layers
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04Apparatus for manufacture or treatment
    • H10P72/0431Apparatus for thermal treatment
    • H10P72/0436Apparatus for thermal treatment mainly by radiation
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7626Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the construction of the shaft
    • HELECTRICITY
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    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
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    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
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    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/059Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by reflowing or applying pressure
    • HELECTRICITY
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    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
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    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
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    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
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    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP22687699A 1999-08-10 1999-08-10 半導体集積回路装置の製造方法 Expired - Lifetime JP4554011B2 (ja)

Priority Applications (14)

Application Number Priority Date Filing Date Title
JP22687699A JP4554011B2 (ja) 1999-08-10 1999-08-10 半導体集積回路装置の製造方法
TW089114753A TW521373B (en) 1999-08-10 2000-07-24 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
KR1020000046084A KR100746543B1 (ko) 1999-08-10 2000-08-09 반도체 집적 회로 장치의 제조 방법
US10/128,264 US20020119651A1 (en) 1999-08-10 2002-04-24 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/128,265 US6849535B2 (en) 1999-08-10 2002-04-24 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/140,111 US20020142576A1 (en) 1999-08-10 2002-05-08 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/140,112 US6815330B2 (en) 1999-08-10 2002-05-08 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/140,110 US20020127842A1 (en) 1999-08-10 2002-05-08 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/233,421 US6756679B2 (en) 1999-08-10 2002-09-04 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/233,469 US6797606B2 (en) 1999-08-10 2002-09-04 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/233,475 US6864169B2 (en) 1999-08-10 2002-09-04 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/233,432 US6797609B2 (en) 1999-08-10 2002-09-04 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US10/233,430 US6716749B2 (en) 1999-08-10 2002-09-04 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US12/018,790 US20080138979A1 (en) 1999-08-10 2008-01-23 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22687699A JP4554011B2 (ja) 1999-08-10 1999-08-10 半導体集積回路装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006280936A Division JP2007005840A (ja) 2006-10-16 2006-10-16 半導体集積回路装置の製造方法

Publications (3)

Publication Number Publication Date
JP2001053076A JP2001053076A (ja) 2001-02-23
JP2001053076A5 JP2001053076A5 (https=) 2004-11-11
JP4554011B2 true JP4554011B2 (ja) 2010-09-29

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JP22687699A Expired - Lifetime JP4554011B2 (ja) 1999-08-10 1999-08-10 半導体集積回路装置の製造方法

Country Status (4)

Country Link
US (11) US20020119651A1 (https=)
JP (1) JP4554011B2 (https=)
KR (1) KR100746543B1 (https=)
TW (1) TW521373B (https=)

Families Citing this family (104)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3645129B2 (ja) * 1999-06-25 2005-05-11 Necエレクトロニクス株式会社 半導体装置の製造方法
JP4554011B2 (ja) * 1999-08-10 2010-09-29 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP3805588B2 (ja) * 1999-12-27 2006-08-02 株式会社日立製作所 半導体装置の製造方法
JP2001223269A (ja) * 2000-02-10 2001-08-17 Nec Corp 半導体装置およびその製造方法
US6989600B2 (en) * 2000-04-20 2006-01-24 Renesas Technology Corporation Integrated circuit device having reduced substrate size and a method for manufacturing the same
JP2002110679A (ja) * 2000-09-29 2002-04-12 Hitachi Ltd 半導体集積回路装置の製造方法
US7271489B2 (en) * 2003-10-15 2007-09-18 Megica Corporation Post passivation interconnection schemes on top of the IC chips
TW462085B (en) * 2000-10-26 2001-11-01 United Microelectronics Corp Planarization of organic silicon low dielectric constant material by chemical mechanical polishing
EP1298715B1 (en) * 2001-03-16 2013-08-07 Shin-Etsu Handotai Co., Ltd. Method for storing a silicon wafer
US6787462B2 (en) 2001-03-28 2004-09-07 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device having buried metal wiring
KR100750922B1 (ko) * 2001-04-13 2007-08-22 삼성전자주식회사 배선 및 그 제조 방법과 그 배선을 포함하는 박막트랜지스터 기판 및 그 제조 방법
JP4803625B2 (ja) * 2001-09-04 2011-10-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US6949411B1 (en) * 2001-12-27 2005-09-27 Lam Research Corporation Method for post-etch and strip residue removal on coral films
US20030134499A1 (en) 2002-01-15 2003-07-17 International Business Machines Corporation Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof
JP3734447B2 (ja) * 2002-01-18 2006-01-11 富士通株式会社 半導体装置の製造方法および半導体装置の製造装置
US6518184B1 (en) * 2002-01-18 2003-02-11 Intel Corporation Enhancement of an interconnect
US6764952B1 (en) * 2002-03-13 2004-07-20 Novellus Systems, Inc. Systems and methods to retard copper diffusion and improve film adhesion for a dielectric barrier on copper
WO2003079429A1 (fr) * 2002-03-15 2003-09-25 Renesas Technology Corp. Procede de production d'un dispositif a circuit imprime a semi-conducteur
JP3989763B2 (ja) * 2002-04-15 2007-10-10 株式会社半導体エネルギー研究所 半導体表示装置
JP2003318151A (ja) 2002-04-19 2003-11-07 Nec Electronics Corp 半導体装置の製造方法
TWI288443B (en) 2002-05-17 2007-10-11 Semiconductor Energy Lab SiN film, semiconductor device, and the manufacturing method thereof
US6909196B2 (en) * 2002-06-21 2005-06-21 Micron Technology, Inc. Method and structures for reduced parasitic capacitance in integrated circuit metallizations
JP4087172B2 (ja) * 2002-07-11 2008-05-21 セイコーインスツル株式会社 半導体装置の製造方法
US7582260B2 (en) * 2002-07-18 2009-09-01 Montana State University Zwitterionic dyes for labeling in proteomic and other biological analyses
JP3974470B2 (ja) * 2002-07-22 2007-09-12 株式会社東芝 半導体装置
CN100352036C (zh) 2002-10-17 2007-11-28 株式会社瑞萨科技 半导体器件及其制造方法
JP2004172576A (ja) * 2002-10-30 2004-06-17 Sony Corp エッチング液、エッチング方法および半導体装置の製造方法
US6790777B2 (en) 2002-11-06 2004-09-14 Texas Instruments Incorporated Method for reducing contamination, copper reduction, and depositing a dielectric layer on a semiconductor device
DE10257682A1 (de) * 2002-12-10 2004-07-08 Infineon Technologies Ag Halbleiterschaltungsanordnung
JP2004304021A (ja) * 2003-03-31 2004-10-28 Ebara Corp 半導体装置の製造方法及び製造装置
JP2004273523A (ja) * 2003-03-05 2004-09-30 Renesas Technology Corp 配線接続構造
JP2004288696A (ja) * 2003-03-19 2004-10-14 Fujitsu Ltd 半導体装置の製造方法
JP4454242B2 (ja) 2003-03-25 2010-04-21 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP2004356178A (ja) * 2003-05-27 2004-12-16 Oki Electric Ind Co Ltd エッチング方法、及び半導体装置の製造方法
US20040266185A1 (en) * 2003-06-30 2004-12-30 Texas Instruments Incorporated Method for reducing integrated circuit defects
US20050048768A1 (en) * 2003-08-26 2005-03-03 Hiroaki Inoue Apparatus and method for forming interconnects
EP1691403A4 (en) * 2003-12-04 2009-04-15 Tokyo Electron Ltd METHOD FOR CLEANING THE CONDUCTIVE COATING SURFACE OF A SEMICONDUCTOR SUBSTRATE
JP2005183814A (ja) 2003-12-22 2005-07-07 Fujitsu Ltd 半導体装置の製造方法
JP4065855B2 (ja) * 2004-01-21 2008-03-26 株式会社日立製作所 生体および化学試料検査装置
KR20060043082A (ko) * 2004-02-24 2006-05-15 마츠시타 덴끼 산교 가부시키가이샤 반도체장치의 제조방법
SG157226A1 (en) * 2004-02-24 2009-12-29 Taiwan Semiconductor Mfg A method for improving time dependent dielectric breakdown lifetimes
KR100519801B1 (ko) * 2004-04-26 2005-10-10 삼성전자주식회사 스트레스 완충 스페이서에 의해 둘러싸여진 노드 콘택플러그를 갖는 반도체소자들 및 그 제조방법들
US7829152B2 (en) * 2006-10-05 2010-11-09 Lam Research Corporation Electroless plating method and apparatus
JP4854938B2 (ja) * 2004-07-06 2012-01-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7138717B2 (en) 2004-12-01 2006-11-21 International Business Machines Corporation HDP-based ILD capping layer
JP2006179599A (ja) * 2004-12-21 2006-07-06 Toshiba Corp 半導体装置およびその製造方法
US7442114B2 (en) * 2004-12-23 2008-10-28 Lam Research Corporation Methods for silicon electrode assembly etch rate and etch uniformity recovery
KR100640525B1 (ko) * 2004-12-29 2006-10-31 동부일렉트로닉스 주식회사 반도체 소자의 금속 라인 형성 방법
KR100628225B1 (ko) * 2004-12-29 2006-09-26 동부일렉트로닉스 주식회사 반도체 소자의 제조방법
JP4516447B2 (ja) * 2005-02-24 2010-08-04 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7368383B2 (en) * 2005-05-24 2008-05-06 Taiwan Semiconductor Manufacturing Co., Ltd. Hillock reduction in copper films
US7414275B2 (en) * 2005-06-24 2008-08-19 International Business Machines Corporation Multi-level interconnections for an integrated circuit chip
DE102005035740A1 (de) * 2005-07-29 2007-02-08 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung einer isolierenden Barrierenschicht für eine Kupfermetallisierungsschicht
JP4548280B2 (ja) * 2005-08-31 2010-09-22 ソニー株式会社 半導体装置の製造方法
US8039049B2 (en) * 2005-09-30 2011-10-18 Tokyo Electron Limited Treatment of low dielectric constant films using a batch processing system
US20070080455A1 (en) * 2005-10-11 2007-04-12 International Business Machines Corporation Semiconductors and methods of making
DE102005057057B4 (de) * 2005-11-30 2017-01-05 Advanced Micro Devices, Inc. Verfahren zur Herstellung einer isolierenden Deckschicht für eine Kupfermetallisierungsschicht unter Anwendung einer Silanreaktion
JP4637733B2 (ja) * 2005-11-30 2011-02-23 富士通セミコンダクター株式会社 半導体装置およびその製造方法
US7338826B2 (en) * 2005-12-09 2008-03-04 The United States Of America As Represented By The Secretary Of The Navy Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs
US7863183B2 (en) 2006-01-18 2011-01-04 International Business Machines Corporation Method for fabricating last level copper-to-C4 connection with interfacial cap structure
JP4535505B2 (ja) * 2006-02-10 2010-09-01 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US20070218214A1 (en) * 2006-03-14 2007-09-20 Kuo-Chih Lai Method of improving adhesion property of dielectric layer and interconnect process
CN101416293B (zh) * 2006-03-31 2011-04-20 应用材料股份有限公司 用于介电膜层的阶梯覆盖与图案加载
US8193087B2 (en) * 2006-05-18 2012-06-05 Taiwan Semiconductor Manufacturing Co., Ltd. Process for improving copper line cap formation
JP2007005840A (ja) * 2006-10-16 2007-01-11 Renesas Technology Corp 半導体集積回路装置の製造方法
US7720562B2 (en) * 2006-11-08 2010-05-18 Ebara Corporation Polishing method and polishing apparatus
US7750470B2 (en) * 2007-02-08 2010-07-06 Taiwan Semiconductor Manufacturing Co., Ltd. Methods for planarization of dielectric layer around metal patterns for optical efficiency enhancement
JP2008218921A (ja) * 2007-03-07 2008-09-18 Nec Electronics Corp 位置ずれ量の測定用パターンおよび測定方法、ならびに半導体装置
JP4411331B2 (ja) * 2007-03-19 2010-02-10 信越化学工業株式会社 磁気記録媒体用シリコン基板およびその製造方法
JP2009204393A (ja) 2008-02-27 2009-09-10 Renesas Technology Corp プローブカード、プローブカードの製造方法、半導体検査装置および半導体装置の製造方法
US8334204B2 (en) 2008-07-24 2012-12-18 Tokyo Electron Limited Semiconductor device and manufacturing method therefor
US8105937B2 (en) * 2008-08-13 2012-01-31 International Business Machines Corporation Conformal adhesion promoter liner for metal interconnects
JP2010098195A (ja) * 2008-10-17 2010-04-30 Hitachi Cable Ltd 配線構造及び配線構造の製造方法
US8552563B2 (en) * 2009-04-07 2013-10-08 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional semiconductor architecture
JP5548396B2 (ja) * 2009-06-12 2014-07-16 三菱マテリアル株式会社 薄膜トランジスタ用配線層構造及びその製造方法
KR101559958B1 (ko) * 2009-12-18 2015-10-13 삼성전자주식회사 3차원 반도체 장치의 제조 방법 및 이에 따라 제조된 3차원 반도체 장치
DE102011083041B4 (de) * 2010-10-20 2018-06-07 Siltronic Ag Stützring zum Abstützen einer Halbleiterscheibe aus einkristallinem Silizium während einer Wärmebehandlung und Verfahren zur Wärmebehandlung einer solchen Halbleiterscheibe unter Verwendung eines solchen Stützrings
KR102014876B1 (ko) * 2011-07-08 2019-08-27 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
US8525339B2 (en) 2011-07-27 2013-09-03 International Business Machines Corporation Hybrid copper interconnect structure and method of fabricating same
JP5387627B2 (ja) * 2011-07-28 2014-01-15 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US20140230170A1 (en) * 2011-09-26 2014-08-21 Entegris, Inc. Post-cmp cleaning apparatus and method
JP2013105753A (ja) * 2011-11-10 2013-05-30 Toshiba Corp 半導体装置の製造方法
US9147584B2 (en) * 2011-11-16 2015-09-29 Taiwan Semiconductor Manufacturing Company, Ltd. Rotating curing
JP5870833B2 (ja) * 2012-04-24 2016-03-01 富士通セミコンダクター株式会社 半導体装置の製造方法
US8841208B2 (en) 2012-07-18 2014-09-23 International Business Machines Corporation Method of forming vertical electronic fuse interconnect structures including a conductive cap
JP2014027012A (ja) * 2012-07-24 2014-02-06 Toshiba Corp 半導体装置の製造方法および半導体装置の製造装置
GB2519493A (en) * 2012-08-14 2015-04-22 Powerdisc Dev Corp Ltd Fuel cells components, stacks and modular fuel cell systems
US9312203B2 (en) 2013-01-02 2016-04-12 Globalfoundries Inc. Dual damascene structure with liner
US8753975B1 (en) 2013-02-01 2014-06-17 Globalfoundries Inc. Methods of forming conductive copper-based structures using a copper-based nitride seed layer without a barrier layer and the resulting device
US8859419B2 (en) 2013-02-01 2014-10-14 Globalfoundries Inc. Methods of forming copper-based nitride liner/passivation layers for conductive copper structures and the resulting device
JP2016149486A (ja) * 2015-02-13 2016-08-18 東京エレクトロン株式会社 絶縁膜の成膜方法及び半導体デバイスの製造方法
US10510688B2 (en) * 2015-10-26 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Via rail solution for high power electromigration
CN107026113B (zh) * 2016-02-02 2020-03-31 中芯国际集成电路制造(上海)有限公司 半导体装置的制造方法和系统
US9824893B1 (en) 2016-06-28 2017-11-21 Lam Research Corporation Tin oxide thin film spacers in semiconductor device manufacturing
US12051589B2 (en) 2016-06-28 2024-07-30 Lam Research Corporation Tin oxide thin film spacers in semiconductor device manufacturing
KR102722138B1 (ko) * 2017-02-13 2024-10-24 램 리써치 코포레이션 에어 갭들을 생성하는 방법
US10546748B2 (en) 2017-02-17 2020-01-28 Lam Research Corporation Tin oxide films in semiconductor device manufacturing
WO2019152362A1 (en) 2018-01-30 2019-08-08 Lam Research Corporation Tin oxide mandrels in patterning
KR102841279B1 (ko) 2018-03-19 2025-07-31 램 리써치 코포레이션 챔퍼리스 (chamferless) 비아 통합 스킴 (scheme)
JP6807420B2 (ja) * 2019-02-21 2021-01-06 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム
US11551938B2 (en) 2019-06-27 2023-01-10 Lam Research Corporation Alternating etch and passivation process
US11089673B2 (en) * 2019-07-19 2021-08-10 Raytheon Company Wall for isolation enhancement
KR102795747B1 (ko) 2021-02-15 2025-04-16 삼성전자주식회사 반도체 소자 및 이의 제조 방법
TW202311555A (zh) 2021-04-21 2023-03-16 美商蘭姆研究公司 最小化錫氧化物腔室清潔時間

Family Cites Families (75)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3837929A (en) * 1970-08-28 1974-09-24 Olin Corp Method of producing tarnish resistant copper and copper alloys and products thereof
EP0261846B1 (en) * 1986-09-17 1992-12-02 Fujitsu Limited Method of forming a metallization film containing copper on the surface of a semiconductor device
US5130274A (en) 1991-04-05 1992-07-14 International Business Machines Corporation Copper alloy metallurgies for VLSI interconnection structures
JPH04354133A (ja) * 1991-05-31 1992-12-08 Sony Corp 銅配線の形成方法
US6146135A (en) * 1991-08-19 2000-11-14 Tadahiro Ohmi Oxide film forming method
JPH0547735A (ja) 1991-08-20 1993-02-26 Tadahiro Omi 洗浄装置
US5244534A (en) * 1992-01-24 1993-09-14 Micron Technology, Inc. Two-step chemical mechanical polishing process for producing flush and protruding tungsten plugs
JP3072807B2 (ja) 1992-07-15 2000-08-07 日本電信電話株式会社 半導体装置の製造方法
JP3156886B2 (ja) 1993-01-26 2001-04-16 日本電信電話株式会社 半導体装置の製造方法
JP3103241B2 (ja) 1993-03-26 2000-10-30 川崎製鉄株式会社 半導体装置の製造方法
US5391517A (en) * 1993-09-13 1995-02-21 Motorola Inc. Process for forming copper interconnect structure
US5395801A (en) * 1993-09-29 1995-03-07 Micron Semiconductor, Inc. Chemical-mechanical polishing processes of planarizing insulating layers
JP3326642B2 (ja) 1993-11-09 2002-09-24 ソニー株式会社 基板の研磨後処理方法およびこれに用いる研磨装置
US5447887A (en) * 1994-04-01 1995-09-05 Motorola, Inc. Method for capping copper in semiconductor devices
US5837929A (en) * 1994-07-05 1998-11-17 Mantron, Inc. Microelectronic thermoelectric device and systems incorporating such device
JP3397501B2 (ja) 1994-07-12 2003-04-14 株式会社東芝 研磨剤および研磨方法
JP2701751B2 (ja) * 1994-08-30 1998-01-21 日本電気株式会社 半導体装置の製造方法
JPH0982798A (ja) 1995-09-12 1997-03-28 Toshiba Corp 半導体装置およびその製造方法
US5744376A (en) * 1996-04-08 1998-04-28 Chartered Semiconductor Manufacturing Pte, Ltd Method of manufacturing copper interconnect with top barrier layer
JP3282496B2 (ja) 1996-05-17 2002-05-13 松下電器産業株式会社 半導体装置の製造方法
US5677244A (en) * 1996-05-20 1997-10-14 Motorola, Inc. Method of alloying an interconnect structure with copper
US5814557A (en) * 1996-05-20 1998-09-29 Motorola, Inc. Method of forming an interconnect structure
US5693563A (en) * 1996-07-15 1997-12-02 Chartered Semiconductor Manufacturing Pte Ltd. Etch stop for copper damascene process
US5875507A (en) 1996-07-15 1999-03-02 Oliver Design, Inc. Wafer cleaning apparatus
DE69734868T2 (de) 1996-07-25 2006-08-03 Dupont Air Products Nanomaterials L.L.C., Tempe Zusammensetzung und verfahren zum chemisch-mechanischen polieren
JPH1056014A (ja) 1996-08-12 1998-02-24 Sony Corp 基板処理方法
US5932486A (en) 1996-08-16 1999-08-03 Rodel, Inc. Apparatus and methods for recirculating chemical-mechanical polishing of semiconductor wafers
US5972792A (en) 1996-10-18 1999-10-26 Micron Technology, Inc. Method for chemical-mechanical planarization of a substrate on a fixed-abrasive polishing pad
US5818110A (en) * 1996-11-22 1998-10-06 International Business Machines Corporation Integrated circuit chip wiring structure with crossover capability and method of manufacturing the same
JP3150095B2 (ja) * 1996-12-12 2001-03-26 日本電気株式会社 多層配線構造の製造方法
JP3160545B2 (ja) 1997-01-28 2001-04-25 松下電器産業株式会社 埋め込み配線の形成方法
US6048789A (en) * 1997-02-27 2000-04-11 Vlsi Technology, Inc. IC interconnect formation with chemical-mechanical polishing and silica etching with solution of nitric and hydrofluoric acids
US6191007B1 (en) * 1997-04-28 2001-02-20 Denso Corporation Method for manufacturing a semiconductor substrate
JPH1116912A (ja) * 1997-06-25 1999-01-22 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置の製造装置
JP3463979B2 (ja) * 1997-07-08 2003-11-05 富士通株式会社 半導体装置の製造方法
US6171957B1 (en) * 1997-07-16 2001-01-09 Mitsubishi Denki Kabushiki Kaisha Manufacturing method of semiconductor device having high pressure reflow process
US6068879A (en) * 1997-08-26 2000-05-30 Lsi Logic Corporation Use of corrosion inhibiting compounds to inhibit corrosion of metal plugs in chemical-mechanical polishing
US6043153A (en) * 1997-09-25 2000-03-28 Advanced Micro Devices, Inc. Method for reducing electromigration in a copper interconnect
JP3371775B2 (ja) * 1997-10-31 2003-01-27 株式会社日立製作所 研磨方法
US6153043A (en) * 1998-02-06 2000-11-28 International Business Machines Corporation Elimination of photo-induced electrochemical dissolution in chemical mechanical polishing
JPH11251317A (ja) 1998-03-04 1999-09-17 Hitachi Ltd 半導体装置の製造方法および製造装置
US6174810B1 (en) 1998-04-06 2001-01-16 Motorola, Inc. Copper interconnect structure and method of formation
US6016000A (en) * 1998-04-22 2000-01-18 Cvc, Inc. Ultra high-speed chip semiconductor integrated circuit interconnect structure and fabrication method using free-space dielectrics
US6181012B1 (en) * 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
JP2000012543A (ja) 1998-06-23 2000-01-14 Hitachi Ltd 半導体集積回路装置の製造方法
US6211084B1 (en) * 1998-07-09 2001-04-03 Advanced Micro Devices, Inc. Method of forming reliable copper interconnects
US6165894A (en) * 1998-07-09 2000-12-26 Advanced Micro Devices, Inc. Method of reliably capping copper interconnects
JP2000040679A (ja) * 1998-07-24 2000-02-08 Hitachi Ltd 半導体集積回路装置の製造方法
JP3248492B2 (ja) * 1998-08-14 2002-01-21 日本電気株式会社 半導体装置及びその製造方法
JP4095731B2 (ja) 1998-11-09 2008-06-04 株式会社ルネサステクノロジ 半導体装置の製造方法及び半導体装置
US6355571B1 (en) * 1998-11-17 2002-03-12 Applied Materials, Inc. Method and apparatus for reducing copper oxidation and contamination in a semiconductor device
US6515343B1 (en) * 1998-11-19 2003-02-04 Quicklogic Corporation Metal-to-metal antifuse with non-conductive diffusion barrier
US6083840A (en) * 1998-11-25 2000-07-04 Arch Specialty Chemicals, Inc. Slurry compositions and method for the chemical-mechanical polishing of copper and copper alloys
US6596637B1 (en) * 1998-12-07 2003-07-22 Advanced Micro Devices, Inc. Chemically preventing Cu dendrite formation and growth by immersion
US6242349B1 (en) * 1998-12-09 2001-06-05 Advanced Micro Devices, Inc. Method of forming copper/copper alloy interconnection with reduced electromigration
US6153523A (en) 1998-12-09 2000-11-28 Advanced Micro Devices, Inc. Method of forming high density capping layers for copper interconnects with improved adhesion
JP2000183000A (ja) 1998-12-14 2000-06-30 Fujitsu Ltd 半導体装置の製造方法、製造装置及び検査装置
US6271595B1 (en) * 1999-01-14 2001-08-07 International Business Machines Corporation Method for improving adhesion to copper
JP3974284B2 (ja) * 1999-03-18 2007-09-12 株式会社東芝 半導体装置の製造方法
JP2000277612A (ja) 1999-03-29 2000-10-06 Nec Corp 半導体装置の製造方法
US20020000665A1 (en) * 1999-04-05 2002-01-03 Alexander L. Barr Semiconductor device conductive bump and interconnect barrier
JP4083342B2 (ja) 1999-04-09 2008-04-30 株式会社トクヤマ 研磨方法
JP2000306873A (ja) 1999-04-20 2000-11-02 Tokuyama Corp 研磨方法
JP2000315666A (ja) * 1999-04-28 2000-11-14 Hitachi Ltd 半導体集積回路装置の製造方法
JP3099002B1 (ja) 1999-06-25 2000-10-16 茂徳科技股▲ふん▼有限公司 2段階化学機械研磨方法
US6159857A (en) * 1999-07-08 2000-12-12 Taiwan Semiconductor Manufacturing Company Robust post Cu-CMP IMD process
JP4156137B2 (ja) 1999-07-19 2008-09-24 株式会社トクヤマ 金属膜用研磨剤
US6521532B1 (en) * 1999-07-22 2003-02-18 James A. Cunningham Method for making integrated circuit including interconnects with enhanced electromigration resistance
JP4554011B2 (ja) * 1999-08-10 2010-09-29 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
US6136680A (en) * 2000-01-21 2000-10-24 Taiwan Semiconductor Manufacturing Company Methods to improve copper-fluorinated silica glass interconnects
US6207552B1 (en) * 2000-02-01 2001-03-27 Advanced Micro Devices, Inc. Forming and filling a recess in interconnect for encapsulation to minimize electromigration
JP2001291720A (ja) * 2000-04-05 2001-10-19 Hitachi Ltd 半導体集積回路装置および半導体集積回路装置の製造方法
JP2002110679A (ja) * 2000-09-29 2002-04-12 Hitachi Ltd 半導体集積回路装置の製造方法
JP4535629B2 (ja) * 2001-02-21 2010-09-01 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP3668694B2 (ja) 2001-03-19 2005-07-06 株式会社日立製作所 半導体装置の製造方法

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