KR900001002A - 반도체집적회로 - Google Patents

반도체집적회로 Download PDF

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Publication number
KR900001002A
KR900001002A KR1019890008007A KR890008007A KR900001002A KR 900001002 A KR900001002 A KR 900001002A KR 1019890008007 A KR1019890008007 A KR 1019890008007A KR 890008007 A KR890008007 A KR 890008007A KR 900001002 A KR900001002 A KR 900001002A
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KR
South Korea
Prior art keywords
conductor
integrated circuit
semiconductor integrated
conductor layers
layer
Prior art date
Application number
KR1019890008007A
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English (en)
Other versions
KR920004179B1 (ko
Inventor
히로시 다카쿠라
데츠야 이이다
준케이 고토
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR900001002A publication Critical patent/KR900001002A/ko
Application granted granted Critical
Publication of KR920004179B1 publication Critical patent/KR920004179B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • H01L23/5286Arrangements of power or ground buses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5225Shielding layers formed together with wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음.

Description

반도체집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명에 따른 반도체집적회로의 개략적인 구성을 나타낸 단면도.
제 2 도는 본 발명에 따른 1실시예 장치의 단면도.
제 4 도는 반 발명에 따른 또 다른 실시예 장치의 단면도.
제 5 도는 제 4 도에 나타낸 실시예 장치의 일부를 발췌해서 나타낸 사시도.

Claims (3)

  1. 반도체기판(21)와, 이 기판(21)상에 형성된 절연층(32), 이 절연층(32)내에 형성되어 각각 서로다른 신호를 전달하는 배선으로 사용되는 다층구조의 복수의 제 1 도전체층(33, 37) 및, 이 복수의 제 1 도전체층중 인접하는 2개의 제 1 도전체층(33, 37)의 상호간에 설치되며 일정전위로 고정된 신호간섭방지용의 제 2 도전체층(39)을 구비해서 구성된 것을 특징으로 하는 반도체집적회로.
  2. 제 1 항에 있어서, 상지 제 2 도전체층(39)이 상기 절연층(32)내에 형성된 적어도 2층 이상의 도전체층(44, 46)으로 대체되어 구성된 것을 특징으로 하는 반도체집적회로.
  3. 제 2 항에 있어서, 상지 제 2 도전체층(39)에 대체되어 구성되는 적어도 2층이상의 도전체층(44, 46)이 상기 절연층(32)내에 형성된 제 3 도전체층(48)을 매개해서 전기적으로 접속되고, 상기 제 3 도전체층(48)이 상기 2개의 제 1 도전체층(33, 37)의 연장방향에 따라 상기 2개의 제 1 도전체층(33, 37)을 분리하도록 벽상으로 형성된 것을 특징으로 하는 반도체집적회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890008007A 1988-06-10 1989-06-10 반도체집적회로 KR920004179B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP63-141769 1988-06-10
JP88-141769 1988-06-10
JP63141769A JPH021928A (ja) 1988-06-10 1988-06-10 半導体集積回路

Publications (2)

Publication Number Publication Date
KR900001002A true KR900001002A (ko) 1990-01-31
KR920004179B1 KR920004179B1 (ko) 1992-05-30

Family

ID=15299748

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890008007A KR920004179B1 (ko) 1988-06-10 1989-06-10 반도체집적회로

Country Status (5)

Country Link
US (1) US4958222A (ko)
EP (1) EP0353426B1 (ko)
JP (1) JPH021928A (ko)
KR (1) KR920004179B1 (ko)
DE (1) DE68929486T2 (ko)

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KR100469892B1 (ko) * 2003-07-14 2005-02-02 (주) 팜텍21 농작물의 보존성 향상을 위한 육계나무 수피 추출물

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Also Published As

Publication number Publication date
DE68929486D1 (de) 2003-11-13
EP0353426A2 (en) 1990-02-07
US4958222A (en) 1990-09-18
JPH021928A (ja) 1990-01-08
EP0353426A3 (en) 1991-07-31
JPH0570302B2 (ko) 1993-10-04
EP0353426B1 (en) 2003-10-08
KR920004179B1 (ko) 1992-05-30
DE68929486T2 (de) 2004-07-22

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