KR880011927A - 반도체 기억장치 - Google Patents

반도체 기억장치 Download PDF

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Publication number
KR880011927A
KR880011927A KR1019880002341A KR880002341A KR880011927A KR 880011927 A KR880011927 A KR 880011927A KR 1019880002341 A KR1019880002341 A KR 1019880002341A KR 880002341 A KR880002341 A KR 880002341A KR 880011927 A KR880011927 A KR 880011927A
Authority
KR
South Korea
Prior art keywords
semiconductor memory
memory device
wiring
layered wiring
layer
Prior art date
Application number
KR1019880002341A
Other languages
English (en)
Inventor
아기히사 우지다
이지로우 미다무라
게이이지 히게다
Original Assignee
미다 가쓰시게
가부시기가이샤 히다찌 세이사구쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 미다 가쓰시게, 가부시기가이샤 히다찌 세이사구쇼 filed Critical 미다 가쓰시게
Publication of KR880011927A publication Critical patent/KR880011927A/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음

Description

반도체 기억장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예인 에미터 결합형 메모리 셀로 되는 스테이틱 RAM의 등가회로도,
제2도는 본 발명의 제2실시예인 에미터 결합형 메모리셀과 그 신호선의 배치도,
제3도는 제2도에 있어서의 II-II선에 따른 단면도.

Claims (3)

  1. 회로소자가 고밀도로 형성된 반도체 영역의 위쪽에 배치되는 동일신호에 관한 배선을 적어도 다층구조로 한 것을 특징으로 하는 반도체 기억장치.
  2. 특허청구의 범위 제1항에 있어서, 상기 다층구조의 배선의 강층과 하층이 양자를 분리하는 절연막으로 형성된 스루홀에서 서로 접촉되는 것을 특징으로 하는 반도체 기억장치.
  3. 특허청구의 범위 제1항에 있어서, 상기 다층구조의 배선은 스테이틱형 반도체 기억장치에 있어서의 선택적인 것을 특징으로 하는 반도체 기억장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880002341A 1987-03-18 1988-03-07 반도체 기억장치 KR880011927A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62061031A JP2569040B2 (ja) 1987-03-18 1987-03-18 半導体集積回路装置
JP62-61031 1987-03-18

Publications (1)

Publication Number Publication Date
KR880011927A true KR880011927A (ko) 1988-10-31

Family

ID=13159512

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880002341A KR880011927A (ko) 1987-03-18 1988-03-07 반도체 기억장치

Country Status (3)

Country Link
US (2) US4926378A (ko)
JP (1) JP2569040B2 (ko)
KR (1) KR880011927A (ko)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2611443B2 (ja) * 1989-08-23 1997-05-21 日本電気株式会社 半導体集積回路装置及びその製造方法
JP2533399B2 (ja) * 1990-05-25 1996-09-11 三菱電機株式会社 センスアンプ
US5222045A (en) * 1990-05-25 1993-06-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device operable with power supply voltage variation
KR940008722B1 (ko) * 1991-12-04 1994-09-26 삼성전자 주식회사 반도체 메모리 장치의 워드라인 드라이버 배열방법
JPH0774263A (ja) * 1993-09-02 1995-03-17 Fujitsu Ltd 半導体記憶装置
JP2658870B2 (ja) * 1994-04-22 1997-09-30 日本電気株式会社 半導体記憶装置およびその製造方法
US5400274A (en) * 1994-05-02 1995-03-21 Motorola Inc. Memory having looped global data lines for propagation delay matching
US5434816A (en) * 1994-06-23 1995-07-18 The United States Of America As Represented By The Secretary Of The Air Force Two-transistor dynamic random-access memory cell having a common read/write terminal
US5661047A (en) * 1994-10-05 1997-08-26 United Microelectronics Corporation Method for forming bipolar ROM device
DE69700241T2 (de) * 1996-03-01 1999-11-04 Mitsubishi Electric Corp Halbleiterspeichergerät, um Fehlfunktion durch Zeilenauswahlleitungsunterbrechung zu vermeiden
US5700707A (en) * 1996-06-13 1997-12-23 Chartered Semiconductor Manufacturing Pte Ltd. Method of manufacturing SRAM cell structure having a tunnel oxide capacitor
JPH11195711A (ja) 1997-10-27 1999-07-21 Seiko Epson Corp 半導体装置およびその製造方法
JPH11195753A (ja) * 1997-10-27 1999-07-21 Seiko Epson Corp 半導体装置およびその製造方法
US7818185B2 (en) * 2000-06-02 2010-10-19 Qualitymetric Incorporated Method, system and medium for assessing the impact of various ailments on health related quality of life
US9336860B1 (en) 2015-05-20 2016-05-10 International Business Machines Corporation Complementary bipolar SRAM

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3397393A (en) * 1965-08-10 1968-08-13 Ibm Capacitor read-only memory with plural information and ground planes
JPS56161668A (en) * 1980-05-16 1981-12-12 Hitachi Ltd Semiconductor device
JPS5835968A (ja) * 1981-08-28 1983-03-02 Hitachi Ltd 半導体記憶装置
JPS604253A (ja) * 1983-06-23 1985-01-10 Nec Corp 半導体集積回路メモリ
JPS60206164A (ja) * 1984-03-30 1985-10-17 Toshiba Corp 半導体メモリ装置
JPS60245271A (ja) * 1984-05-21 1985-12-05 Hitachi Ltd 半導体記憶装置
JPS6231154A (ja) * 1985-08-02 1987-02-10 Hitachi Ltd 半導体装置
US4809052A (en) * 1985-05-10 1989-02-28 Hitachi, Ltd. Semiconductor memory device
US4745580A (en) * 1986-06-09 1988-05-17 Laymoun Samir M Variable clamped memory cell
JP2511415B2 (ja) * 1986-06-27 1996-06-26 沖電気工業株式会社 半導体装置
US4809051A (en) * 1987-08-06 1989-02-28 National Semiconductor Corp. Vertical punch-through cell

Also Published As

Publication number Publication date
JPS63228666A (ja) 1988-09-22
JP2569040B2 (ja) 1997-01-08
US5029127A (en) 1991-07-02
US4926378A (en) 1990-05-15

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A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application