DE69700241T2 - Halbleiterspeichergerät, um Fehlfunktion durch Zeilenauswahlleitungsunterbrechung zu vermeiden - Google Patents

Halbleiterspeichergerät, um Fehlfunktion durch Zeilenauswahlleitungsunterbrechung zu vermeiden

Info

Publication number
DE69700241T2
DE69700241T2 DE69700241T DE69700241T DE69700241T2 DE 69700241 T2 DE69700241 T2 DE 69700241T2 DE 69700241 T DE69700241 T DE 69700241T DE 69700241 T DE69700241 T DE 69700241T DE 69700241 T2 DE69700241 T2 DE 69700241T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
malfunction due
prevent malfunction
interruption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69700241T
Other languages
English (en)
Other versions
DE69700241D1 (de
Inventor
Hiromi Okimoto
Masanori Hayashikoshi
Youichi Tobita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69700241D1 publication Critical patent/DE69700241D1/de
Application granted granted Critical
Publication of DE69700241T2 publication Critical patent/DE69700241T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
    • G11C29/832—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption with disconnection of faulty elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
DE69700241T 1996-03-01 1997-02-25 Halbleiterspeichergerät, um Fehlfunktion durch Zeilenauswahlleitungsunterbrechung zu vermeiden Expired - Lifetime DE69700241T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4525596 1996-03-01
JP19820496 1996-07-26

Publications (2)

Publication Number Publication Date
DE69700241D1 DE69700241D1 (de) 1999-07-08
DE69700241T2 true DE69700241T2 (de) 1999-11-04

Family

ID=26385224

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69700241T Expired - Lifetime DE69700241T2 (de) 1996-03-01 1997-02-25 Halbleiterspeichergerät, um Fehlfunktion durch Zeilenauswahlleitungsunterbrechung zu vermeiden
DE69704204T Expired - Lifetime DE69704204T2 (de) 1996-03-01 1997-02-25 Halbleiterspeichergerät, um Fehlfunktion durch Spaltenauswahlleitungsunterbrechung oder Zeilenauswahlleitungsunterbrechung zu vermeiden

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69704204T Expired - Lifetime DE69704204T2 (de) 1996-03-01 1997-02-25 Halbleiterspeichergerät, um Fehlfunktion durch Spaltenauswahlleitungsunterbrechung oder Zeilenauswahlleitungsunterbrechung zu vermeiden

Country Status (3)

Country Link
US (2) US5825694A (de)
EP (2) EP0793176B1 (de)
DE (2) DE69700241T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5371400B2 (ja) 2007-12-14 2013-12-18 株式会社半導体エネルギー研究所 メモリ及び半導体装置
US7692975B2 (en) * 2008-05-09 2010-04-06 Micron Technology, Inc. System and method for mitigating reverse bias leakage

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3810124A (en) * 1972-06-30 1974-05-07 Ibm Memory accessing system
US4368523A (en) * 1979-12-20 1983-01-11 Tokyo Shibaura Denki Kabushiki Kaisha Liquid crystal display device having redundant pairs of address buses
JPS5960794A (ja) * 1982-09-29 1984-04-06 Fujitsu Ltd ダイナミツク型半導体記憶装置
CA1208558A (en) * 1982-10-07 1986-07-29 Kazuo Kigasawa Soft buccal
JPS59116985A (ja) * 1982-11-29 1984-07-06 Fujitsu Ltd 半導体記憶装置
JPS60206164A (ja) * 1984-03-30 1985-10-17 Toshiba Corp 半導体メモリ装置
JPS6212997A (ja) * 1985-07-10 1987-01-21 Mitsubishi Electric Corp 半導体記憶装置
JPS6290950A (ja) * 1985-10-16 1987-04-25 Mitsubishi Electric Corp 半導体装置
JPS63308386A (ja) * 1987-01-30 1988-12-15 Sony Corp 半導体装置とその製造方法
JP2569040B2 (ja) * 1987-03-18 1997-01-08 株式会社日立製作所 半導体集積回路装置
US5204842A (en) * 1987-08-05 1993-04-20 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory with memory unit comprising a plurality of memory blocks
JPS6481250A (en) * 1987-09-22 1989-03-27 Nec Corp Semiconductor memory device having multilayer metal wiring structure
JPH01184787A (ja) * 1988-01-19 1989-07-24 Toshiba Corp 半導体メモリ
US5161121A (en) * 1988-06-27 1992-11-03 Oki Electric Industry Co., Ltd. Random access memory including word line clamping circuits
JPH027286A (ja) * 1988-06-27 1990-01-11 Oki Electric Ind Co Ltd ダイナミックｒａｍ
JPH0417197A (ja) * 1990-05-10 1992-01-21 Mitsubishi Electric Corp 半導体メモリ装置
JPH04127470A (ja) * 1990-09-19 1992-04-28 Hitachi Ltd 半導体記憶装置
JP2617617B2 (ja) * 1990-11-16 1997-06-04 九州日本電気株式会社 半導体メモリ
JP3226579B2 (ja) * 1991-12-24 2001-11-05 沖電気工業株式会社 半導体記憶装置
JPH05210978A (ja) * 1992-01-31 1993-08-20 Sharp Corp 半導体記憶装置
JP3072871B2 (ja) * 1992-03-19 2000-08-07 株式会社東芝 半導体メモリ装置
US5406526A (en) * 1992-10-01 1995-04-11 Nec Corporation Dynamic random access memory device having sense amplifier arrays selectively activated when associated memory cell sub-arrays are accessed
US5465233A (en) * 1993-05-28 1995-11-07 Sgs-Thomson Microelectronics, Inc. Structure for deselecting broken select lines in memory arrays
JP3354231B2 (ja) * 1993-09-29 2002-12-09 三菱電機エンジニアリング株式会社 半導体装置
JP3364549B2 (ja) * 1995-02-22 2003-01-08 三菱電機株式会社 半導体記憶装置

Also Published As

Publication number Publication date
DE69700241D1 (de) 1999-07-08
EP0793176B1 (de) 1999-06-02
US5986915A (en) 1999-11-16
DE69704204T2 (de) 2001-07-12
US5825694A (en) 1998-10-20
EP0915421A3 (de) 1999-06-23
EP0793176A2 (de) 1997-09-03
EP0793176A3 (de) 1997-09-17
EP0915421A2 (de) 1999-05-12
EP0915421B1 (de) 2001-03-07
DE69704204D1 (de) 2001-04-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition