DE69629598D1 - Synchron-halbleiterspeichervorrichtung - Google Patents

Synchron-halbleiterspeichervorrichtung

Info

Publication number
DE69629598D1
DE69629598D1 DE69629598T DE69629598T DE69629598D1 DE 69629598 D1 DE69629598 D1 DE 69629598D1 DE 69629598 T DE69629598 T DE 69629598T DE 69629598 T DE69629598 T DE 69629598T DE 69629598 D1 DE69629598 D1 DE 69629598D1
Authority
DE
Germany
Prior art keywords
memory device
synchronous memory
device semiconductor
semiconductor
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69629598T
Other languages
English (en)
Other versions
DE69629598T2 (de
Inventor
Mikio Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69629598D1 publication Critical patent/DE69629598D1/de
Application granted granted Critical
Publication of DE69629598T2 publication Critical patent/DE69629598T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045Read-write mode select circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
DE69629598T 1996-09-26 1996-09-26 Synchron-halbleiterspeichervorrichtung Expired - Fee Related DE69629598T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP1996/002781 WO1998013828A1 (fr) 1996-09-26 1996-09-26 Memoire a semi-conducteur du type synchrone

Publications (2)

Publication Number Publication Date
DE69629598D1 true DE69629598D1 (de) 2003-09-25
DE69629598T2 DE69629598T2 (de) 2004-06-24

Family

ID=14153887

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69629598T Expired - Fee Related DE69629598T2 (de) 1996-09-26 1996-09-26 Synchron-halbleiterspeichervorrichtung

Country Status (4)

Country Link
US (1) US6064627A (de)
EP (1) EP0929075B1 (de)
DE (1) DE69629598T2 (de)
WO (1) WO1998013828A1 (de)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3092557B2 (ja) * 1997-09-16 2000-09-25 日本電気株式会社 半導体記憶装置
JP3204384B2 (ja) * 1997-12-10 2001-09-04 エヌイーシーマイクロシステム株式会社 半導体記憶回路
JP2000030456A (ja) * 1998-07-14 2000-01-28 Fujitsu Ltd メモリデバイス
JP2000163969A (ja) * 1998-09-16 2000-06-16 Fujitsu Ltd 半導体記憶装置
JP2000242565A (ja) * 1999-02-19 2000-09-08 Nec Corp 無線携帯端末
US6240044B1 (en) * 1999-07-29 2001-05-29 Fujitsu Limited High speed address sequencer
AU2001251168A1 (en) * 2000-03-30 2001-10-15 Micron Technology, Inc. Synchronous flash memory
US7073014B1 (en) 2000-07-28 2006-07-04 Micron Technology, Inc. Synchronous non-volatile memory system
EP1269473B1 (de) * 2000-03-30 2014-06-11 Round Rock Research, LLC Synchroner flash-speicher mit nicht flüchtigem betriebsart-register
US6785764B1 (en) 2000-05-11 2004-08-31 Micron Technology, Inc. Synchronous flash memory with non-volatile mode register
US6728161B1 (en) * 2000-06-30 2004-04-27 Micron Technology, Inc. Zero latency-zero bus turnaround synchronous flash memory
JP2002025272A (ja) 2000-07-10 2002-01-25 Sharp Corp 半導体記憶装置およびその評価方法
US6728798B1 (en) * 2000-07-28 2004-04-27 Micron Technology, Inc. Synchronous flash memory with status burst output
KR20020014563A (ko) * 2000-08-18 2002-02-25 윤종용 반도체 메모리 장치
US6691204B1 (en) * 2000-08-25 2004-02-10 Micron Technology, Inc. Burst write in a non-volatile memory device
GB2370667B (en) * 2000-09-05 2003-02-12 Samsung Electronics Co Ltd Semiconductor memory device having altered clock frequency for address and/or command signals, and memory module and system having the same
US6898683B2 (en) * 2000-12-19 2005-05-24 Fujitsu Limited Clock synchronized dynamic memory and clock synchronized integrated circuit
JP4745528B2 (ja) * 2001-05-17 2011-08-10 富士通セミコンダクター株式会社 レジスタの設定方法及び半導体装置
JP4078119B2 (ja) * 2002-04-15 2008-04-23 富士通株式会社 半導体メモリ
KR100546339B1 (ko) * 2003-07-04 2006-01-26 삼성전자주식회사 차동 데이터 스트로빙 모드와 데이터 반전 스킴을 가지는단일 데이터 스트로빙 모드를 선택적으로 구현할 수 있는반도체 장치
CA2479868A1 (en) * 2003-09-02 2005-03-02 Ronald E. Brick Light fixture
DE102004050037B4 (de) * 2003-10-09 2015-01-08 Samsung Electronics Co., Ltd. Speicherbauelement, Speichersystem und Betriebsmodussetzverfahren
KR100560773B1 (ko) * 2003-10-09 2006-03-13 삼성전자주식회사 동작 모드의 재설정없이 버스트 길이를 제어할 수 있는반도체 메모리 장치 및 그것을 포함하는 메모리 시스템
US7652922B2 (en) * 2005-09-30 2010-01-26 Mosaid Technologies Incorporated Multiple independent serial link memory
US11948629B2 (en) 2005-09-30 2024-04-02 Mosaid Technologies Incorporated Non-volatile memory device with concurrent bank operations
KR101293365B1 (ko) 2005-09-30 2013-08-05 모사이드 테크놀로지스 인코퍼레이티드 출력 제어 메모리
US7436708B2 (en) 2006-03-01 2008-10-14 Micron Technology, Inc. NAND memory device column charging
JP5011818B2 (ja) * 2006-05-19 2012-08-29 富士通セミコンダクター株式会社 半導体記憶装置及びその試験方法
KR100902048B1 (ko) * 2007-05-14 2009-06-15 주식회사 하이닉스반도체 반도체 장치의 어드레스 수신회로
KR100909625B1 (ko) * 2007-06-27 2009-07-27 주식회사 하이닉스반도체 어드레스 동기 회로
US7688652B2 (en) * 2007-07-18 2010-03-30 Mosaid Technologies Incorporated Storage of data in memory via packet strobing
US8825967B2 (en) 2011-12-08 2014-09-02 Conversant Intellectual Property Management Inc. Independent write and read control in serially-connected devices
KR102164019B1 (ko) * 2014-01-27 2020-10-12 에스케이하이닉스 주식회사 버스트 랭스 제어 장치 및 이를 포함하는 반도체 장치

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4698750A (en) * 1984-12-27 1987-10-06 Motorola, Inc. Security for integrated circuit microcomputer with EEPROM
JPS63206852A (ja) * 1987-02-24 1988-08-26 Hitachi Maxell Ltd シングルチツプlsi
JPS6423548A (en) * 1987-07-20 1989-01-26 Hitachi Ltd Semiconductor integrated circuit device
JPH0335498A (ja) * 1989-06-30 1991-02-15 Mitsubishi Electric Corp 半導体記憶装置
JP2865807B2 (ja) * 1990-05-28 1999-03-08 株式会社東芝 半導体記憶システム
JP3379761B2 (ja) * 1991-07-02 2003-02-24 株式会社日立製作所 不揮発性記憶装置
KR100274099B1 (ko) * 1991-08-02 2001-01-15 비센트 비.인그라시아 점진적으로 프로그램가능한 비휘발성 메모리 및 이를 구비한 집적 회로와 비휘발성 메모리 프로그래밍 방법
JP3080520B2 (ja) * 1993-09-21 2000-08-28 富士通株式会社 シンクロナスdram
JPH0863444A (ja) * 1994-08-22 1996-03-08 Mitsubishi Denki Semiconductor Software Kk Eeprom内蔵マイクロコンピュータ及びeeprom内蔵マイクロコンピュータの製造方法
JPH08124380A (ja) * 1994-10-20 1996-05-17 Hitachi Ltd 半導体メモリ及び半導体メモリアクセス方法
JP3986578B2 (ja) * 1996-01-17 2007-10-03 三菱電機株式会社 同期型半導体記憶装置
US5784328A (en) * 1996-12-23 1998-07-21 Lsi Logic Corporation Memory system including an on-chip temperature sensor for regulating the refresh rate of a DRAM array
KR100252253B1 (ko) * 1997-01-04 2000-05-01 윤종용 전기 소거식 프로그램어블 롬

Also Published As

Publication number Publication date
WO1998013828A1 (fr) 1998-04-02
US6064627A (en) 2000-05-16
EP0929075B1 (de) 2003-08-20
DE69629598T2 (de) 2004-06-24
EP0929075A4 (de) 1999-08-25
EP0929075A1 (de) 1999-07-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee