KR960012510A - 반도체 메모리 장치 - Google Patents
반도체 메모리 장치 Download PDFInfo
- Publication number
- KR960012510A KR960012510A KR1019950032617A KR19950032617A KR960012510A KR 960012510 A KR960012510 A KR 960012510A KR 1019950032617 A KR1019950032617 A KR 1019950032617A KR 19950032617 A KR19950032617 A KR 19950032617A KR 960012510 A KR960012510 A KR 960012510A
- Authority
- KR
- South Korea
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/835—Masking faults in memories by using spares or by reconfiguring using programmable devices with roll call arrangements for redundant substitutions
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP94-259590 | 1994-09-30 | ||
JP6259590A JP2785717B2 (ja) | 1994-09-30 | 1994-09-30 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960012510A true KR960012510A (ko) | 1996-04-20 |
KR100213850B1 KR100213850B1 (ko) | 1999-08-02 |
Family
ID=17336226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950032617A KR100213850B1 (ko) | 1994-09-30 | 1995-09-29 | 반도체 메모리 장치 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5596542A (ko) |
JP (1) | JP2785717B2 (ko) |
KR (1) | KR100213850B1 (ko) |
CN (2) | CN1525569A (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102390200B1 (ko) * | 2021-03-31 | 2022-04-25 | 한국에스에스(주) | 알루미늄 하니컴 구조체의 압출장치 및 압출방법 |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2800730B2 (ja) * | 1995-08-17 | 1998-09-21 | 日本電気株式会社 | 半導体記憶装置 |
KR0164358B1 (ko) * | 1995-08-31 | 1999-02-18 | 김광호 | 반도체 메모리 장치의 서브워드라인 디코더 |
EP0768672B1 (en) * | 1995-09-29 | 2001-04-04 | STMicroelectronics S.r.l. | Hierarchic memory device |
US5848006A (en) * | 1995-12-06 | 1998-12-08 | Nec Corporation | Redundant semiconductor memory device using a single now address decoder for driving both sub-wordlines and redundant sub-wordlines |
JP3223817B2 (ja) * | 1996-11-08 | 2001-10-29 | 日本電気株式会社 | 半導体メモリ装置及びその駆動方法 |
JPH10241398A (ja) * | 1997-02-28 | 1998-09-11 | Nec Corp | 半導体メモリ装置 |
US5933376A (en) * | 1997-02-28 | 1999-08-03 | Lucent Technologies Inc. | Semiconductor memory device with electrically programmable redundancy |
US6191999B1 (en) * | 1997-06-20 | 2001-02-20 | Fujitsu Limited | Semiconductor memory device with reduced power consumption |
KR100521313B1 (ko) * | 1997-09-11 | 2006-01-12 | 삼성전자주식회사 | 반도체메모리장치의불량셀테스트방법 |
JPH11144494A (ja) | 1997-11-12 | 1999-05-28 | Nec Corp | 半導体メモリ |
DE19813504A1 (de) * | 1998-03-26 | 1999-09-30 | Siemens Ag | Schaltungsanordnung und Verfahren zur automatischen Erkennung und Beseitigung von Wortleitungs-Bitleitungs-Kurzschlüssen |
JPH11354744A (ja) * | 1998-06-09 | 1999-12-24 | Matsushita Electric Ind Co Ltd | 半導体メモリ装置 |
US6469947B2 (en) | 1999-06-29 | 2002-10-22 | Hyundai Electronics Co., Ltd. | Semiconductor memory device having regions with independent word lines alternately selected for refresh operation |
KR100361863B1 (ko) | 1999-06-29 | 2002-11-22 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
US6545923B2 (en) | 2001-05-04 | 2003-04-08 | Samsung Electronics Co., Ltd. | Negatively biased word line scheme for a semiconductor memory device |
WO2004077444A1 (ja) | 2003-02-27 | 2004-09-10 | Fujitsu Limited | 半導体記憶装置及びそのリフレッシュ方法 |
JP4703148B2 (ja) * | 2004-09-08 | 2011-06-15 | 株式会社東芝 | 不揮発性半導体記憶装置 |
CN101091223B (zh) | 2004-12-24 | 2011-06-08 | 斯班逊有限公司 | 施加偏压至储存器件的方法与装置 |
JP2007257707A (ja) * | 2006-03-22 | 2007-10-04 | Elpida Memory Inc | 半導体記憶装置 |
KR100899392B1 (ko) * | 2007-08-20 | 2009-05-27 | 주식회사 하이닉스반도체 | 리프레시 특성 테스트 회로 및 이를 이용한 리프레시 특성테스트 방법 |
US20090307891A1 (en) * | 2008-06-17 | 2009-12-17 | Ge-Hitachi Nuclear Energy Americas Llc | Method and apparatus for remotely inspecting and/or treating welds, pipes, vessels and/or other components used in reactor coolant systems or other process applications |
KR20170027493A (ko) * | 2015-09-02 | 2017-03-10 | 에스케이하이닉스 주식회사 | 반도체 장치의 레이아웃 구조 |
KR20210110012A (ko) | 2020-02-28 | 2021-09-07 | 에스케이하이닉스 주식회사 | 서브 워드라인 드라이버 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3311427A1 (de) * | 1983-03-29 | 1984-10-04 | Siemens AG, 1000 Berlin und 8000 München | Integrierter dynamischer schreib-lesespeicher |
JPH03225851A (ja) * | 1990-01-30 | 1991-10-04 | Sharp Corp | 半導体記憶装置 |
JPH04155692A (ja) * | 1990-10-18 | 1992-05-28 | Nec Ic Microcomput Syst Ltd | 半導体メモリの行デコーダ回路 |
KR940008722B1 (ko) * | 1991-12-04 | 1994-09-26 | 삼성전자 주식회사 | 반도체 메모리 장치의 워드라인 드라이버 배열방법 |
JP2867774B2 (ja) * | 1992-01-06 | 1999-03-10 | 日本電気株式会社 | 半導体メモリ装置 |
JPH05243386A (ja) * | 1992-02-27 | 1993-09-21 | Mitsubishi Electric Corp | 半導体記憶装置 |
-
1994
- 1994-09-30 JP JP6259590A patent/JP2785717B2/ja not_active Expired - Fee Related
-
1995
- 1995-09-29 KR KR1019950032617A patent/KR100213850B1/ko not_active IP Right Cessation
- 1995-09-29 US US08/536,189 patent/US5596542A/en not_active Expired - Fee Related
- 1995-09-30 CN CNA021055343A patent/CN1525569A/zh active Pending
- 1995-09-30 CN CN95118686A patent/CN1096080C/zh not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102390200B1 (ko) * | 2021-03-31 | 2022-04-25 | 한국에스에스(주) | 알루미늄 하니컴 구조체의 압출장치 및 압출방법 |
Also Published As
Publication number | Publication date |
---|---|
CN1096080C (zh) | 2002-12-11 |
US5596542A (en) | 1997-01-21 |
JPH08102529A (ja) | 1996-04-16 |
CN1153387A (zh) | 1997-07-02 |
JP2785717B2 (ja) | 1998-08-13 |
KR100213850B1 (ko) | 1999-08-02 |
CN1525569A (zh) | 2004-09-01 |
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E701 | Decision to grant or registration of patent right | ||
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FPAY | Annual fee payment |
Payment date: 20040507 Year of fee payment: 6 |
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LAPS | Lapse due to unpaid annual fee |