DE69520254D1 - Halbleiterspeicher - Google Patents

Halbleiterspeicher

Info

Publication number
DE69520254D1
DE69520254D1 DE69520254T DE69520254T DE69520254D1 DE 69520254 D1 DE69520254 D1 DE 69520254D1 DE 69520254 T DE69520254 T DE 69520254T DE 69520254 T DE69520254 T DE 69520254T DE 69520254 D1 DE69520254 D1 DE 69520254D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69520254T
Other languages
English (en)
Other versions
DE69520254T2 (de
Inventor
Junichi Okamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69520254D1 publication Critical patent/DE69520254D1/de
Application granted granted Critical
Publication of DE69520254T2 publication Critical patent/DE69520254T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE69520254T 1994-11-10 1995-10-13 Halbleiterspeicher Expired - Lifetime DE69520254T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27625994A JP3160480B2 (ja) 1994-11-10 1994-11-10 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69520254D1 true DE69520254D1 (de) 2001-04-12
DE69520254T2 DE69520254T2 (de) 2001-08-09

Family

ID=17566941

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69520254T Expired - Lifetime DE69520254T2 (de) 1994-11-10 1995-10-13 Halbleiterspeicher

Country Status (7)

Country Link
US (1) US5619472A (de)
EP (1) EP0712132B1 (de)
JP (1) JP3160480B2 (de)
KR (1) KR100196816B1 (de)
CN (1) CN1052812C (de)
DE (1) DE69520254T2 (de)
TW (1) TW283217B (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3013773B2 (ja) * 1996-03-22 2000-02-28 日本電気株式会社 半導体装置
US5995404A (en) * 1996-07-11 1999-11-30 Texas Instruments Incorporated DRAM architecture with aligned data storage and bond pads
US6355578B1 (en) * 1997-10-14 2002-03-12 Texas Instruments Incorporated Manufacturing method for a composite device
KR100311035B1 (ko) * 1997-11-21 2002-02-28 윤종용 효율적으로 배치된 패드들을 갖는 반도체 메모리 장치
US5896310A (en) * 1997-12-24 1999-04-20 Texas Instruments Incorporated Multiple bank memory with over-the-array conductors programmable for providing either column factor or y-decoder power connectivity
JP3996267B2 (ja) * 1998-05-12 2007-10-24 エルピーダメモリ株式会社 半導体記憶装置
JP2954165B1 (ja) * 1998-05-20 1999-09-27 日本電気アイシーマイコンシステム株式会社 半導体装置
US6072699A (en) * 1998-07-21 2000-06-06 Intel Corporation Method and apparatus for matching trace lengths of signal lines making 90°/180° turns
KR100302597B1 (ko) * 1998-12-04 2001-09-22 김영환 반도체메모리구조
JP3707943B2 (ja) * 1998-12-24 2005-10-19 株式会社東芝 半導体記憶装置
US6727533B2 (en) * 2000-11-29 2004-04-27 Fujitsu Limited Semiconductor apparatus having a large-size bus connection
KR100400311B1 (ko) 2001-06-29 2003-10-01 주식회사 하이닉스반도체 반도체 메모리 소자의 신호 지연 제어 장치
JP2003100876A (ja) * 2001-09-21 2003-04-04 Mitsubishi Electric Corp 半導体集積回路装置
US6795365B2 (en) * 2002-08-23 2004-09-21 Micron Technology, Inc. DRAM power bus control
JP4970722B2 (ja) 2004-12-16 2012-07-11 エルピーダメモリ株式会社 半導体チップ及び半導体メモリ装置
JP4693656B2 (ja) * 2006-03-06 2011-06-01 株式会社東芝 不揮発性半導体記憶装置
JP4497327B2 (ja) * 2006-12-19 2010-07-07 エルピーダメモリ株式会社 半導体記憶装置
JP2009009633A (ja) 2007-06-27 2009-01-15 Elpida Memory Inc 半導体記憶装置
CN101345028B (zh) * 2007-07-10 2011-09-28 联詠科技股份有限公司 用于显示器读取存储器数据的电路系统
JP2010171331A (ja) * 2009-01-26 2010-08-05 Elpida Memory Inc 半導体装置
JP2010262700A (ja) 2009-05-07 2010-11-18 Elpida Memory Inc 半導体装置
CN102884197A (zh) 2010-01-29 2013-01-16 诺维信公司 具有酶预处理的沼气生产方法
JP2015176632A (ja) 2014-03-18 2015-10-05 マイクロン テクノロジー， インク． 半導体装置
CN113934372A (zh) * 2021-10-13 2022-01-14 长江先进存储产业创新中心有限责任公司 存储器及其控制系统

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2565213B2 (ja) * 1989-10-27 1996-12-18 ソニー株式会社 読み出し専用メモリ装置
ATE101746T1 (de) * 1989-11-24 1994-03-15 Siemens Ag Halbleiterspeicher.
US5467300A (en) * 1990-06-14 1995-11-14 Creative Integrated Systems, Inc. Grounded memory core for Roms, Eproms, and EEpproms having an address decoder, and sense amplifier
US5355369A (en) * 1991-04-26 1994-10-11 At&T Bell Laboratories High-speed integrated circuit testing with JTAG
US5604710A (en) * 1994-05-20 1997-02-18 Mitsubishi Denki Kabushiki Kaisha Arrangement of power supply and data input/output pads in semiconductor memory device

Also Published As

Publication number Publication date
EP0712132B1 (de) 2001-03-07
KR100196816B1 (ko) 1999-06-15
EP0712132A2 (de) 1996-05-15
EP0712132A3 (de) 1998-11-25
US5619472A (en) 1997-04-08
CN1131815A (zh) 1996-09-25
DE69520254T2 (de) 2001-08-09
CN1052812C (zh) 2000-05-24
KR960019737A (ko) 1996-06-17
JPH08139287A (ja) 1996-05-31
JP3160480B2 (ja) 2001-04-25
TW283217B (de) 1996-08-11

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Legal Events

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