KR960012033A - 반도체 기억장치 - Google Patents
반도체 기억장치 Download PDFInfo
- Publication number
- KR960012033A KR960012033A KR1019950026466A KR19950026466A KR960012033A KR 960012033 A KR960012033 A KR 960012033A KR 1019950026466 A KR1019950026466 A KR 1019950026466A KR 19950026466 A KR19950026466 A KR 19950026466A KR 960012033 A KR960012033 A KR 960012033A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor memory
- semiconductor
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP94-212436 | 1994-09-06 | ||
JP6212436A JPH0877776A (ja) | 1994-09-06 | 1994-09-06 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960012033A true KR960012033A (ko) | 1996-04-20 |
KR100200891B1 KR100200891B1 (ko) | 1999-06-15 |
Family
ID=16622578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950026466A KR100200891B1 (ko) | 1994-09-06 | 1995-08-24 | 반도체 기억장치 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5579266A (ko) |
JP (1) | JPH0877776A (ko) |
KR (1) | KR100200891B1 (ko) |
TW (1) | TW310426B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220125651A (ko) * | 2021-03-05 | 2022-09-14 | 이강암 | 자동 장돌 머신 및 이를 이용한 장돌 제조 방법 |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100196515B1 (ko) * | 1995-06-30 | 1999-06-15 | 김영환 | 반도체 메모리 장치의 리던던시 회로 |
JPH10214497A (ja) * | 1997-01-31 | 1998-08-11 | Mitsubishi Electric Corp | 半導体記憶装置 |
US5898626A (en) * | 1997-06-19 | 1999-04-27 | Silicon Magic Corporation | Redundancy programming circuit and system for semiconductor memory |
JP3638757B2 (ja) * | 1997-06-24 | 2005-04-13 | 株式会社 沖マイクロデザイン | 半導体集積回路 |
JPH11121627A (ja) * | 1997-10-16 | 1999-04-30 | Oki Electric Ind Co Ltd | 半導体メモリ |
US6108797A (en) * | 1997-12-11 | 2000-08-22 | Winbond Electronics Corp. | Method and system for loading microprograms in partially defective memory |
US6141768A (en) * | 1998-03-12 | 2000-10-31 | Winbond Electronics Corp. | Self-corrective memory system and method |
US6268760B1 (en) | 1998-04-30 | 2001-07-31 | Texas Instruments Incorporated | Hysteretic fuse control circuit with serial interface fusing |
US6370655B1 (en) | 1998-10-19 | 2002-04-09 | Winbond Electronics Corp. | Method and system for reversed-sequence code loading into partially defective memory |
US6185135B1 (en) | 1999-01-05 | 2001-02-06 | International Business Machines Corporation | Robust wordline activation delay monitor using a plurality of sample wordlines |
US6115310A (en) * | 1999-01-05 | 2000-09-05 | International Business Machines Corporation | Wordline activation delay monitor using sample wordline located in data-storing array |
US6335891B1 (en) | 1999-02-25 | 2002-01-01 | Micron Technology, Inc. | Device and method for reducing standby current in a memory device by disconnecting bit line load devices in unused columns of the memory device from a supply voltage |
US6285619B1 (en) * | 1999-11-18 | 2001-09-04 | Infineon Technologies North America Corp. | Memory cell |
TW449685B (en) | 1999-12-21 | 2001-08-11 | Winbond Electronics Corp | Handling method and system for partial defective memory |
JP2001195893A (ja) | 2000-01-13 | 2001-07-19 | Mitsubishi Electric Corp | スタティック型半導体記憶装置 |
US6744681B2 (en) * | 2001-07-24 | 2004-06-01 | Hewlett-Packard Development Company, L.P. | Fault-tolerant solid state memory |
US7222274B2 (en) * | 2004-02-25 | 2007-05-22 | International Business Machines Corporation | Testing and repair methodology for memories having redundancy |
US20120106016A1 (en) * | 2010-10-27 | 2012-05-03 | Thermaltherapeutic Systems, Inc. | Fuse Link System For A Hyperthermia Apparatus |
US20120105136A1 (en) * | 2010-10-27 | 2012-05-03 | Thermaltherapeutic Systems, Inc. | Fuse link system for disposable component |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0262800A (ja) * | 1988-08-29 | 1990-03-02 | Nec Corp | 半導体集積回路 |
JPH02177087A (ja) * | 1988-12-27 | 1990-07-10 | Nec Corp | リダンダンシーデコーダ |
US5471426A (en) * | 1992-01-31 | 1995-11-28 | Sgs-Thomson Microelectronics, Inc. | Redundancy decoder |
KR960008825B1 (en) * | 1993-11-18 | 1996-07-05 | Samsung Electronics Co Ltd | Row redundancy circuit and method of semiconductor memory device with double row decoder |
US5446698A (en) * | 1994-06-30 | 1995-08-29 | Sgs-Thomson Microelectronics, Inc. | Block decoded redundant master wordline |
-
1994
- 1994-09-06 JP JP6212436A patent/JPH0877776A/ja active Pending
- 1994-09-13 TW TW083108433A patent/TW310426B/zh active
-
1995
- 1995-06-05 US US08/460,943 patent/US5579266A/en not_active Expired - Fee Related
- 1995-08-24 KR KR1019950026466A patent/KR100200891B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220125651A (ko) * | 2021-03-05 | 2022-09-14 | 이강암 | 자동 장돌 머신 및 이를 이용한 장돌 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
TW310426B (ko) | 1997-07-11 |
JPH0877776A (ja) | 1996-03-22 |
US5579266A (en) | 1996-11-26 |
KR100200891B1 (ko) | 1999-06-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |