KR960011705A - 반도체 메모리 장치 - Google Patents
반도체 메모리 장치 Download PDFInfo
- Publication number
- KR960011705A KR960011705A KR1019950031142A KR19950031142A KR960011705A KR 960011705 A KR960011705 A KR 960011705A KR 1019950031142 A KR1019950031142 A KR 1019950031142A KR 19950031142 A KR19950031142 A KR 19950031142A KR 960011705 A KR960011705 A KR 960011705A
- Authority
- KR
- South Korea
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6227723A JP2616712B2 (ja) | 1994-09-22 | 1994-09-22 | 半導体記憶装置 |
| JP94-227723 | 1994-09-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960011705A true KR960011705A (ko) | 1996-04-20 |
| KR100186848B1 KR100186848B1 (ko) | 1999-05-15 |
Family
ID=16865353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950031142A KR100186848B1 (ko) | 1994-09-22 | 1995-09-21 | 반도체 메모리 장치 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US5563830A (ko) |
| JP (1) | JP2616712B2 (ko) |
| KR (1) | KR100186848B1 (ko) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4044663B2 (ja) * | 1998-02-25 | 2008-02-06 | 富士通株式会社 | 半導体装置 |
| KR100329734B1 (ko) * | 1998-04-03 | 2002-06-20 | 박종섭 | 어드레스입력및데이터입력용으로동일단자를겸용하는반도체메모리장치 |
| KR100328809B1 (ko) * | 1999-07-22 | 2002-03-14 | 윤종용 | 웨이퍼 레벨 테스트 기능을 갖는 반도체 메모리 장치 |
| US7010733B2 (en) * | 2002-10-09 | 2006-03-07 | International Business Machines Corporation | Parametric testing for high pin count ASIC |
| US20170323239A1 (en) | 2016-05-06 | 2017-11-09 | General Electric Company | Constrained time computing control system to simulate and optimize aircraft operations with dynamic thermodynamic state and asset utilization attainment |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58153293A (ja) * | 1982-03-05 | 1983-09-12 | Hitachi Ltd | 半導体メモリ |
| JPH02148499A (ja) * | 1988-11-29 | 1990-06-07 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP2753335B2 (ja) * | 1989-07-19 | 1998-05-20 | 株式会社日立製作所 | 半導体装置 |
| JP2845713B2 (ja) * | 1993-03-12 | 1999-01-13 | 株式会社東芝 | 並列ビットテストモード内蔵半導体メモリ |
| US5383157A (en) * | 1993-08-06 | 1995-01-17 | Cypress Semiconductor Corporation | Parallel TESTMODE |
-
1994
- 1994-09-22 JP JP6227723A patent/JP2616712B2/ja not_active Expired - Lifetime
-
1995
- 1995-09-21 KR KR1019950031142A patent/KR100186848B1/ko not_active IP Right Cessation
- 1995-09-22 US US08/532,881 patent/US5563830A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2616712B2 (ja) | 1997-06-04 |
| US5563830A (en) | 1996-10-08 |
| KR100186848B1 (ko) | 1999-05-15 |
| JPH0896598A (ja) | 1996-04-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE69518343T2 (de) | Halbleiterspeicheranordnung | |
| DE69521159D1 (de) | Halbleiterspeicheranordnung | |
| DE69422901D1 (de) | Halbleiterspeicheranordnung | |
| DE69603632D1 (de) | Halbleiter-Speicheranordnung | |
| KR960008845A (ko) | 반도체 기억장치 | |
| DE69520902T2 (de) | Nichtflüchtige Halbleiterspeicheranordnung | |
| DE69512700T2 (de) | Halbleiterspeicheranordnung | |
| DE69615783D1 (de) | Halbleiterspeicheranordnung | |
| KR960012510A (ko) | 반도체 메모리 장치 | |
| DE69520333D1 (de) | Halbleiterspeicher | |
| DE69520254D1 (de) | Halbleiterspeicher | |
| DE69600591D1 (de) | Halbleiterspeicheranordnung | |
| DE69427443D1 (de) | Halbleiterspeicheranordnung | |
| DE69432846D1 (de) | Halbleiterspeichereinrichtung | |
| KR960012033A (ko) | 반도체 기억장치 | |
| DE69427107D1 (de) | Halbleiterspeicheranordnung | |
| KR960011703A (ko) | 반도체 메모리 | |
| DE69521066D1 (de) | Halbleiterspeicheranordnung | |
| DE69526834D1 (de) | Halbleiterspeicher | |
| KR960012034A (ko) | 반도체 메모리 | |
| DE69423996D1 (de) | Halbleiterspeicheranordnung | |
| KR960011705A (ko) | 반도체 메모리 장치 | |
| DE69731802D1 (de) | Halbleiter-Speicherbauteil | |
| KR960012010A (ko) | 반도체 메모리 | |
| DE69420195T2 (de) | Halbleiterspeicheranordnung |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20011219 Year of fee payment: 4 |
|
| LAPS | Lapse due to unpaid annual fee |