JPS6423548A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS6423548A JPS6423548A JP17890287A JP17890287A JPS6423548A JP S6423548 A JPS6423548 A JP S6423548A JP 17890287 A JP17890287 A JP 17890287A JP 17890287 A JP17890287 A JP 17890287A JP S6423548 A JPS6423548 A JP S6423548A
- Authority
- JP
- Japan
- Prior art keywords
- mode
- test
- written
- state
- memory element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Read Only Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Dram (AREA)
Abstract
PURPOSE:To easily detect a breakdown or to easily diagnose an operation by a method wherein a nonvolatile memory element which is written by a level of a power-supply voltage is installed and a changeover between a test mode and a normal mode is set by its memory state. CONSTITUTION:A mode changeover circuit 3 and a setting circuit 4 are constituted in such a way that they set a test mode in an erased state of a memory element M and that they set a normal mode in a written state. In a semiconductor integrated circuit device 10 the test mode is automatically set in an initial state that the memory element M is not written. Accordingly, it is possible to efficiently execute a test to detect a breakdown, to diagnose an operation or the like in this state. If this test is completed, only a product judged to be good is selected; a prescribed write voltage is impressed on power-supply terminals P1, P2; the memory element M is written; the test mode is released and the normal operation mode can be set. By this setup, a changeover between the normal mode and the test mode can be set without increasing the number of terminals; it is possible to detect the breakdown or to diagnose the operation easily.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17890287A JPS6423548A (en) | 1987-07-20 | 1987-07-20 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17890287A JPS6423548A (en) | 1987-07-20 | 1987-07-20 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6423548A true JPS6423548A (en) | 1989-01-26 |
Family
ID=16056686
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17890287A Pending JPS6423548A (en) | 1987-07-20 | 1987-07-20 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6423548A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0580130A (en) * | 1991-09-20 | 1993-04-02 | Nec Corp | Semiconductor integrated circuit |
US5719625A (en) * | 1990-05-25 | 1998-02-17 | Asahi Kogaku Kogyo Kabushiki Kaisha | Device for controlling imaging device |
US6064627A (en) * | 1996-09-26 | 2000-05-16 | Mitsubishi Denki Kabushiki Kaisha | Synchronous semiconductor memory device |
-
1987
- 1987-07-20 JP JP17890287A patent/JPS6423548A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5719625A (en) * | 1990-05-25 | 1998-02-17 | Asahi Kogaku Kogyo Kabushiki Kaisha | Device for controlling imaging device |
JPH0580130A (en) * | 1991-09-20 | 1993-04-02 | Nec Corp | Semiconductor integrated circuit |
US6064627A (en) * | 1996-09-26 | 2000-05-16 | Mitsubishi Denki Kabushiki Kaisha | Synchronous semiconductor memory device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR950006865A (en) | Semiconductor Nonvolatile Memory Device | |
DE69333151D1 (en) | Data line-free flash memory divided into memory blocks and microcomputers with flash memory | |
EP0204300A3 (en) | A programmable macrocell using eprom or eeprom transistors for architecture control in programmable logic circuits | |
TW277134B (en) | Semiconductor memory device | |
US5210716A (en) | Semiconductor nonvolatile memory | |
KR880009304A (en) | EPROM built-in microcomputer | |
KR950003989A (en) | Microcomputer | |
JPS6423548A (en) | Semiconductor integrated circuit device | |
EP0377840A3 (en) | Nonvolatile semiconductor memory device having reference potential generating circuit | |
KR960012401A (en) | Semiconductor integrated device | |
KR930020430A (en) | Nonvolatile Semiconductor Memory | |
KR890016442A (en) | Electronic Circuits and Electronic Clocks | |
EP0427260A3 (en) | Non-volatile memory devices | |
JPS5625295A (en) | Semiconductor device | |
EP0844619A3 (en) | Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof | |
JPS56156992A (en) | Driving circuit for semiconductor storage device | |
JPS57172598A (en) | Nonvolatile semiconductor memory | |
JPS5564699A (en) | Semiconductor integrated-circuit memory | |
JPS6447972A (en) | Memory ic testing circuit | |
KR940020426A (en) | SEMICONDUCTOR MEMORY DEVICE | |
JPS5673361A (en) | Testing device of ic | |
JPS643899A (en) | Nonvolatile semiconductor memory device | |
JPS57100690A (en) | Nonvolatile semiconductor memory | |
KR960025751A (en) | Flash memory device | |
JPS5740660A (en) | Testing method for semiconductor device |