DE69530266D1 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69530266D1
DE69530266D1 DE69530266T DE69530266T DE69530266D1 DE 69530266 D1 DE69530266 D1 DE 69530266D1 DE 69530266 T DE69530266 T DE 69530266T DE 69530266 T DE69530266 T DE 69530266T DE 69530266 D1 DE69530266 D1 DE 69530266D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69530266T
Other languages
English (en)
Other versions
DE69530266T2 (de
Inventor
Tetsuya Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69530266D1 publication Critical patent/DE69530266D1/de
Application granted granted Critical
Publication of DE69530266T2 publication Critical patent/DE69530266T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4087Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
DE69530266T 1994-12-16 1995-11-21 Halbleiterspeicheranordnung Expired - Lifetime DE69530266T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6312991A JPH08171796A (ja) 1994-12-16 1994-12-16 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69530266D1 true DE69530266D1 (de) 2003-05-15
DE69530266T2 DE69530266T2 (de) 2003-12-04

Family

ID=18035927

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69530266T Expired - Lifetime DE69530266T2 (de) 1994-12-16 1995-11-21 Halbleiterspeicheranordnung

Country Status (7)

Country Link
US (1) US5740113A (de)
EP (1) EP0717415B1 (de)
JP (1) JPH08171796A (de)
KR (1) KR0175704B1 (de)
CN (1) CN1078730C (de)
DE (1) DE69530266T2 (de)
TW (1) TW301749B (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2825291B2 (ja) * 1989-11-13 1998-11-18 株式会社東芝 半導体記憶装置
JP2917914B2 (ja) * 1996-05-17 1999-07-12 日本電気株式会社 昇圧回路
TW423162B (en) * 1997-02-27 2001-02-21 Toshiba Corp Power voltage supplying circuit and semiconductor memory including the same
JPH10302469A (ja) * 1997-04-25 1998-11-13 Fujitsu Ltd 半導体記憶装置
US6016279A (en) * 1998-03-30 2000-01-18 Vanguard International Semiconductor Corporation DRAM sensing scheme and isolation circuit
US5870343A (en) * 1998-04-06 1999-02-09 Vanguard International Semiconductor Corporation DRAM sensing scheme for eliminating bit-line coupling noise
US6009023A (en) * 1998-05-26 1999-12-28 Etron Technology, Inc. High performance DRAM structure employing multiple thickness gate oxide
US6033945A (en) * 1998-06-03 2000-03-07 G-Link Technology Multiple equilibration circuits for a single bit line
KR100532392B1 (ko) * 1998-08-28 2006-03-16 삼성전자주식회사 센싱동작 초기의 센싱속도를 향상시킬 수 있는 반도체 메모리장치 및 분리 트랜지스터 제어방법
JP2000298984A (ja) * 1999-04-15 2000-10-24 Oki Electric Ind Co Ltd 半導体記憶装置
DE10107314C2 (de) 2001-02-16 2003-03-27 Infineon Technologies Ag Verfahren zum Lesen einer Speicherzelle eines Halbleiterspeichers und Halbleiterspeicher
KR100518230B1 (ko) * 2003-06-16 2005-10-04 주식회사 하이닉스반도체 메모리 장치의 감지 증폭기용 구동전압 드라이버
JP4275583B2 (ja) * 2004-06-24 2009-06-10 ユーディナデバイス株式会社 電子モジュール
EP1933326B1 (de) 2005-09-09 2010-05-26 Fujitsu Microelectronics Limited Integrierte halbleiterschaltung
JP5259505B2 (ja) 2009-06-26 2013-08-07 株式会社東芝 半導体記憶装置
US9293192B1 (en) 2014-12-02 2016-03-22 International Business Machines Corporation SRAM cell with dynamic split ground and split wordline

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6150284A (ja) * 1984-08-17 1986-03-12 Mitsubishi Electric Corp シエアドセンスアンプ回路の駆動方法
JPS63257994A (ja) * 1987-04-15 1988-10-25 Nec Corp 半導体記憶装置
US5237534A (en) * 1989-04-27 1993-08-17 Kabushiki Kaisha Toshiba Data sense circuit for a semiconductor nonvolatile memory device
JP2742719B2 (ja) * 1990-02-16 1998-04-22 三菱電機株式会社 半導体記憶装置
KR950009234B1 (ko) * 1992-02-19 1995-08-18 삼성전자주식회사 반도체 메모리장치의 비트라인 분리클럭 발생장치
US5291437A (en) * 1992-06-25 1994-03-01 Texas Instruments Incorporated Shared dummy cell
JP2768172B2 (ja) * 1992-09-30 1998-06-25 日本電気株式会社 半導体メモリ装置
KR950004870B1 (ko) * 1992-11-24 1995-05-15 삼성전자 주식회사 번인 모드에서 분리게이트의 신뢰성 개선회로

Also Published As

Publication number Publication date
TW301749B (de) 1997-04-01
KR0175704B1 (ko) 1999-04-15
JPH08171796A (ja) 1996-07-02
EP0717415A3 (de) 1999-08-25
KR960025728A (ko) 1996-07-20
US5740113A (en) 1998-04-14
CN1132396A (zh) 1996-10-02
EP0717415B1 (de) 2003-04-09
DE69530266T2 (de) 2003-12-04
CN1078730C (zh) 2002-01-30
EP0717415A2 (de) 1996-06-19

Similar Documents

Publication Publication Date Title
DE69526460T2 (de) Halbleiterspeicheranordnung
DE69521159T2 (de) Halbleiterspeicheranordnung
DE69623832T2 (de) Halbleiterspeicheranordnung
DE69430683D1 (de) Halbleiterspeicheranordnung
DE69623376T2 (de) Halbleiterspeicheranordnung
DE69422901T2 (de) Halbleiterspeicheranordnung
DE69615783T2 (de) Halbleiterspeicheranordnung
DE69512700D1 (de) Halbleiterspeicheranordnung
DE69629068D1 (de) Halbleiterspeicheranordnung
DE69617391D1 (de) Halbleiterspeicheranordnung
DE69427443T2 (de) Halbleiterspeicheranordnung
DE69433288D1 (de) Halbleiterspeicheranordnung
DE69525583T2 (de) Halbleiterspeicheranordnung
DE69624297T2 (de) Halbleiterspeicheranordnung
DE69731015D1 (de) Halbleiterspeicheranordnung
DE69530266T2 (de) Halbleiterspeicheranordnung
DE69430944D1 (de) Halbleiterspeicheranordnung
DE69823427D1 (de) Halbleiterspeicheranordnung
DE69534964D1 (de) Halbleiterspeicheranordnung
DE69721210D1 (de) Halbleiterspeicheranordnung
DE69528001T2 (de) Halbleiterspeicheranordnung
DE69728312D1 (de) Halbleiterspeicheranordnung
DE69528242T2 (de) Halbleiterspeicheranordnung
DE69637074D1 (de) Halbleiterspeicheranordnung
DE69724178D1 (de) Halbleiterspeicheranordnung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition